llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-zve64f.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
# RUN: llc %s -mtriple=riscv64 -mattr=+zve64f -run-pass=riscv-insert-vsetvli -o - | FileCheck %s

---
name:            spam
tracksRegLiveness: true
noPhis:          true
isSSA:           false
body:             |
  bb.0.entry:
    liveins: $x10, $x11, $x12, $f10_f

    ; CHECK-LABEL: name: spam
    ; CHECK: liveins: $x10, $x11, $x12, $f10_f
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x12
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr = COPY $x10
    ; CHECK-NEXT: [[COPY3:%[0-9]+]]:fpr32 = COPY $f10_f
    ; CHECK-NEXT: dead $x0 = PseudoVSETIVLI 8, 208 /* e32, m1, ta, ma */, implicit-def $vl, implicit-def $vtype
    ; CHECK-NEXT: renamable $v10 = PseudoVFMV_S_FPR32 undef renamable $v10, [[COPY3]], 8 /* vl */, 5 /* e32 */, implicit $vl, implicit $vtype
    ; CHECK-NEXT: renamable $v11 = PseudoVMV_S_X undef renamable $v11, [[COPY2]], 8 /* vl */, 5 /* e32 */, implicit $vl, implicit $vtype
    ; CHECK-NEXT: dead $x0 = PseudoVSETIVLI 1, 216 /* e64, m1, ta, ma */, implicit-def $vl, implicit-def $vtype
    ; CHECK-NEXT: renamable $v8 = PseudoVLE64_V_M1 undef renamable $v8, [[COPY1]], 1 /* vl */, 6 /* e64 */, 2 /* tu, ma */, implicit $vl, implicit $vtype :: (load unknown-size, align 8)
    ; CHECK-NEXT: dead $x0 = PseudoVSETIVLI 8, 208 /* e32, m1, ta, ma */, implicit-def $vl, implicit-def $vtype
    ; CHECK-NEXT: renamable $v9 = PseudoVLE32_V_M1 undef renamable $v9, [[COPY]], 8 /* vl */, 5 /* e32 */, 2 /* tu, ma */, implicit $vl, implicit $vtype :: (load unknown-size, align 4)
    ; CHECK-NEXT: PseudoRET implicit $v8, implicit $v9, implicit $v10, implicit $v11
    %3:gpr = COPY $x12
    %2:gpr = COPY $x11
    %1:gpr = COPY $x10
    %0:fpr32 = COPY $f10_f
    renamable $v10 = PseudoVFMV_S_FPR32 undef renamable $v10, %0, 8, 5 /* e32 */
    renamable $v11 = PseudoVMV_S_X undef renamable $v11, %1, 8, 5 /* e32 */
    renamable $v8 = PseudoVLE64_V_M1 undef renamable $v8, %2, 1, 6 /* e64 */, 2 /* tu, ma */ :: (load unknown-size, align 8)
    renamable $v9 = PseudoVLE32_V_M1 undef renamable $v9, %3, 8, 5 /* e32 */, 2 /* tu, ma */ :: (load unknown-size, align 4)
    PseudoRET implicit $v8, implicit $v9, implicit $v10, implicit $v11
...