llvm/test/CodeGen/RISCV/GlobalISel/memset-inline.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc -global-isel -mtriple=riscv32 < %s \
; RUN:   | FileCheck -check-prefix=RV32I %s
; RUN: llc -global-isel -mtriple=riscv64 < %s \
; RUN:   | FileCheck -check-prefix=RV64I %s

define void @test_memset_inline_2bytes(ptr %dst, i8 %val) {
; RV32I-LABEL: test_memset_inline_2bytes:
; RV32I:       # %bb.0:
; RV32I-NEXT:    sb a1, 0(a0)
; RV32I-NEXT:    sb a1, 1(a0)
; RV32I-NEXT:    ret
;
; RV64I-LABEL: test_memset_inline_2bytes:
; RV64I:       # %bb.0:
; RV64I-NEXT:    sb a1, 0(a0)
; RV64I-NEXT:    sb a1, 1(a0)
; RV64I-NEXT:    ret
  call void @llvm.memset.inline.p0.i64(ptr %dst, i8 %val, i64 2, i1 false)
  ret void
}

define void @test_memset_inline_4bytes(ptr %dst, i8 %val) {
; RV32I-LABEL: test_memset_inline_4bytes:
; RV32I:       # %bb.0:
; RV32I-NEXT:    sb a1, 0(a0)
; RV32I-NEXT:    sb a1, 1(a0)
; RV32I-NEXT:    sb a1, 2(a0)
; RV32I-NEXT:    sb a1, 3(a0)
; RV32I-NEXT:    ret
;
; RV64I-LABEL: test_memset_inline_4bytes:
; RV64I:       # %bb.0:
; RV64I-NEXT:    sb a1, 0(a0)
; RV64I-NEXT:    sb a1, 1(a0)
; RV64I-NEXT:    sb a1, 2(a0)
; RV64I-NEXT:    sb a1, 3(a0)
; RV64I-NEXT:    ret
  call void @llvm.memset.inline.p0.i64(ptr %dst, i8 %val, i64 4, i1 false)
  ret void
}

define void @test_memset_inline_8bytes(ptr %dst, i8 %val) {
; RV32I-LABEL: test_memset_inline_8bytes:
; RV32I:       # %bb.0:
; RV32I-NEXT:    sb a1, 0(a0)
; RV32I-NEXT:    sb a1, 1(a0)
; RV32I-NEXT:    sb a1, 2(a0)
; RV32I-NEXT:    sb a1, 3(a0)
; RV32I-NEXT:    sb a1, 4(a0)
; RV32I-NEXT:    sb a1, 5(a0)
; RV32I-NEXT:    sb a1, 6(a0)
; RV32I-NEXT:    sb a1, 7(a0)
; RV32I-NEXT:    ret
;
; RV64I-LABEL: test_memset_inline_8bytes:
; RV64I:       # %bb.0:
; RV64I-NEXT:    sb a1, 0(a0)
; RV64I-NEXT:    sb a1, 1(a0)
; RV64I-NEXT:    sb a1, 2(a0)
; RV64I-NEXT:    sb a1, 3(a0)
; RV64I-NEXT:    sb a1, 4(a0)
; RV64I-NEXT:    sb a1, 5(a0)
; RV64I-NEXT:    sb a1, 6(a0)
; RV64I-NEXT:    sb a1, 7(a0)
; RV64I-NEXT:    ret
  call void @llvm.memset.inline.p0.i64(ptr %dst, i8 %val, i64 8, i1 false)
  ret void
}