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llvm/llvm-project.git/refs/heads/main/./llvm/test/CodeGen/PowerPC/abdu-neg.ll
blob: adc5faa4b05890ddd23432bb7417b86016fb73b3 [file] [edit]
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=powerpc-unknown-linux-gnu %s -o - | FileCheck %s --check-prefixes=CHECK,PPC32
; RUN: llc -mtriple=powerpc64-unknown-linux-gnu %s -o - | FileCheck %s --check-prefixes=CHECK,PPC64
;
; trunc(nabs(sub(zext(a),zext(b)))) -> nabdu(a,b)
;
define i8 @abd_ext_i8(i8 %a, i8 %b) nounwind {
; PPC32-LABEL: abd_ext_i8:
; PPC32: # %bb.0:
; PPC32-NEXT: clrlwi 3, 3, 24
; PPC32-NEXT: clrlwi 4, 4, 24
; PPC32-NEXT: sub 3, 3, 4
; PPC32-NEXT: srawi 4, 3, 31
; PPC32-NEXT: xor 3, 3, 4
; PPC32-NEXT: sub 3, 4, 3
; PPC32-NEXT: blr
;
; PPC64-LABEL: abd_ext_i8:
; PPC64: # %bb.0:
; PPC64-NEXT: clrldi 3, 3, 56
; PPC64-NEXT: clrldi 4, 4, 56
; PPC64-NEXT: sub 3, 3, 4
; PPC64-NEXT: sradi 4, 3, 63
; PPC64-NEXT: xor 3, 3, 4
; PPC64-NEXT: sub 3, 4, 3
; PPC64-NEXT: blr
%aext = zext i8 %a to i64
%bext = zext i8 %b to i64
%sub = sub i64 %aext, %bext
%abs = call i64 @llvm.abs.i64(i64 %sub, i1 false)
%nabs = sub i64 0, %abs
%trunc = trunc i64 %nabs to i8
ret i8 %trunc
}
define i8 @abd_ext_i8_i16(i8 %a, i16 %b) nounwind {
; PPC32-LABEL: abd_ext_i8_i16:
; PPC32: # %bb.0:
; PPC32-NEXT: clrlwi 4, 4, 16
; PPC32-NEXT: clrlwi 3, 3, 24
; PPC32-NEXT: sub 3, 3, 4
; PPC32-NEXT: srawi 4, 3, 31
; PPC32-NEXT: xor 3, 3, 4
; PPC32-NEXT: sub 3, 4, 3
; PPC32-NEXT: blr
;
; PPC64-LABEL: abd_ext_i8_i16:
; PPC64: # %bb.0:
; PPC64-NEXT: clrldi 3, 3, 56
; PPC64-NEXT: clrldi 4, 4, 48
; PPC64-NEXT: sub 3, 3, 4
; PPC64-NEXT: sradi 4, 3, 63
; PPC64-NEXT: xor 3, 3, 4
; PPC64-NEXT: sub 3, 4, 3
; PPC64-NEXT: blr
%aext = zext i8 %a to i64
%bext = zext i16 %b to i64
%sub = sub i64 %aext, %bext
%abs = call i64 @llvm.abs.i64(i64 %sub, i1 false)
%nabs = sub i64 0, %abs
%trunc = trunc i64 %nabs to i8
ret i8 %trunc
}
define i8 @abd_ext_i8_undef(i8 %a, i8 %b) nounwind {
; PPC32-LABEL: abd_ext_i8_undef:
; PPC32: # %bb.0:
; PPC32-NEXT: clrlwi 3, 3, 24
; PPC32-NEXT: clrlwi 4, 4, 24
; PPC32-NEXT: sub 3, 3, 4
; PPC32-NEXT: srawi 4, 3, 31
; PPC32-NEXT: xor 3, 3, 4
; PPC32-NEXT: sub 3, 4, 3
; PPC32-NEXT: blr
;
; PPC64-LABEL: abd_ext_i8_undef:
; PPC64: # %bb.0:
; PPC64-NEXT: clrldi 3, 3, 56
; PPC64-NEXT: clrldi 4, 4, 56
; PPC64-NEXT: sub 3, 3, 4
; PPC64-NEXT: sradi 4, 3, 63
; PPC64-NEXT: xor 3, 3, 4
; PPC64-NEXT: sub 3, 4, 3
; PPC64-NEXT: blr
%aext = zext i8 %a to i64
%bext = zext i8 %b to i64
%sub = sub i64 %aext, %bext
%abs = call i64 @llvm.abs.i64(i64 %sub, i1 true)
%nabs = sub i64 0, %abs
%trunc = trunc i64 %nabs to i8
ret i8 %trunc
}
define i16 @abd_ext_i16(i16 %a, i16 %b) nounwind {
; PPC32-LABEL: abd_ext_i16:
; PPC32: # %bb.0:
; PPC32-NEXT: clrlwi 3, 3, 16
; PPC32-NEXT: clrlwi 4, 4, 16
; PPC32-NEXT: sub 3, 3, 4
; PPC32-NEXT: srawi 4, 3, 31
; PPC32-NEXT: xor 3, 3, 4
; PPC32-NEXT: sub 3, 4, 3
; PPC32-NEXT: blr
;
; PPC64-LABEL: abd_ext_i16:
; PPC64: # %bb.0:
; PPC64-NEXT: clrldi 3, 3, 48
; PPC64-NEXT: clrldi 4, 4, 48
; PPC64-NEXT: sub 3, 3, 4
; PPC64-NEXT: sradi 4, 3, 63
; PPC64-NEXT: xor 3, 3, 4
; PPC64-NEXT: sub 3, 4, 3
; PPC64-NEXT: blr
%aext = zext i16 %a to i64
%bext = zext i16 %b to i64
%sub = sub i64 %aext, %bext
%abs = call i64 @llvm.abs.i64(i64 %sub, i1 false)
%nabs = sub i64 0, %abs
%trunc = trunc i64 %nabs to i16
ret i16 %trunc
}
define i16 @abd_ext_i16_i32(i16 %a, i32 %b) nounwind {
; PPC32-LABEL: abd_ext_i16_i32:
; PPC32: # %bb.0:
; PPC32-NEXT: clrlwi 3, 3, 16
; PPC32-NEXT: subc 3, 3, 4
; PPC32-NEXT: subfe 4, 3, 3
; PPC32-NEXT: xor 3, 3, 4
; PPC32-NEXT: sub 3, 4, 3
; PPC32-NEXT: blr
;
; PPC64-LABEL: abd_ext_i16_i32:
; PPC64: # %bb.0:
; PPC64-NEXT: clrldi 3, 3, 48
; PPC64-NEXT: clrldi 4, 4, 32
; PPC64-NEXT: sub 3, 3, 4
; PPC64-NEXT: sradi 4, 3, 63
; PPC64-NEXT: xor 3, 3, 4
; PPC64-NEXT: sub 3, 4, 3
; PPC64-NEXT: blr
%aext = zext i16 %a to i64
%bext = zext i32 %b to i64
%sub = sub i64 %aext, %bext
%abs = call i64 @llvm.abs.i64(i64 %sub, i1 false)
%nabs = sub i64 0, %abs
%trunc = trunc i64 %nabs to i16
ret i16 %trunc
}
define i16 @abd_ext_i16_undef(i16 %a, i16 %b) nounwind {
; PPC32-LABEL: abd_ext_i16_undef:
; PPC32: # %bb.0:
; PPC32-NEXT: clrlwi 3, 3, 16
; PPC32-NEXT: clrlwi 4, 4, 16
; PPC32-NEXT: sub 3, 3, 4
; PPC32-NEXT: srawi 4, 3, 31
; PPC32-NEXT: xor 3, 3, 4
; PPC32-NEXT: sub 3, 4, 3
; PPC32-NEXT: blr
;
; PPC64-LABEL: abd_ext_i16_undef:
; PPC64: # %bb.0:
; PPC64-NEXT: clrldi 3, 3, 48
; PPC64-NEXT: clrldi 4, 4, 48
; PPC64-NEXT: sub 3, 3, 4
; PPC64-NEXT: sradi 4, 3, 63
; PPC64-NEXT: xor 3, 3, 4
; PPC64-NEXT: sub 3, 4, 3
; PPC64-NEXT: blr
%aext = zext i16 %a to i64
%bext = zext i16 %b to i64
%sub = sub i64 %aext, %bext
%abs = call i64 @llvm.abs.i64(i64 %sub, i1 true)
%nabs = sub i64 0, %abs
%trunc = trunc i64 %nabs to i16
ret i16 %trunc
}
define i32 @abd_ext_i32(i32 %a, i32 %b) nounwind {
; PPC32-LABEL: abd_ext_i32:
; PPC32: # %bb.0:
; PPC32-NEXT: subc 3, 3, 4
; PPC32-NEXT: subfe 4, 3, 3
; PPC32-NEXT: xor 3, 3, 4
; PPC32-NEXT: sub 3, 4, 3
; PPC32-NEXT: blr
;
; PPC64-LABEL: abd_ext_i32:
; PPC64: # %bb.0:
; PPC64-NEXT: clrldi 3, 3, 32
; PPC64-NEXT: clrldi 4, 4, 32
; PPC64-NEXT: sub 3, 3, 4
; PPC64-NEXT: sradi 4, 3, 63
; PPC64-NEXT: xor 3, 3, 4
; PPC64-NEXT: sub 3, 4, 3
; PPC64-NEXT: blr
%aext = zext i32 %a to i64
%bext = zext i32 %b to i64
%sub = sub i64 %aext, %bext
%abs = call i64 @llvm.abs.i64(i64 %sub, i1 false)
%nabs = sub i64 0, %abs
%trunc = trunc i64 %nabs to i32
ret i32 %trunc
}
define i32 @abd_ext_i32_i16(i32 %a, i16 %b) nounwind {
; PPC32-LABEL: abd_ext_i32_i16:
; PPC32: # %bb.0:
; PPC32-NEXT: clrlwi 4, 4, 16
; PPC32-NEXT: subc 3, 3, 4
; PPC32-NEXT: subfe 4, 3, 3
; PPC32-NEXT: xor 3, 3, 4
; PPC32-NEXT: sub 3, 4, 3
; PPC32-NEXT: blr
;
; PPC64-LABEL: abd_ext_i32_i16:
; PPC64: # %bb.0:
; PPC64-NEXT: clrldi 3, 3, 32
; PPC64-NEXT: clrldi 4, 4, 48
; PPC64-NEXT: sub 3, 3, 4
; PPC64-NEXT: sradi 4, 3, 63
; PPC64-NEXT: xor 3, 3, 4
; PPC64-NEXT: sub 3, 4, 3
; PPC64-NEXT: blr
%aext = zext i32 %a to i64
%bext = zext i16 %b to i64
%sub = sub i64 %aext, %bext
%abs = call i64 @llvm.abs.i64(i64 %sub, i1 false)
%nabs = sub i64 0, %abs
%trunc = trunc i64 %nabs to i32
ret i32 %trunc
}
define i32 @abd_ext_i32_undef(i32 %a, i32 %b) nounwind {
; PPC32-LABEL: abd_ext_i32_undef:
; PPC32: # %bb.0:
; PPC32-NEXT: subc 3, 3, 4
; PPC32-NEXT: subfe 4, 3, 3
; PPC32-NEXT: xor 3, 3, 4
; PPC32-NEXT: sub 3, 4, 3
; PPC32-NEXT: blr
;
; PPC64-LABEL: abd_ext_i32_undef:
; PPC64: # %bb.0:
; PPC64-NEXT: clrldi 3, 3, 32
; PPC64-NEXT: clrldi 4, 4, 32
; PPC64-NEXT: sub 3, 3, 4
; PPC64-NEXT: sradi 4, 3, 63
; PPC64-NEXT: xor 3, 3, 4
; PPC64-NEXT: sub 3, 4, 3
; PPC64-NEXT: blr
%aext = zext i32 %a to i64
%bext = zext i32 %b to i64
%sub = sub i64 %aext, %bext
%abs = call i64 @llvm.abs.i64(i64 %sub, i1 true)
%nabs = sub i64 0, %abs
%trunc = trunc i64 %nabs to i32
ret i32 %trunc
}
define i64 @abd_ext_i64(i64 %a, i64 %b) nounwind {
; PPC32-LABEL: abd_ext_i64:
; PPC32: # %bb.0:
; PPC32-NEXT: subc 4, 4, 6
; PPC32-NEXT: li 7, 0
; PPC32-NEXT: subfe 3, 5, 3
; PPC32-NEXT: addze 5, 7
; PPC32-NEXT: addic 5, 5, -1
; PPC32-NEXT: xor 4, 4, 5
; PPC32-NEXT: xor 3, 3, 5
; PPC32-NEXT: subc 4, 4, 5
; PPC32-NEXT: subfe 3, 5, 3
; PPC32-NEXT: subfic 4, 4, 0
; PPC32-NEXT: subfze 3, 3
; PPC32-NEXT: blr
;
; PPC64-LABEL: abd_ext_i64:
; PPC64: # %bb.0:
; PPC64-NEXT: subc 3, 3, 4
; PPC64-NEXT: subfe 4, 3, 3
; PPC64-NEXT: xor 3, 3, 4
; PPC64-NEXT: sub 3, 4, 3
; PPC64-NEXT: blr
%aext = zext i64 %a to i128
%bext = zext i64 %b to i128
%sub = sub i128 %aext, %bext
%abs = call i128 @llvm.abs.i128(i128 %sub, i1 false)
%nabs = sub i128 0, %abs
%trunc = trunc i128 %nabs to i64
ret i64 %trunc
}
define i64 @abd_ext_i64_undef(i64 %a, i64 %b) nounwind {
; PPC32-LABEL: abd_ext_i64_undef:
; PPC32: # %bb.0:
; PPC32-NEXT: subc 4, 4, 6
; PPC32-NEXT: li 7, 0
; PPC32-NEXT: subfe 3, 5, 3
; PPC32-NEXT: addze 5, 7
; PPC32-NEXT: addic 5, 5, -1
; PPC32-NEXT: xor 4, 4, 5
; PPC32-NEXT: xor 3, 3, 5
; PPC32-NEXT: subc 4, 4, 5
; PPC32-NEXT: subfe 3, 5, 3
; PPC32-NEXT: subfic 4, 4, 0
; PPC32-NEXT: subfze 3, 3
; PPC32-NEXT: blr
;
; PPC64-LABEL: abd_ext_i64_undef:
; PPC64: # %bb.0:
; PPC64-NEXT: subc 3, 3, 4
; PPC64-NEXT: subfe 4, 3, 3
; PPC64-NEXT: xor 3, 3, 4
; PPC64-NEXT: sub 3, 4, 3
; PPC64-NEXT: blr
%aext = zext i64 %a to i128
%bext = zext i64 %b to i128
%sub = sub i128 %aext, %bext
%abs = call i128 @llvm.abs.i128(i128 %sub, i1 true)
%nabs = sub i128 0, %abs
%trunc = trunc i128 %nabs to i64
ret i64 %trunc
}
define i128 @abd_ext_i128(i128 %a, i128 %b) nounwind {
; PPC32-LABEL: abd_ext_i128:
; PPC32: # %bb.0:
; PPC32-NEXT: subc 6, 6, 10
; PPC32-NEXT: subfe 5, 9, 5
; PPC32-NEXT: subfe 4, 8, 4
; PPC32-NEXT: li 11, 0
; PPC32-NEXT: subfe 3, 7, 3
; PPC32-NEXT: addze 7, 11
; PPC32-NEXT: addic 7, 7, -1
; PPC32-NEXT: xor 6, 6, 7
; PPC32-NEXT: xor 5, 5, 7
; PPC32-NEXT: subc 6, 6, 7
; PPC32-NEXT: xor 4, 4, 7
; PPC32-NEXT: subfe 5, 7, 5
; PPC32-NEXT: xor 3, 3, 7
; PPC32-NEXT: subfe 4, 7, 4
; PPC32-NEXT: subfe 3, 7, 3
; PPC32-NEXT: subfic 6, 6, 0
; PPC32-NEXT: subfze 5, 5
; PPC32-NEXT: subfze 4, 4
; PPC32-NEXT: subfze 3, 3
; PPC32-NEXT: blr
;
; PPC64-LABEL: abd_ext_i128:
; PPC64: # %bb.0:
; PPC64-NEXT: subc 4, 4, 6
; PPC64-NEXT: li 7, 0
; PPC64-NEXT: subfe 3, 5, 3
; PPC64-NEXT: addze 5, 7
; PPC64-NEXT: addic 5, 5, -1
; PPC64-NEXT: xor 4, 4, 5
; PPC64-NEXT: xor 3, 3, 5
; PPC64-NEXT: subc 4, 4, 5
; PPC64-NEXT: subfe 3, 5, 3
; PPC64-NEXT: subfic 4, 4, 0
; PPC64-NEXT: subfze 3, 3
; PPC64-NEXT: blr
%aext = zext i128 %a to i256
%bext = zext i128 %b to i256
%sub = sub i256 %aext, %bext
%abs = call i256 @llvm.abs.i256(i256 %sub, i1 false)
%nabs = sub i256 0, %abs
%trunc = trunc i256 %nabs to i128
ret i128 %trunc
}
define i128 @abd_ext_i128_undef(i128 %a, i128 %b) nounwind {
; PPC32-LABEL: abd_ext_i128_undef:
; PPC32: # %bb.0:
; PPC32-NEXT: subc 6, 6, 10
; PPC32-NEXT: subfe 5, 9, 5
; PPC32-NEXT: subfe 4, 8, 4
; PPC32-NEXT: li 11, 0
; PPC32-NEXT: subfe 3, 7, 3
; PPC32-NEXT: addze 7, 11
; PPC32-NEXT: addic 7, 7, -1
; PPC32-NEXT: xor 6, 6, 7
; PPC32-NEXT: xor 5, 5, 7
; PPC32-NEXT: subc 6, 6, 7
; PPC32-NEXT: xor 4, 4, 7
; PPC32-NEXT: subfe 5, 7, 5
; PPC32-NEXT: xor 3, 3, 7
; PPC32-NEXT: subfe 4, 7, 4
; PPC32-NEXT: subfe 3, 7, 3
; PPC32-NEXT: subfic 6, 6, 0
; PPC32-NEXT: subfze 5, 5
; PPC32-NEXT: subfze 4, 4
; PPC32-NEXT: subfze 3, 3
; PPC32-NEXT: blr
;
; PPC64-LABEL: abd_ext_i128_undef:
; PPC64: # %bb.0:
; PPC64-NEXT: subc 4, 4, 6
; PPC64-NEXT: li 7, 0
; PPC64-NEXT: subfe 3, 5, 3
; PPC64-NEXT: addze 5, 7
; PPC64-NEXT: addic 5, 5, -1
; PPC64-NEXT: xor 4, 4, 5
; PPC64-NEXT: xor 3, 3, 5
; PPC64-NEXT: subc 4, 4, 5
; PPC64-NEXT: subfe 3, 5, 3
; PPC64-NEXT: subfic 4, 4, 0
; PPC64-NEXT: subfze 3, 3
; PPC64-NEXT: blr
%aext = zext i128 %a to i256
%bext = zext i128 %b to i256
%sub = sub i256 %aext, %bext
%abs = call i256 @llvm.abs.i256(i256 %sub, i1 true)
%nabs = sub i256 0, %abs
%trunc = trunc i256 %nabs to i128
ret i128 %trunc
}
;
define i4 @abd_ext_i4_to_i8(i4 %a, i4 %b) nounwind {
; CHECK-LABEL: abd_ext_i4_to_i8:
; CHECK: # %bb.0:
; CHECK-NEXT: clrlwi 3, 3, 28
; CHECK-NEXT: clrlwi 4, 4, 28
; CHECK-NEXT: sub 3, 3, 4
; CHECK-NEXT: srawi 4, 3, 7
; CHECK-NEXT: xor 3, 3, 4
; CHECK-NEXT: sub 3, 4, 3
; CHECK-NEXT: blr
%aext = zext i4 %a to i8
%bext = zext i4 %b to i8
%sub = sub i8 %aext, %bext
%abs = call i8 @llvm.abs.i8(i8 %sub, i1 false)
%nabs = sub i8 0, %abs
%trunc = trunc i8 %nabs to i4
ret i4 %trunc
}
define i8 @abd_ext_i8_to_i16(i8 %a, i8 %b) nounwind {
; CHECK-LABEL: abd_ext_i8_to_i16:
; CHECK: # %bb.0:
; CHECK-NEXT: clrlwi 3, 3, 24
; CHECK-NEXT: clrlwi 4, 4, 24
; CHECK-NEXT: sub 3, 3, 4
; CHECK-NEXT: srawi 4, 3, 15
; CHECK-NEXT: xor 3, 3, 4
; CHECK-NEXT: sub 3, 4, 3
; CHECK-NEXT: blr
%aext = zext i8 %a to i16
%bext = zext i8 %b to i16
%sub = sub i16 %aext, %bext
%abs = call i16 @llvm.abs.i16(i16 %sub, i1 false)
%nabs = sub i16 0, %abs
%trunc = trunc i16 %nabs to i8
ret i8 %trunc
}
define i16 @abd_ext_i16_to_i32(i16 %a, i16 %b) nounwind {
; CHECK-LABEL: abd_ext_i16_to_i32:
; CHECK: # %bb.0:
; CHECK-NEXT: clrlwi 3, 3, 16
; CHECK-NEXT: clrlwi 4, 4, 16
; CHECK-NEXT: sub 3, 3, 4
; CHECK-NEXT: srawi 4, 3, 31
; CHECK-NEXT: xor 3, 3, 4
; CHECK-NEXT: sub 3, 4, 3
; CHECK-NEXT: blr
%aext = zext i16 %a to i32
%bext = zext i16 %b to i32
%sub = sub i32 %aext, %bext
%abs = call i32 @llvm.abs.i32(i32 %sub, i1 false)
%nabs = sub i32 0, %abs
%trunc = trunc i32 %nabs to i16
ret i16 %trunc
}
; sub(umin(a,b),umax(a,b)) -> nabdu(a,b)
;
define i8 @abd_minmax_i8(i8 %a, i8 %b) nounwind {
; CHECK-LABEL: abd_minmax_i8:
; CHECK: # %bb.0:
; CHECK-NEXT: clrlwi 3, 3, 24
; CHECK-NEXT: clrlwi 4, 4, 24
; CHECK-NEXT: sub 3, 3, 4
; CHECK-NEXT: srawi 4, 3, 31
; CHECK-NEXT: xor 3, 3, 4
; CHECK-NEXT: sub 3, 4, 3
; CHECK-NEXT: blr
%min = call i8 @llvm.umin.i8(i8 %a, i8 %b)
%max = call i8 @llvm.umax.i8(i8 %a, i8 %b)
%sub = sub i8 %min, %max
ret i8 %sub
}
define i16 @abd_minmax_i16(i16 %a, i16 %b) nounwind {
; CHECK-LABEL: abd_minmax_i16:
; CHECK: # %bb.0:
; CHECK-NEXT: clrlwi 3, 3, 16
; CHECK-NEXT: clrlwi 4, 4, 16
; CHECK-NEXT: sub 3, 3, 4
; CHECK-NEXT: srawi 4, 3, 31
; CHECK-NEXT: xor 3, 3, 4
; CHECK-NEXT: sub 3, 4, 3
; CHECK-NEXT: blr
%min = call i16 @llvm.umin.i16(i16 %a, i16 %b)
%max = call i16 @llvm.umax.i16(i16 %a, i16 %b)
%sub = sub i16 %min, %max
ret i16 %sub
}
define i32 @abd_minmax_i32(i32 %a, i32 %b) nounwind {
; PPC32-LABEL: abd_minmax_i32:
; PPC32: # %bb.0:
; PPC32-NEXT: subc 3, 3, 4
; PPC32-NEXT: subfe 4, 3, 3
; PPC32-NEXT: xor 3, 3, 4
; PPC32-NEXT: sub 3, 4, 3
; PPC32-NEXT: blr
;
; PPC64-LABEL: abd_minmax_i32:
; PPC64: # %bb.0:
; PPC64-NEXT: clrldi 3, 3, 32
; PPC64-NEXT: clrldi 4, 4, 32
; PPC64-NEXT: subc 3, 3, 4
; PPC64-NEXT: subfe 4, 3, 3
; PPC64-NEXT: xor 3, 3, 4
; PPC64-NEXT: sub 3, 3, 4
; PPC64-NEXT: neg 3, 3
; PPC64-NEXT: blr
%min = call i32 @llvm.umin.i32(i32 %a, i32 %b)
%max = call i32 @llvm.umax.i32(i32 %a, i32 %b)
%sub = sub i32 %min, %max
ret i32 %sub
}
define i64 @abd_minmax_i64(i64 %a, i64 %b) nounwind {
; PPC32-LABEL: abd_minmax_i64:
; PPC32: # %bb.0:
; PPC32-NEXT: cmplw 3, 5
; PPC32-NEXT: cmplw 1, 4, 6
; PPC32-NEXT: crandc 20, 0, 2
; PPC32-NEXT: crand 21, 2, 4
; PPC32-NEXT: cror 20, 21, 20
; PPC32-NEXT: mr 7, 3
; PPC32-NEXT: bc 12, 20, .LBB19_2
; PPC32-NEXT: # %bb.1:
; PPC32-NEXT: mr 7, 5
; PPC32-NEXT: .LBB19_2:
; PPC32-NEXT: mr 8, 4
; PPC32-NEXT: bc 12, 20, .LBB19_4
; PPC32-NEXT: # %bb.3:
; PPC32-NEXT: mr 8, 6
; PPC32-NEXT: .LBB19_4:
; PPC32-NEXT: crandc 20, 1, 2
; PPC32-NEXT: crand 21, 2, 5
; PPC32-NEXT: cror 20, 21, 20
; PPC32-NEXT: bc 12, 20, .LBB19_6
; PPC32-NEXT: # %bb.5:
; PPC32-NEXT: mr 3, 5
; PPC32-NEXT: .LBB19_6:
; PPC32-NEXT: bc 12, 20, .LBB19_8
; PPC32-NEXT: # %bb.7:
; PPC32-NEXT: mr 4, 6
; PPC32-NEXT: .LBB19_8:
; PPC32-NEXT: subc 4, 8, 4
; PPC32-NEXT: subfe 3, 3, 7
; PPC32-NEXT: blr
;
; PPC64-LABEL: abd_minmax_i64:
; PPC64: # %bb.0:
; PPC64-NEXT: subc 3, 3, 4
; PPC64-NEXT: subfe 4, 3, 3
; PPC64-NEXT: xor 3, 3, 4
; PPC64-NEXT: sub 3, 4, 3
; PPC64-NEXT: blr
%min = call i64 @llvm.umin.i64(i64 %a, i64 %b)
%max = call i64 @llvm.umax.i64(i64 %a, i64 %b)
%sub = sub i64 %min, %max
ret i64 %sub
}
define i128 @abd_minmax_i128(i128 %a, i128 %b) nounwind {
; PPC32-LABEL: abd_minmax_i128:
; PPC32: # %bb.0:
; PPC32-NEXT: stwu 1, -16(1)
; PPC32-NEXT: cmplw 3, 7
; PPC32-NEXT: cmplw 1, 4, 8
; PPC32-NEXT: xor 11, 3, 7
; PPC32-NEXT: xor 12, 4, 8
; PPC32-NEXT: cmplw 5, 5, 9
; PPC32-NEXT: cmplw 6, 6, 10
; PPC32-NEXT: crandc 23, 0, 2
; PPC32-NEXT: crand 26, 2, 4
; PPC32-NEXT: or 11, 12, 11
; PPC32-NEXT: crandc 20, 20, 22
; PPC32-NEXT: crand 24, 22, 24
; PPC32-NEXT: cror 23, 26, 23
; PPC32-NEXT: cmplwi 7, 11, 0
; PPC32-NEXT: cror 20, 24, 20
; PPC32-NEXT: crandc 23, 23, 30
; PPC32-NEXT: crand 20, 30, 20
; PPC32-NEXT: cror 20, 20, 23
; PPC32-NEXT: mr 11, 3
; PPC32-NEXT: stw 30, 8(1) # 4-byte Folded Spill
; PPC32-NEXT: bc 4, 20, .LBB20_11
; PPC32-NEXT: # %bb.1:
; PPC32-NEXT: mr 12, 4
; PPC32-NEXT: bc 4, 20, .LBB20_12
; PPC32-NEXT: .LBB20_2:
; PPC32-NEXT: mr 0, 5
; PPC32-NEXT: bc 4, 20, .LBB20_13
; PPC32-NEXT: .LBB20_3:
; PPC32-NEXT: mr 30, 6
; PPC32-NEXT: bc 12, 20, .LBB20_5
; PPC32-NEXT: .LBB20_4:
; PPC32-NEXT: mr 30, 10
; PPC32-NEXT: .LBB20_5:
; PPC32-NEXT: crandc 20, 1, 2
; PPC32-NEXT: crand 23, 2, 5
; PPC32-NEXT: crandc 21, 21, 22
; PPC32-NEXT: crand 22, 22, 25
; PPC32-NEXT: cror 20, 23, 20
; PPC32-NEXT: cror 21, 22, 21
; PPC32-NEXT: crandc 20, 20, 30
; PPC32-NEXT: crand 21, 30, 21
; PPC32-NEXT: cror 20, 21, 20
; PPC32-NEXT: bc 4, 20, .LBB20_14
; PPC32-NEXT: # %bb.6:
; PPC32-NEXT: bc 4, 20, .LBB20_15
; PPC32-NEXT: .LBB20_7:
; PPC32-NEXT: bc 4, 20, .LBB20_16
; PPC32-NEXT: .LBB20_8:
; PPC32-NEXT: bc 12, 20, .LBB20_10
; PPC32-NEXT: .LBB20_9:
; PPC32-NEXT: mr 6, 10
; PPC32-NEXT: .LBB20_10:
; PPC32-NEXT: subc 6, 30, 6
; PPC32-NEXT: subfe 5, 5, 0
; PPC32-NEXT: subfe 4, 4, 12
; PPC32-NEXT: subfe 3, 3, 11
; PPC32-NEXT: lwz 30, 8(1) # 4-byte Folded Reload
; PPC32-NEXT: addi 1, 1, 16
; PPC32-NEXT: blr
; PPC32-NEXT: .LBB20_11:
; PPC32-NEXT: mr 11, 7
; PPC32-NEXT: mr 12, 4
; PPC32-NEXT: bc 12, 20, .LBB20_2
; PPC32-NEXT: .LBB20_12:
; PPC32-NEXT: mr 12, 8
; PPC32-NEXT: mr 0, 5
; PPC32-NEXT: bc 12, 20, .LBB20_3
; PPC32-NEXT: .LBB20_13:
; PPC32-NEXT: mr 0, 9
; PPC32-NEXT: mr 30, 6
; PPC32-NEXT: bc 4, 20, .LBB20_4
; PPC32-NEXT: b .LBB20_5
; PPC32-NEXT: .LBB20_14:
; PPC32-NEXT: mr 3, 7
; PPC32-NEXT: bc 12, 20, .LBB20_7
; PPC32-NEXT: .LBB20_15:
; PPC32-NEXT: mr 4, 8
; PPC32-NEXT: bc 12, 20, .LBB20_8
; PPC32-NEXT: .LBB20_16:
; PPC32-NEXT: mr 5, 9
; PPC32-NEXT: bc 4, 20, .LBB20_9
; PPC32-NEXT: b .LBB20_10
;
; PPC64-LABEL: abd_minmax_i128:
; PPC64: # %bb.0:
; PPC64-NEXT: cmpld 3, 5
; PPC64-NEXT: cmpld 1, 4, 6
; PPC64-NEXT: crandc 20, 0, 2
; PPC64-NEXT: mr 7, 3
; PPC64-NEXT: crand 21, 2, 4
; PPC64-NEXT: cror 20, 21, 20
; PPC64-NEXT: bc 12, 20, .LBB20_2
; PPC64-NEXT: # %bb.1:
; PPC64-NEXT: mr 7, 5
; PPC64-NEXT: .LBB20_2:
; PPC64-NEXT: mr 8, 4
; PPC64-NEXT: bc 12, 20, .LBB20_4
; PPC64-NEXT: # %bb.3:
; PPC64-NEXT: mr 8, 6
; PPC64-NEXT: .LBB20_4:
; PPC64-NEXT: crandc 20, 1, 2
; PPC64-NEXT: crand 21, 2, 5
; PPC64-NEXT: cror 20, 21, 20
; PPC64-NEXT: bc 12, 20, .LBB20_6
; PPC64-NEXT: # %bb.5:
; PPC64-NEXT: mr 3, 5
; PPC64-NEXT: .LBB20_6:
; PPC64-NEXT: bc 12, 20, .LBB20_8
; PPC64-NEXT: # %bb.7:
; PPC64-NEXT: mr 4, 6
; PPC64-NEXT: .LBB20_8:
; PPC64-NEXT: subc 4, 8, 4
; PPC64-NEXT: subfe 3, 3, 7
; PPC64-NEXT: blr
%min = call i128 @llvm.umin.i128(i128 %a, i128 %b)
%max = call i128 @llvm.umax.i128(i128 %a, i128 %b)
%sub = sub i128 %min, %max
ret i128 %sub
}
;
; select(icmp(a,b),sub(a,b),sub(b,a)) -> nabdu(a,b)
;
define i8 @abd_cmp_i8(i8 %a, i8 %b) nounwind {
; CHECK-LABEL: abd_cmp_i8:
; CHECK: # %bb.0:
; CHECK-NEXT: clrlwi 3, 3, 24
; CHECK-NEXT: clrlwi 4, 4, 24
; CHECK-NEXT: sub 3, 3, 4
; CHECK-NEXT: srawi 4, 3, 31
; CHECK-NEXT: xor 3, 3, 4
; CHECK-NEXT: sub 3, 4, 3
; CHECK-NEXT: blr
%cmp = icmp ule i8 %a, %b
%ab = sub i8 %a, %b
%ba = sub i8 %b, %a
%sel = select i1 %cmp, i8 %ab, i8 %ba
ret i8 %sel
}
define i16 @abd_cmp_i16(i16 %a, i16 %b) nounwind {
; CHECK-LABEL: abd_cmp_i16:
; CHECK: # %bb.0:
; CHECK-NEXT: clrlwi 3, 3, 16
; CHECK-NEXT: clrlwi 4, 4, 16
; CHECK-NEXT: sub 3, 3, 4
; CHECK-NEXT: srawi 4, 3, 31
; CHECK-NEXT: xor 3, 3, 4
; CHECK-NEXT: sub 3, 4, 3
; CHECK-NEXT: blr
%cmp = icmp ult i16 %a, %b
%ab = sub i16 %a, %b
%ba = sub i16 %b, %a
%sel = select i1 %cmp, i16 %ab, i16 %ba
ret i16 %sel
}
define i32 @abd_cmp_i32(i32 %a, i32 %b) nounwind {
; PPC32-LABEL: abd_cmp_i32:
; PPC32: # %bb.0:
; PPC32-NEXT: subc 3, 3, 4
; PPC32-NEXT: subfe 4, 3, 3
; PPC32-NEXT: xor 3, 3, 4
; PPC32-NEXT: sub 3, 4, 3
; PPC32-NEXT: blr
;
; PPC64-LABEL: abd_cmp_i32:
; PPC64: # %bb.0:
; PPC64-NEXT: clrldi 3, 3, 32
; PPC64-NEXT: clrldi 4, 4, 32
; PPC64-NEXT: subc 3, 3, 4
; PPC64-NEXT: subfe 4, 3, 3
; PPC64-NEXT: xor 3, 3, 4
; PPC64-NEXT: sub 3, 3, 4
; PPC64-NEXT: neg 3, 3
; PPC64-NEXT: blr
%cmp = icmp uge i32 %a, %b
%ab = sub i32 %a, %b
%ba = sub i32 %b, %a
%sel = select i1 %cmp, i32 %ba, i32 %ab
ret i32 %sel
}
define i64 @abd_cmp_i64(i64 %a, i64 %b) nounwind {
; PPC32-LABEL: abd_cmp_i64:
; PPC32: # %bb.0:
; PPC32-NEXT: mr 7, 4
; PPC32-NEXT: cmplw 1, 4, 6
; PPC32-NEXT: subc 4, 4, 6
; PPC32-NEXT: mr 8, 3
; PPC32-NEXT: cmplw 3, 5
; PPC32-NEXT: subfe 3, 5, 3
; PPC32-NEXT: crandc 20, 0, 2
; PPC32-NEXT: crand 21, 2, 4
; PPC32-NEXT: subc 6, 6, 7
; PPC32-NEXT: cror 20, 21, 20
; PPC32-NEXT: subfe 5, 8, 5
; PPC32-NEXT: bc 12, 20, .LBB24_2
; PPC32-NEXT: # %bb.1:
; PPC32-NEXT: mr 3, 5
; PPC32-NEXT: .LBB24_2:
; PPC32-NEXT: bclr 12, 20, 0
; PPC32-NEXT: # %bb.3:
; PPC32-NEXT: mr 4, 6
; PPC32-NEXT: blr
;
; PPC64-LABEL: abd_cmp_i64:
; PPC64: # %bb.0:
; PPC64-NEXT: subc 3, 3, 4
; PPC64-NEXT: subfe 4, 3, 3
; PPC64-NEXT: xor 3, 3, 4
; PPC64-NEXT: sub 3, 4, 3
; PPC64-NEXT: blr
%cmp = icmp ult i64 %a, %b
%ab = sub i64 %a, %b
%ba = sub i64 %b, %a
%sel = select i1 %cmp, i64 %ab, i64 %ba
ret i64 %sel
}
define i128 @abd_cmp_i128(i128 %a, i128 %b) nounwind {
; PPC32-LABEL: abd_cmp_i128:
; PPC32: # %bb.0:
; PPC32-NEXT: stwu 1, -16(1)
; PPC32-NEXT: cmplw 3, 7
; PPC32-NEXT: cmplw 1, 4, 8
; PPC32-NEXT: cmplw 5, 5, 9
; PPC32-NEXT: mr 11, 6
; PPC32-NEXT: crand 21, 2, 4
; PPC32-NEXT: cmplw 1, 6, 10
; PPC32-NEXT: subc 6, 6, 10
; PPC32-NEXT: stw 30, 8(1) # 4-byte Folded Spill
; PPC32-NEXT: mr 12, 5
; PPC32-NEXT: mr 0, 4
; PPC32-NEXT: mr 30, 3
; PPC32-NEXT: xor 3, 3, 7
; PPC32-NEXT: xor 4, 4, 8
; PPC32-NEXT: subfe 5, 9, 5
; PPC32-NEXT: or 3, 4, 3
; PPC32-NEXT: subfe 4, 8, 0
; PPC32-NEXT: crandc 23, 0, 2
; PPC32-NEXT: cmplwi 3, 0
; PPC32-NEXT: subfe 3, 7, 30
; PPC32-NEXT: crandc 20, 20, 22
; PPC32-NEXT: crand 22, 22, 4
; PPC32-NEXT: subc 10, 10, 11
; PPC32-NEXT: cror 21, 21, 23
; PPC32-NEXT: cror 20, 22, 20
; PPC32-NEXT: subfe 9, 12, 9
; PPC32-NEXT: crandc 21, 21, 2
; PPC32-NEXT: crand 20, 2, 20
; PPC32-NEXT: subfe 8, 0, 8
; PPC32-NEXT: cror 20, 20, 21
; PPC32-NEXT: subfe 7, 30, 7
; PPC32-NEXT: bc 4, 20, .LBB25_6
; PPC32-NEXT: # %bb.1:
; PPC32-NEXT: bc 4, 20, .LBB25_7
; PPC32-NEXT: .LBB25_2:
; PPC32-NEXT: bc 4, 20, .LBB25_8
; PPC32-NEXT: .LBB25_3:
; PPC32-NEXT: bc 12, 20, .LBB25_5
; PPC32-NEXT: .LBB25_4:
; PPC32-NEXT: mr 6, 10
; PPC32-NEXT: .LBB25_5:
; PPC32-NEXT: lwz 30, 8(1) # 4-byte Folded Reload
; PPC32-NEXT: addi 1, 1, 16
; PPC32-NEXT: blr
; PPC32-NEXT: .LBB25_6:
; PPC32-NEXT: mr 3, 7
; PPC32-NEXT: bc 12, 20, .LBB25_2
; PPC32-NEXT: .LBB25_7:
; PPC32-NEXT: mr 4, 8
; PPC32-NEXT: bc 12, 20, .LBB25_3
; PPC32-NEXT: .LBB25_8:
; PPC32-NEXT: mr 5, 9
; PPC32-NEXT: bc 4, 20, .LBB25_4
; PPC32-NEXT: b .LBB25_5
;
; PPC64-LABEL: abd_cmp_i128:
; PPC64: # %bb.0:
; PPC64-NEXT: mr 7, 4
; PPC64-NEXT: cmpld 1, 4, 6
; PPC64-NEXT: subc 4, 4, 6
; PPC64-NEXT: mr 8, 3
; PPC64-NEXT: cmpld 3, 5
; PPC64-NEXT: subfe 3, 5, 3
; PPC64-NEXT: crandc 20, 0, 2
; PPC64-NEXT: subc 6, 6, 7
; PPC64-NEXT: subfe 5, 8, 5
; PPC64-NEXT: crand 21, 2, 4
; PPC64-NEXT: cror 20, 21, 20
; PPC64-NEXT: bc 12, 20, .LBB25_2
; PPC64-NEXT: # %bb.1:
; PPC64-NEXT: mr 3, 5
; PPC64-NEXT: .LBB25_2:
; PPC64-NEXT: bclr 12, 20, 0
; PPC64-NEXT: # %bb.3:
; PPC64-NEXT: mr 4, 6
; PPC64-NEXT: blr
%cmp = icmp ult i128 %a, %b
%ab = sub i128 %a, %b
%ba = sub i128 %b, %a
%sel = select i1 %cmp, i128 %ab, i128 %ba
ret i128 %sel
}
declare i8 @llvm.abs.i8(i8, i1)
declare i16 @llvm.abs.i16(i16, i1)
declare i32 @llvm.abs.i32(i32, i1)
declare i64 @llvm.abs.i64(i64, i1)
declare i128 @llvm.abs.i128(i128, i1)
declare i8 @llvm.umax.i8(i8, i8)
declare i16 @llvm.umax.i16(i16, i16)
declare i32 @llvm.umax.i32(i32, i32)
declare i64 @llvm.umax.i64(i64, i64)
declare i8 @llvm.umin.i8(i8, i8)
declare i16 @llvm.umin.i16(i16, i16)
declare i32 @llvm.umin.i32(i32, i32)
declare i64 @llvm.umin.i64(i64, i64)