llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-multiple-users.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc -mcpu=sm_100 < %s | FileCheck %s
; RUN: %if ptxas-sm_100 %{ llc < %s -mcpu=sm_100 | %ptxas-verify -arch=sm_100 %}

; NOTE: Currently SETP inversions require all users to be CBranch. However other users like selects
;       can also be processed.
target triple = "nvptx64-nvidia-cuda"

define i32 @test_multiple_users(i32 %a, i32 %b) {
; CHECK-LABEL: test_multiple_users(
; CHECK:       {
; CHECK-NEXT:    .reg .pred %p<3>;
; CHECK-NEXT:    .reg .b32 %r<6>;
; CHECK-EMPTY:
; CHECK-NEXT:  // %bb.0: // %entry
; CHECK-NEXT:    ld.param.b32 %r3, [test_multiple_users_param_1];
; CHECK-NEXT:    ld.param.b32 %r2, [test_multiple_users_param_0];
; CHECK-NEXT:    setp.eq.b32 %p1, %r2, %r3;
; CHECK-NEXT:    mov.b32 %r5, 0;
; CHECK-NEXT:    @%p1 bra $L__BB0_2;
; CHECK-NEXT:  // %bb.1: // %then
; CHECK-NEXT:    mov.b32 %r5, 1;
; CHECK-NEXT:  $L__BB0_2: // %merge1
; CHECK-NEXT:    setp.ne.b32 %p2, %r2, %r3;
; CHECK-NEXT:    selp.b32 %r1, 1, 0, %p2;
; CHECK-NEXT:    @%p2 bra $L__BB0_4;
; CHECK-NEXT:  // %bb.3: // %else
; CHECK-NEXT:    mov.b32 %r5, 0;
; CHECK-NEXT:  $L__BB0_4: // %merge2
; CHECK-NEXT:    add.s32 %r4, %r5, %r1;
; CHECK-NEXT:    st.param.b32 [func_retval0], %r4;
; CHECK-NEXT:    ret;
entry:
  %cmp1 = icmp eq i32 %a, %b
  br i1 %cmp1, label %merge1, label %then

then:
  br label %merge1

merge1:
  %phi1 = phi i32 [ 1, %then ], [ 0, %entry ]
  %cmp2 = icmp ne i32 %a, %b
  %val = select i1 %cmp2, i32 1, i32 0
  br i1 %cmp2, label %merge2, label %else

else:
  br label %merge2

merge2:
  %phi2 = phi i32 [ %phi1, %merge1 ], [ 0, %else ]
  %ret = add i32 %phi2, %val
  ret i32 %ret
}