| ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3 |
| ; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lsx < %s | FileCheck %s |
| ; RUN: llc --mtriple=loongarch64 --mattr=+lsx < %s | FileCheck %s |
| |
| define <16 x i8> @bitrevi_v16i8(<16 x i8> %a) nounwind { |
| ; CHECK-LABEL: bitrevi_v16i8: |
| ; CHECK: # %bb.0: # %entry |
| ; CHECK-NEXT: vbitrevi.b $vr0, $vr0, 2 |
| ; CHECK-NEXT: ret |
| entry: |
| %0 = xor <16 x i8> %a, splat (i8 4) |
| ret <16 x i8> %0 |
| } |
| |
| define <8 x i16> @bitrevi_v8i16(<8 x i16> %a) nounwind { |
| ; CHECK-LABEL: bitrevi_v8i16: |
| ; CHECK: # %bb.0: # %entry |
| ; CHECK-NEXT: vbitrevi.h $vr0, $vr0, 2 |
| ; CHECK-NEXT: ret |
| entry: |
| %0 = xor <8 x i16> %a, splat (i16 4) |
| ret <8 x i16> %0 |
| } |
| |
| define <4 x i32> @bitrevi_v4i32(<4 x i32> %a) nounwind { |
| ; CHECK-LABEL: bitrevi_v4i32: |
| ; CHECK: # %bb.0: # %entry |
| ; CHECK-NEXT: vbitrevi.w $vr0, $vr0, 2 |
| ; CHECK-NEXT: ret |
| entry: |
| %0 = xor <4 x i32> %a, splat (i32 4) |
| ret <4 x i32> %0 |
| } |
| |
| define <2 x i64> @bitrevi_v2i64(<2 x i64> %a) nounwind { |
| ; CHECK-LABEL: bitrevi_v2i64: |
| ; CHECK: # %bb.0: # %entry |
| ; CHECK-NEXT: vbitrevi.d $vr0, $vr0, 2 |
| ; CHECK-NEXT: ret |
| entry: |
| %0 = xor <2 x i64> %a, splat (i64 4) |
| ret <2 x i64> %0 |
| } |
| |
| define <4 x i32> @bitrevi_v16i8_v4i32(<4 x i32> %a) nounwind { |
| ; CHECK-LABEL: bitrevi_v16i8_v4i32: |
| ; CHECK: # %bb.0: # %entry |
| ; CHECK-NEXT: vxori.b $vr0, $vr0, 4 |
| ; CHECK-NEXT: ret |
| entry: |
| %0 = xor <4 x i32> %a, splat (i32 67372036) |
| ret <4 x i32> %0 |
| } |
| |
| define <4 x i32> @bitrevi_v8i16_v4i32(<4 x i32> %a) nounwind { |
| ; CHECK-LABEL: bitrevi_v8i16_v4i32: |
| ; CHECK: # %bb.0: # %entry |
| ; CHECK-NEXT: vbitrevi.h $vr0, $vr0, 2 |
| ; CHECK-NEXT: ret |
| entry: |
| %0 = xor <4 x i32> %a, splat (i32 262148) |
| ret <4 x i32> %0 |
| } |
| |
| define <2 x i64> @bitrevi_v16i8_v2i64(<2 x i64> %a) nounwind { |
| ; CHECK-LABEL: bitrevi_v16i8_v2i64: |
| ; CHECK: # %bb.0: # %entry |
| ; CHECK-NEXT: vxori.b $vr0, $vr0, 4 |
| ; CHECK-NEXT: ret |
| entry: |
| %0 = xor <2 x i64> %a, splat (i64 289360691352306692) |
| ret <2 x i64> %0 |
| } |
| |
| define <2 x i64> @bitrevi_v8i16_v2i64(<2 x i64> %a) nounwind { |
| ; CHECK-LABEL: bitrevi_v8i16_v2i64: |
| ; CHECK: # %bb.0: # %entry |
| ; CHECK-NEXT: vbitrevi.h $vr0, $vr0, 2 |
| ; CHECK-NEXT: ret |
| entry: |
| %0 = xor <2 x i64> %a, splat (i64 1125917086973956) |
| ret <2 x i64> %0 |
| } |
| |
| define <2 x i64> @bitrevi_v4i32_v2i64(<2 x i64> %a) nounwind { |
| ; CHECK-LABEL: bitrevi_v4i32_v2i64: |
| ; CHECK: # %bb.0: # %entry |
| ; CHECK-NEXT: vbitrevi.w $vr0, $vr0, 2 |
| ; CHECK-NEXT: ret |
| entry: |
| %0 = xor <2 x i64> %a, splat (i64 17179869188) |
| ret <2 x i64> %0 |
| } |