llvm/test/CodeGen/LoongArch/lasx/xvexth.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lasx < %s | FileCheck %s --check-prefixes=CHECK,LA32
; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s --check-prefixes=CHECK,LA64

define void @xvexth_h_b(ptr %a, ptr %r) nounwind {
; CHECK-LABEL: xvexth_h_b:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvld $xr0, $a0, 0
; CHECK-NEXT:    xvexth.h.b $xr0, $xr0
; CHECK-NEXT:    xvst $xr0, $a1, 0
; CHECK-NEXT:    ret
entry:
  %0 = load <32 x i8>, ptr %a
  %1 = shufflevector <32 x i8> %0, <32 x i8> poison,
                     <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15,
                                 i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
  %2 = sext <16 x i8> %1 to <16 x i16>
  store <16 x i16> %2, ptr %r
  ret void
}

define void @xvexth_h_b_poison(ptr %a, ptr %r) nounwind {
; CHECK-LABEL: xvexth_h_b_poison:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvld $xr0, $a0, 0
; CHECK-NEXT:    xvexth.h.b $xr0, $xr0
; CHECK-NEXT:    xvst $xr0, $a1, 0
; CHECK-NEXT:    ret
entry:
  %0 = load <32 x i8>, ptr %a
  %1 = shufflevector <32 x i8> %0, <32 x i8> poison,
                     <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 33,
                                 i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 33>
  %2 = sext <16 x i8> %1 to <16 x i16>
  store <16 x i16> %2, ptr %r
  ret void
}

define void @xvexth_w_h(ptr %a, ptr %r) nounwind {
; CHECK-LABEL: xvexth_w_h:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvld $xr0, $a0, 0
; CHECK-NEXT:    xvexth.w.h $xr0, $xr0
; CHECK-NEXT:    xvst $xr0, $a1, 0
; CHECK-NEXT:    ret
entry:
  %0 = load <16 x i16>, ptr %a
  %1 = shufflevector <16 x i16> %0, <16 x i16> poison,
                     <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 12, i32 13, i32 14, i32 15>
  %2 = sext <8 x i16> %1 to <8 x i32>
  store <8 x i32> %2, ptr %r
  ret void
}

define void @xvexth_w_h_poison(ptr %a, ptr %r) nounwind {
; CHECK-LABEL: xvexth_w_h_poison:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvld $xr0, $a0, 0
; CHECK-NEXT:    xvexth.w.h $xr0, $xr0
; CHECK-NEXT:    xvst $xr0, $a1, 0
; CHECK-NEXT:    ret
entry:
  %0 = load <16 x i16>, ptr %a
  %1 = shufflevector <16 x i16> %0, <16 x i16> poison,
                     <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 12, i32 13, i32 14, i32 16>
  %2 = sext <8 x i16> %1 to <8 x i32>
  store <8 x i32> %2, ptr %r
  ret void
}

define void @xvexth_d_w(ptr %a, ptr %r) nounwind {
; CHECK-LABEL: xvexth_d_w:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvld $xr0, $a0, 0
; CHECK-NEXT:    xvexth.d.w $xr0, $xr0
; CHECK-NEXT:    xvst $xr0, $a1, 0
; CHECK-NEXT:    ret
entry:
  %0 = load <8 x i32>, ptr %a
  %1 = shufflevector <8 x i32> %0, <8 x i32> poison,
                     <4 x i32> <i32 2, i32 3, i32 6, i32 7>
  %2 = sext <4 x i32> %1 to <4 x i64>
  store <4 x i64> %2, ptr %r
  ret void
}

define void @xvexth_d_w_poison(ptr %a, ptr %r) nounwind {
; CHECK-LABEL: xvexth_d_w_poison:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvld $xr0, $a0, 0
; CHECK-NEXT:    xvexth.d.w $xr0, $xr0
; CHECK-NEXT:    xvst $xr0, $a1, 0
; CHECK-NEXT:    ret
entry:
  %0 = load <8 x i32>, ptr %a
  %1 = shufflevector <8 x i32> %0, <8 x i32> poison,
                     <4 x i32> <i32 2, i32 3, i32 6, i32 8>
  %2 = sext <4 x i32> %1 to <4 x i64>
  store <4 x i64> %2, ptr %r
  ret void
}

define void @xvexth_q_d(ptr %a, ptr %r) nounwind {
; LA32-LABEL: xvexth_q_d:
; LA32:       # %bb.0: # %entry
; LA32-NEXT:    xvld $xr0, $a0, 0
; LA32-NEXT:    xvpickve2gr.w $a0, $xr0, 2
; LA32-NEXT:    xvpickve2gr.w $a2, $xr0, 6
; LA32-NEXT:    xvpickve2gr.w $a3, $xr0, 7
; LA32-NEXT:    xvpickve2gr.w $a4, $xr0, 3
; LA32-NEXT:    srai.w $a5, $a4, 31
; LA32-NEXT:    srai.w $a6, $a3, 31
; LA32-NEXT:    st.w $a3, $a1, 20
; LA32-NEXT:    st.w $a2, $a1, 16
; LA32-NEXT:    st.w $a4, $a1, 4
; LA32-NEXT:    st.w $a0, $a1, 0
; LA32-NEXT:    st.w $a6, $a1, 28
; LA32-NEXT:    st.w $a6, $a1, 24
; LA32-NEXT:    st.w $a5, $a1, 12
; LA32-NEXT:    st.w $a5, $a1, 8
; LA32-NEXT:    ret
;
; LA64-LABEL: xvexth_q_d:
; LA64:       # %bb.0: # %entry
; LA64-NEXT:    xvld $xr0, $a0, 0
; LA64-NEXT:    xvpickve2gr.d $a0, $xr0, 3
; LA64-NEXT:    xvpickve2gr.d $a2, $xr0, 1
; LA64-NEXT:    srai.d $a2, $a2, 63
; LA64-NEXT:    srai.d $a0, $a0, 63
; LA64-NEXT:    xvstelm.d $xr0, $a1, 16, 3
; LA64-NEXT:    xvstelm.d $xr0, $a1, 0, 1
; LA64-NEXT:    st.d $a0, $a1, 24
; LA64-NEXT:    st.d $a2, $a1, 8
; LA64-NEXT:    ret
entry:
  %0 = load <4 x i64>, ptr %a
  %1 = shufflevector <4 x i64> %0, <4 x i64> poison,
                     <2 x i32> <i32 1, i32 3>
  %2 = sext <2 x i64> %1 to <2 x i128>
  store <2 x i128> %2, ptr %r
  ret void
}

define void @xvexth_hu_bu(ptr %a, ptr %r) nounwind {
; CHECK-LABEL: xvexth_hu_bu:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvld $xr0, $a0, 0
; CHECK-NEXT:    xvexth.hu.bu $xr0, $xr0
; CHECK-NEXT:    xvst $xr0, $a1, 0
; CHECK-NEXT:    ret
entry:
  %0 = load <32 x i8>, ptr %a
  %1 = shufflevector <32 x i8> %0, <32 x i8> poison,
                     <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15,
                                 i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
  %2 = zext <16 x i8> %1 to <16 x i16>
  store <16 x i16> %2, ptr %r
  ret void
}

define void @xvexth_hu_bu_poison(ptr %a, ptr %r) nounwind {
; CHECK-LABEL: xvexth_hu_bu_poison:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvld $xr0, $a0, 0
; CHECK-NEXT:    xvexth.hu.bu $xr0, $xr0
; CHECK-NEXT:    xvst $xr0, $a1, 0
; CHECK-NEXT:    ret
entry:
  %0 = load <32 x i8>, ptr %a
  %1 = shufflevector <32 x i8> %0, <32 x i8> poison,
                     <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 33,
                                 i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 33>
  %2 = zext <16 x i8> %1 to <16 x i16>
  store <16 x i16> %2, ptr %r
  ret void
}

define void @xvexth_wu_hu(ptr %a, ptr %r) nounwind {
; CHECK-LABEL: xvexth_wu_hu:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvld $xr0, $a0, 0
; CHECK-NEXT:    xvexth.wu.hu $xr0, $xr0
; CHECK-NEXT:    xvst $xr0, $a1, 0
; CHECK-NEXT:    ret
entry:
  %0 = load <16 x i16>, ptr %a
  %1 = shufflevector <16 x i16> %0, <16 x i16> poison,
                     <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 12, i32 13, i32 14, i32 15>
  %2 = zext <8 x i16> %1 to <8 x i32>
  store <8 x i32> %2, ptr %r
  ret void
}

define void @xvexth_wu_hu_poison(ptr %a, ptr %r) nounwind {
; CHECK-LABEL: xvexth_wu_hu_poison:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvld $xr0, $a0, 0
; CHECK-NEXT:    xvexth.wu.hu $xr0, $xr0
; CHECK-NEXT:    xvst $xr0, $a1, 0
; CHECK-NEXT:    ret
entry:
  %0 = load <16 x i16>, ptr %a
  %1 = shufflevector <16 x i16> %0, <16 x i16> poison,
                     <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 12, i32 13, i32 14, i32 16>
  %2 = zext <8 x i16> %1 to <8 x i32>
  store <8 x i32> %2, ptr %r
  ret void
}

define void @xvexth_du_wu(ptr %a, ptr %r) nounwind {
; CHECK-LABEL: xvexth_du_wu:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvld $xr0, $a0, 0
; CHECK-NEXT:    xvexth.du.wu $xr0, $xr0
; CHECK-NEXT:    xvst $xr0, $a1, 0
; CHECK-NEXT:    ret
entry:
  %0 = load <8 x i32>, ptr %a
  %1 = shufflevector <8 x i32> %0, <8 x i32> poison,
                     <4 x i32> <i32 2, i32 3, i32 6, i32 7>
  %2 = zext <4 x i32> %1 to <4 x i64>
  store <4 x i64> %2, ptr %r
  ret void
}

define void @xvexth_qu_du(ptr %a, ptr %r) nounwind {
; LA32-LABEL: xvexth_qu_du:
; LA32:       # %bb.0: # %entry
; LA32-NEXT:    xvld $xr0, $a0, 0
; LA32-NEXT:    xvpickve2gr.w $a0, $xr0, 2
; LA32-NEXT:    xvpickve2gr.w $a2, $xr0, 3
; LA32-NEXT:    xvpickve2gr.w $a3, $xr0, 6
; LA32-NEXT:    xvpickve2gr.w $a4, $xr0, 7
; LA32-NEXT:    st.w $zero, $a1, 28
; LA32-NEXT:    st.w $zero, $a1, 24
; LA32-NEXT:    st.w $zero, $a1, 12
; LA32-NEXT:    st.w $zero, $a1, 8
; LA32-NEXT:    st.w $a4, $a1, 20
; LA32-NEXT:    st.w $a3, $a1, 16
; LA32-NEXT:    st.w $a2, $a1, 4
; LA32-NEXT:    st.w $a0, $a1, 0
; LA32-NEXT:    ret
;
; LA64-LABEL: xvexth_qu_du:
; LA64:       # %bb.0: # %entry
; LA64-NEXT:    xvld $xr0, $a0, 0
; LA64-NEXT:    st.d $zero, $a1, 24
; LA64-NEXT:    xvstelm.d $xr0, $a1, 16, 3
; LA64-NEXT:    st.d $zero, $a1, 8
; LA64-NEXT:    xvstelm.d $xr0, $a1, 0, 1
; LA64-NEXT:    ret
entry:
  %0 = load <4 x i64>, ptr %a
  %1 = shufflevector <4 x i64> %0, <4 x i64> poison,
                     <2 x i32> <i32 1, i32 3>
  %2 = zext <2 x i64> %1 to <2 x i128>
  store <2 x i128> %2, ptr %r
  ret void
}

define void @xvexth_du_wu_poison(ptr %a, ptr %r) nounwind {
; CHECK-LABEL: xvexth_du_wu_poison:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvld $xr0, $a0, 0
; CHECK-NEXT:    xvexth.du.wu $xr0, $xr0
; CHECK-NEXT:    xvst $xr0, $a1, 0
; CHECK-NEXT:    ret
entry:
  %0 = load <8 x i32>, ptr %a
  %1 = shufflevector <8 x i32> %0, <8 x i32> poison,
                     <4 x i32> <i32 2, i32 3, i32 6, i32 8>
  %2 = zext <4 x i32> %1 to <4 x i64>
  store <4 x i64> %2, ptr %r
  ret void
}