| ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3 |
| ; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lasx < %s | FileCheck %s |
| ; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s |
| |
| define <32 x i8> @bitsel_v32i8(<32 x i8> %a, <32 x i8> %b, <32 x i8> %c) nounwind { |
| ; CHECK-LABEL: bitsel_v32i8: |
| ; CHECK: # %bb.0: # %entry |
| ; CHECK-NEXT: xvbitsel.v $xr0, $xr0, $xr1, $xr2 |
| ; CHECK-NEXT: ret |
| entry: |
| %0 = and <32 x i8> %c, %b |
| %1 = xor <32 x i8> %c, splat (i8 -1) |
| %2 = and <32 x i8> %a, %1 |
| %3 = or <32 x i8> %0, %2 |
| ret <32 x i8> %3 |
| } |
| |
| define <16 x i16> @bitsel_v16i16(<16 x i16> %a, <16 x i16> %b, <16 x i16> %c) nounwind { |
| ; CHECK-LABEL: bitsel_v16i16: |
| ; CHECK: # %bb.0: # %entry |
| ; CHECK-NEXT: xvbitsel.v $xr0, $xr0, $xr1, $xr2 |
| ; CHECK-NEXT: ret |
| entry: |
| %0 = and <16 x i16> %c, %b |
| %1 = xor <16 x i16> %c, splat (i16 -1) |
| %2 = and <16 x i16> %a, %1 |
| %3 = or <16 x i16> %0, %2 |
| ret <16 x i16> %3 |
| } |
| |
| define <8 x i32> @bitsel_v8i32(<8 x i32> %a, <8 x i32> %b, <8 x i32> %c) nounwind { |
| ; CHECK-LABEL: bitsel_v8i32: |
| ; CHECK: # %bb.0: # %entry |
| ; CHECK-NEXT: xvbitsel.v $xr0, $xr0, $xr1, $xr2 |
| ; CHECK-NEXT: ret |
| entry: |
| %0 = and <8 x i32> %c, %b |
| %1 = xor <8 x i32> %c, splat (i32 -1) |
| %2 = and <8 x i32> %a, %1 |
| %3 = or <8 x i32> %0, %2 |
| ret <8 x i32> %3 |
| } |
| |
| define <4 x i64> @bitsel_v4i64(<4 x i64> %a, <4 x i64> %b, <4 x i64> %c) nounwind { |
| ; CHECK-LABEL: bitsel_v4i64: |
| ; CHECK: # %bb.0: # %entry |
| ; CHECK-NEXT: xvbitsel.v $xr0, $xr0, $xr1, $xr2 |
| ; CHECK-NEXT: ret |
| entry: |
| %0 = and <4 x i64> %c, %b |
| %1 = xor <4 x i64> %c, splat (i64 -1) |
| %2 = and <4 x i64> %a, %1 |
| %3 = or <4 x i64> %0, %2 |
| ret <4 x i64> %3 |
| } |
| |
| define <32 x i8> @bitsel_v32i8_1(<32 x i8> %a, <32 x i8> %b) nounwind { |
| ; CHECK-LABEL: bitsel_v32i8_1: |
| ; CHECK: # %bb.0: # %entry |
| ; CHECK-NEXT: xvbitseli.b $xr0, $xr1, 1 |
| ; CHECK-NEXT: ret |
| entry: |
| %0 = and <32 x i8> %a, splat (i8 1) |
| %1 = xor <32 x i8> %a, splat (i8 -1) |
| %2 = and <32 x i8> %b, %1 |
| %3 = or <32 x i8> %0, %2 |
| ret <32 x i8> %3 |
| } |