llvm/test/CodeGen/LoongArch/crc.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc --mtriple=loongarch64 < %s | FileCheck %s

define i32 @crc_w_b_w(i8 signext %a, i32 signext %b) nounwind {
; CHECK-LABEL: crc_w_b_w:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    crc.w.b.w $a0, $a0, $a1
; CHECK-NEXT:    ret
entry:
  %0 = zext i8 %a to i32
  %1 = call i32 @llvm.loongarch.crc.w.b.w(i32 %0, i32 %b)
  ret i32 %1
}

define i32 @crc_w_h_w(i16 signext %a, i32 signext %b) nounwind {
; CHECK-LABEL: crc_w_h_w:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    crc.w.h.w $a0, $a0, $a1
; CHECK-NEXT:    ret
entry:
  %0 = zext i16 %a to i32
  %1 = call i32 @llvm.loongarch.crc.w.h.w(i32 %0, i32 %b)
  ret i32 %1
}

define i32 @crcc_w_b_w(i8 signext %a, i32 signext %b) nounwind {
; CHECK-LABEL: crcc_w_b_w:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    crcc.w.b.w $a0, $a0, $a1
; CHECK-NEXT:    ret
entry:
  %0 = zext i8 %a to i32
  %1 = call i32 @llvm.loongarch.crcc.w.b.w(i32 %0, i32 %b)
  ret i32 %1
}

define i32 @crcc_w_h_w(i16 signext %a, i32 signext %b) nounwind {
; CHECK-LABEL: crcc_w_h_w:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    crcc.w.h.w $a0, $a0, $a1
; CHECK-NEXT:    ret
entry:
  %0 = zext i16 %a to i32
  %1 = call i32 @llvm.loongarch.crcc.w.h.w(i32 %0, i32 %b)
  ret i32 %1
}