llvm/test/CodeGen/LoongArch/branch-opt.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc --mtriple=loongarch32 -mattr=-32s,+d --verify-machineinstrs < %s | FileCheck %s
; RUN: llc --mtriple=loongarch32 -mattr=+32s,+d --verify-machineinstrs < %s | FileCheck %s
; RUN: llc --mtriple=loongarch64 -mattr=+d --verify-machineinstrs < %s | FileCheck %s

define i32 @br_eq() nounwind {
; CHECK-LABEL: br_eq:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    move $a0, $zero
; CHECK-NEXT:    ret
entry:
  %1 = icmp eq i32 0, 0
  br i1 %1, label %2, label %3
2:
  ret i32 0
3:
  ret i32 1
}

define i32 @br_ne() nounwind {
; CHECK-LABEL: br_ne:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    ori $a0, $zero, 1
; CHECK-NEXT:    ret
entry:
  %1 = icmp ne i32 0, 1
  br i1 %1, label %3, label %2
2:
  ret i32 0
3:
  ret i32 1
}

define i32 @br_lt() nounwind {
; CHECK-LABEL: br_lt:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    move $a0, $zero
; CHECK-NEXT:    ret
entry:
  %1 = icmp slt i32 0, 1
  br i1 %1, label %2, label %3
2:
  ret i32 0
3:
  ret i32 1
}

define i32 @br_le() nounwind {
; CHECK-LABEL: br_le:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    move $a0, $zero
; CHECK-NEXT:    ret
entry:
  %1 = icmp sle i32 0, 1
  br i1 %1, label %2, label %3
2:
  ret i32 0
3:
  ret i32 1
}

define i32 @br_gt() nounwind {
; CHECK-LABEL: br_gt:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    ori $a0, $zero, 1
; CHECK-NEXT:    ret
entry:
  %1 = icmp sgt i32 1, 0
  br i1 %1, label %3, label %2
2:
  ret i32 0
3:
  ret i32 1
}

define i32 @br_ge() nounwind {
; CHECK-LABEL: br_ge:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    ori $a0, $zero, 1
; CHECK-NEXT:    ret
entry:
  %1 = icmp sge i32 1, 0
  br i1 %1, label %3, label %2
2:
  ret i32 0
3:
  ret i32 1
}

define i32 @br_ltu() nounwind {
; CHECK-LABEL: br_ltu:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    move $a0, $zero
; CHECK-NEXT:    ret
entry:
  %1 = icmp ult i32 0, 1
  br i1 %1, label %2, label %3
2:
  ret i32 0
3:
  ret i32 1
}

define i32 @br_leu() nounwind {
; CHECK-LABEL: br_leu:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    move $a0, $zero
; CHECK-NEXT:    ret
entry:
  %1 = icmp ule i32 0, 1
  br i1 %1, label %2, label %3
2:
  ret i32 0
3:
  ret i32 1
}

define i32 @br_gtu() nounwind {
; CHECK-LABEL: br_gtu:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    ori $a0, $zero, 1
; CHECK-NEXT:    ret
entry:
  %1 = icmp ugt i32 1, 0
  br i1 %1, label %3, label %2
2:
  ret i32 0
3:
  ret i32 1
}
define i32 @br_geu() nounwind {
; CHECK-LABEL: br_geu:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    ori $a0, $zero, 1
; CHECK-NEXT:    ret
entry:
  %1 = icmp uge i32 1, 0
  br i1 %1, label %3, label %2
2:
  ret i32 0
3:
  ret i32 1
}