| # RUN: llc -mtriple=amdgpu9.50-amd-amdhsa -verify-misched -run-pass=machine-scheduler -misched-only-block=2 -filetype=null %s |
| # REQUIRES: asserts |
| |
| # This used to assert while moving a dead subregister def upward. The moved |
| # def retagged a following live-range segment to the same value number as the |
| # previous segment, but did not join the adjacent segments. This is a reduced |
| # MIR test, but it still needs the surrounding scheduler context to reproduce |
| # the problematic move. |
| |
| --- | |
| define amdgpu_kernel void @rock_attention(ptr addrspace(1) inreg %0, ptr addrspace(1) inreg %1, ptr addrspace(1) inreg %2, ptr addrspace(1) inreg %3, ptr addrspace(1) inreg %4, ptr addrspace(1) inreg %5) #0 { |
| ret void |
| } |
| attributes #0 = { nounwind "amdgpu-cluster-dims"="1,1,1" "amdgpu-flat-work-group-size"="1,64" "uniform-work-group-size" } |
| ... |
| --- |
| name: rock_attention |
| alignment: 4 |
| tracksRegLiveness: true |
| noPhis: true |
| isSSA: false |
| noVRegs: false |
| hasFakeUses: false |
| registers: |
| - { id: 2, class: sreg_64 } |
| - { id: 3, class: sreg_64 } |
| - { id: 4, class: sreg_64 } |
| liveins: |
| - { reg: '$vgpr0', virtual-reg: '%0' } |
| - { reg: '$sgpr4_sgpr5', virtual-reg: '%1' } |
| - { reg: '$sgpr8_sgpr9', virtual-reg: '%2' } |
| - { reg: '$sgpr10_sgpr11', virtual-reg: '%3' } |
| - { reg: '$sgpr12_sgpr13', virtual-reg: '%4' } |
| - { reg: '$sgpr14_sgpr15', virtual-reg: '%5' } |
| - { reg: '$sgpr16', virtual-reg: '%6' } |
| frameInfo: |
| maxAlignment: 1 |
| machineFunctionInfo: |
| explicitKernArgSize: 48 |
| maxKernArgAlign: 8 |
| ldsSize: 51552 |
| isEntryFunction: true |
| numWaveDispatchSGPRs: 16 |
| stackPtrOffsetReg: '$sgpr32' |
| argumentInfo: |
| dispatchPtr: { reg: '$sgpr0_sgpr1' } |
| queuePtr: { reg: '$sgpr2_sgpr3' } |
| kernargSegmentPtr: { reg: '$sgpr4_sgpr5' } |
| dispatchID: { reg: '$sgpr6_sgpr7' } |
| firstKernArgPreloadReg: { reg: '$sgpr8' } |
| workGroupIDX: { reg: '$sgpr16' } |
| workGroupIDY: { reg: '$sgpr17' } |
| workGroupIDZ: { reg: '$sgpr18' } |
| workItemIDX: { reg: '$vgpr0', mask: 1023 } |
| workItemIDY: { reg: '$vgpr0', mask: 1047552 } |
| workItemIDZ: { reg: '$vgpr0', mask: 1072693248 } |
| occupancy: 1 |
| sgprForEXECCopy: '$sgpr100_sgpr101' |
| numKernargPreloadSGPRs: 8 |
| body: | |
| bb.0: |
| liveins: $vgpr0, $sgpr4_sgpr5, $sgpr8_sgpr9, $sgpr10_sgpr11, $sgpr12_sgpr13, $sgpr14_sgpr15, $sgpr16 |
| |
| %6:sgpr_32 = COPY $sgpr16 |
| %5:sreg_64_xexec_xnull = COPY $sgpr14_sgpr15 |
| undef %7.sub0_sub1:sgpr_128 = COPY $sgpr12_sgpr13 |
| undef %8.sub0_sub1:sgpr_128 = COPY $sgpr10_sgpr11 |
| undef %9.sub0_sub1:sgpr_128 = COPY $sgpr8_sgpr9 |
| %1:sgpr_64(p4) = COPY $sgpr4_sgpr5 |
| %0:vgpr_32(s32) = COPY $vgpr0 |
| %10:sgpr_128 = S_LOAD_DWORDX4_IMM %1(p4), 32, 0 |
| %11:vgpr_32 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %12:sreg_32 = S_MOV_B32 45408 |
| %13:sreg_32 = S_MOV_B32 32768 |
| %14:sreg_32 = S_MOV_B32 47456 |
| %15:sreg_32 = S_MOV_B32 36992 |
| %16:sreg_32 = S_LSHR_B32 %6, 2, implicit-def dead $scc |
| %17:sreg_32 = S_MOV_B32 1 |
| %18:sreg_32 = S_LSHL_B32 %6, 1, implicit-def dead $scc |
| %19:sreg_32 = S_AND_B32 %18, 6, implicit-def dead $scc |
| %20:sreg_32 = nuw nsw S_ADD_I32 %19, %16, implicit-def dead $scc |
| S_CMP_GT_I32 %6, 7, implicit-def $scc |
| %21:sreg_32 = S_CSELECT_B32 %6, %20, implicit killed $scc |
| %22:vgpr_32 = V_AND_B32_e32 1023, %0(s32), implicit $exec |
| %23:vgpr_32 = V_AND_B32_e32 15, %0(s32), implicit $exec |
| %24:vgpr_32 = V_AND_B32_e32 32, %0(s32), implicit $exec |
| %25:vgpr_32 = V_AND_B32_e32 1, %0(s32), implicit $exec |
| %26:vgpr_32 = V_AND_B32_e32 48, %0(s32), implicit $exec |
| %27:sreg_64_xexec = V_CMP_GT_U32_e64 7, %22, implicit $exec |
| %28:sreg_32 = S_MUL_I32 %21, 112 |
| %29:vgpr_32 = nuw nsw V_LSHLREV_B32_e32 4, %22, implicit $exec |
| %30:vgpr_32 = disjoint V_OR_B32_e32 1024, %29, implicit $exec |
| %31:vgpr_32 = V_ADD_U32_e32 %28, %29, implicit $exec |
| %9.sub1:sgpr_128 = S_AND_B32 %9.sub1, 65535, implicit-def dead $scc |
| %9.sub3:sgpr_128 = S_MOV_B32 159744 |
| %9.sub2:sgpr_128 = S_MOV_B32 2147483646 |
| %32:vgpr_32 = V_MOV_B32_e32 -2147483648, implicit $exec |
| %33:vgpr_32 = V_CNDMASK_B32_e64 0, %32, 0, %31, %27, implicit $exec |
| %34:sreg_32 = S_MOV_B32 0 |
| %35:av_128_align2 = BUFFER_LOAD_DWORDX4_OFFEN %33, %9, 0, 0, 0, 0, implicit $exec |
| %36:av_128_align2 = BUFFER_LOAD_DWORDX4_OFFEN %32, %9, 0, 0, 0, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %29, %35, 0, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %29, %36, 1024, 0, implicit $exec |
| S_WAITCNT 49279 |
| WAVE_BARRIER |
| %37:vgpr_32 = nuw nsw V_LSHLREV_B32_e32 1, %24, implicit $exec |
| %38:vreg_128_align2 = DS_READ_B128_gfx9 %37, 0, 0, implicit $exec |
| %39:vreg_128_align2 = DS_READ_B128_gfx9 %37, 16, 0, implicit $exec |
| %40:vreg_128_align2 = DS_READ_B128_gfx9 %37, 32, 0, implicit $exec |
| %41:vreg_128_align2 = DS_READ_B128_gfx9 %37, 48, 0, implicit $exec |
| %42:vreg_128_align2 = DS_READ_B128_gfx9 %37, 128, 0, implicit $exec |
| %43:vreg_128_align2 = DS_READ_B128_gfx9 %37, 144, 0, implicit $exec |
| %44:vreg_128_align2 = DS_READ_B128_gfx9 %37, 160, 0, implicit $exec |
| %45:vreg_128_align2 = DS_READ_B128_gfx9 %37, 176, 0, implicit $exec |
| %46:vreg_128_align2 = DS_READ_B128_gfx9 %37, 256, 0, implicit $exec |
| %47:vreg_128_align2 = DS_READ_B128_gfx9 %37, 272, 0, implicit $exec |
| %48:vreg_128_align2 = DS_READ_B128_gfx9 %37, 288, 0, implicit $exec |
| %49:vreg_128_align2 = DS_READ_B128_gfx9 %37, 304, 0, implicit $exec |
| %50:vreg_128_align2 = DS_READ_B128_gfx9 %37, 384, 0, implicit $exec |
| %51:vreg_128_align2 = DS_READ_B128_gfx9 %37, 400, 0, implicit $exec |
| %52:vreg_128_align2 = DS_READ_B128_gfx9 %37, 416, 0, implicit $exec |
| %53:vreg_128_align2 = DS_READ_B128_gfx9 %37, 432, 0, implicit $exec |
| %54:vreg_128_align2 = DS_READ_B128_gfx9 %37, 512, 0, implicit $exec |
| %55:vreg_128_align2 = DS_READ_B128_gfx9 %37, 528, 0, implicit $exec |
| %56:vreg_128_align2 = DS_READ_B128_gfx9 %37, 544, 0, implicit $exec |
| %57:vreg_128_align2 = DS_READ_B128_gfx9 %37, 560, 0, implicit $exec |
| %58:vreg_128_align2 = DS_READ_B128_gfx9 %37, 640, 0, implicit $exec |
| %59:vreg_128_align2 = DS_READ_B128_gfx9 %37, 656, 0, implicit $exec |
| %60:vreg_128_align2 = DS_READ_B128_gfx9 %37, 672, 0, implicit $exec |
| %61:vreg_128_align2 = DS_READ_B128_gfx9 %37, 688, 0, implicit $exec |
| %62:vreg_128_align2 = DS_READ_B128_gfx9 %37, 768, 0, implicit $exec |
| %63:vreg_128_align2 = DS_READ_B128_gfx9 %37, 784, 0, implicit $exec |
| %64:vreg_128_align2 = DS_READ_B128_gfx9 %37, 800, 0, implicit $exec |
| %65:vreg_128_align2 = DS_READ_B128_gfx9 %37, 816, 0, implicit $exec |
| %66:vreg_128_align2 = DS_READ_B128_gfx9 %37, 896, 0, implicit $exec |
| %67:vreg_128_align2 = DS_READ_B128_gfx9 %37, 912, 0, implicit $exec |
| %68:vreg_128_align2 = DS_READ_B128_gfx9 %37, 928, 0, implicit $exec |
| %69:vreg_128_align2 = DS_READ_B128_gfx9 %37, 944, 0, implicit $exec |
| %70:vreg_128_align2 = DS_READ_B128_gfx9 %37, 1024, 0, implicit $exec |
| %71:vreg_128_align2 = DS_READ_B128_gfx9 %37, 1040, 0, implicit $exec |
| %72:vreg_128_align2 = DS_READ_B128_gfx9 %37, 1056, 0, implicit $exec |
| %73:vreg_128_align2 = DS_READ_B128_gfx9 %37, 1072, 0, implicit $exec |
| %74:vreg_128_align2 = DS_READ_B128_gfx9 %37, 1152, 0, implicit $exec |
| %75:vreg_128_align2 = DS_READ_B128_gfx9 %37, 1168, 0, implicit $exec |
| %76:vreg_128_align2 = DS_READ_B128_gfx9 %37, 1184, 0, implicit $exec |
| %77:vreg_128_align2 = DS_READ_B128_gfx9 %37, 1200, 0, implicit $exec |
| %78:vreg_128_align2 = DS_READ_B128_gfx9 %37, 1280, 0, implicit $exec |
| %79:vreg_128_align2 = DS_READ_B128_gfx9 %37, 1296, 0, implicit $exec |
| %80:vreg_128_align2 = DS_READ_B128_gfx9 %37, 1312, 0, implicit $exec |
| %81:vreg_128_align2 = DS_READ_B128_gfx9 %37, 1328, 0, implicit $exec |
| %82:vreg_128_align2 = DS_READ_B128_gfx9 %37, 1408, 0, implicit $exec |
| %83:vreg_128_align2 = DS_READ_B128_gfx9 %37, 1424, 0, implicit $exec |
| %84:vreg_128_align2 = DS_READ_B128_gfx9 %37, 1440, 0, implicit $exec |
| %85:vreg_128_align2 = DS_READ_B128_gfx9 %37, 1456, 0, implicit $exec |
| %86:vreg_128_align2 = DS_READ_B128_gfx9 %37, 1536, 0, implicit $exec |
| %87:vreg_128_align2 = DS_READ_B128_gfx9 %37, 1552, 0, implicit $exec |
| %88:vreg_128_align2 = DS_READ_B128_gfx9 %37, 1568, 0, implicit $exec |
| %89:vreg_128_align2 = DS_READ_B128_gfx9 %37, 1584, 0, implicit $exec |
| %90:vreg_128_align2 = DS_READ_B128_gfx9 %37, 1664, 0, implicit $exec |
| %91:vreg_128_align2 = DS_READ_B128_gfx9 %37, 1680, 0, implicit $exec |
| %92:vreg_128_align2 = DS_READ_B128_gfx9 %37, 1696, 0, implicit $exec |
| %93:vreg_128_align2 = DS_READ_B128_gfx9 %37, 1712, 0, implicit $exec |
| %94:vreg_128_align2 = DS_READ_B128_gfx9 %37, 1792, 0, implicit $exec |
| %95:vreg_128_align2 = DS_READ_B128_gfx9 %37, 1808, 0, implicit $exec |
| %96:vreg_128_align2 = DS_READ_B128_gfx9 %37, 1824, 0, implicit $exec |
| %97:vreg_128_align2 = DS_READ_B128_gfx9 %37, 1840, 0, implicit $exec |
| %98:vreg_128_align2 = DS_READ_B128_gfx9 %37, 1920, 0, implicit $exec |
| %99:vreg_128_align2 = DS_READ_B128_gfx9 %37, 1936, 0, implicit $exec |
| %100:vreg_128_align2 = DS_READ_B128_gfx9 %37, 1952, 0, implicit $exec |
| %101:vreg_128_align2 = DS_READ_B128_gfx9 %37, 1968, 0, implicit $exec |
| %102:vgpr_32 = GLOBAL_LOAD_UBYTE_SADDR %5, %11, 0, 0, implicit $exec |
| %103:sreg_32_xm0 = V_READFIRSTLANE_B32 %102, implicit $exec |
| %104:vgpr_32 = GLOBAL_LOAD_USHORT_SADDR %10.sub0_sub1, %11, 0, 0, implicit $exec |
| %105:sreg_32 = S_LSHL_B32 %21, 16, implicit-def dead $scc |
| %106:vgpr_32 = disjoint V_OR_B32_e32 %105, %29, implicit $exec |
| %107:vgpr_32 = disjoint V_OR_B32_e32 %105, %30, implicit $exec |
| %8.sub1:sgpr_128 = S_AND_B32 %8.sub1, 65535, implicit-def dead $scc |
| %8.sub2:sgpr_128 = COPY %9.sub2 |
| %8.sub3:sgpr_128 = COPY %9.sub3 |
| $m0 = S_MOV_B32 45408 |
| BUFFER_LOAD_DWORDX4_LDS_OFFEN %106, %8, 0, 0, 0, 0, 1, implicit $exec, implicit $m0 |
| $m0 = S_MOV_B32 46432 |
| BUFFER_LOAD_DWORDX4_LDS_OFFEN %107, %8, 0, 0, 0, 0, 1, implicit $exec, implicit $m0 |
| %108:vgpr_32 = nuw nsw V_LSHLREV_B32_e32 3, %22, implicit $exec |
| %109:vgpr_32 = disjoint V_OR_B32_e32 512, %108, implicit $exec |
| %110:vgpr_32 = disjoint V_OR_B32_e32 1024, %108, implicit $exec |
| %111:vgpr_32 = V_OR_B32_e32 1536, %108, implicit $exec |
| %112:vgpr_32 = disjoint V_OR_B32_e32 %105, %108, implicit $exec |
| %113:vgpr_32 = disjoint V_OR_B32_e32 %105, %109, implicit $exec |
| %114:vgpr_32 = disjoint V_OR_B32_e32 %105, %110, implicit $exec |
| %115:vgpr_32 = disjoint V_OR_B32_e32 %105, %111, implicit $exec |
| %7.sub1:sgpr_128 = S_AND_B32 %7.sub1, 65535, implicit-def dead $scc |
| %7.sub2:sgpr_128 = COPY %9.sub2 |
| %7.sub3:sgpr_128 = COPY %9.sub3 |
| %116:vgpr_32 = V_LSHLREV_B32_e32 1, %112, implicit $exec |
| $m0 = S_MOV_B32 32768 |
| BUFFER_LOAD_DWORDX4_LDS_OFFEN %116, %7, 0, 0, 0, 0, 1, implicit $exec, implicit $m0 |
| %117:vgpr_32 = V_LSHLREV_B32_e32 1, %113, implicit $exec |
| $m0 = S_MOV_B32 33824 |
| BUFFER_LOAD_DWORDX4_LDS_OFFEN %117, %7, 0, 0, 0, 0, 1, implicit $exec, implicit $m0 |
| %118:vgpr_32 = V_LSHLREV_B32_e32 1, %114, implicit $exec |
| $m0 = S_MOV_B32 34880 |
| BUFFER_LOAD_DWORDX4_LDS_OFFEN %118, %7, 0, 0, 0, 0, 1, implicit $exec, implicit $m0 |
| %119:vgpr_32 = V_LSHLREV_B32_e32 1, %115, implicit $exec |
| $m0 = S_MOV_B32 35936 |
| BUFFER_LOAD_DWORDX4_LDS_OFFEN %119, %7, 0, 0, 0, 0, 1, implicit $exec, implicit $m0 |
| %120:sreg_32 = disjoint S_OR_B32 %105, 2048, implicit-def dead $scc |
| %121:vgpr_32 = disjoint V_OR_B32_e32 %120, %29, implicit $exec |
| %122:vgpr_32 = disjoint V_OR_B32_e32 %120, %30, implicit $exec |
| S_WAITCNT 49279 |
| WAVE_BARRIER |
| $m0 = S_MOV_B32 47456 |
| BUFFER_LOAD_DWORDX4_LDS_OFFEN %121, %8, 0, 0, 0, 0, 1, implicit $exec, implicit $m0 |
| $m0 = S_MOV_B32 48480 |
| BUFFER_LOAD_DWORDX4_LDS_OFFEN %122, %8, 0, 0, 0, 0, 1, implicit $exec, implicit $m0 |
| %123:vgpr_32 = disjoint V_OR_B32_e32 %120, %108, implicit $exec |
| %124:vgpr_32 = disjoint V_OR_B32_e32 %120, %109, implicit $exec |
| %125:vgpr_32 = disjoint V_OR_B32_e32 %120, %110, implicit $exec |
| %126:vgpr_32 = V_OR_B32_e32 %120, %111, implicit $exec |
| %127:vgpr_32 = V_LSHLREV_B32_e32 1, %123, implicit $exec |
| $m0 = S_MOV_B32 36992 |
| BUFFER_LOAD_DWORDX4_LDS_OFFEN %127, %7, 0, 0, 0, 0, 1, implicit $exec, implicit $m0 |
| %128:vgpr_32 = V_LSHLREV_B32_e32 1, %124, implicit $exec |
| $m0 = S_MOV_B32 38048 |
| BUFFER_LOAD_DWORDX4_LDS_OFFEN %128, %7, 0, 0, 0, 0, 1, implicit $exec, implicit $m0 |
| %129:vgpr_32 = V_LSHLREV_B32_e32 1, %125, implicit $exec |
| $m0 = S_MOV_B32 39104 |
| BUFFER_LOAD_DWORDX4_LDS_OFFEN %129, %7, 0, 0, 0, 0, 1, implicit $exec, implicit $m0 |
| %130:vgpr_32 = V_LSHLREV_B32_e32 1, %126, implicit $exec |
| $m0 = S_MOV_B32 40160 |
| BUFFER_LOAD_DWORDX4_LDS_OFFEN %130, %7, 0, 0, 0, 0, 1, implicit $exec, implicit $m0 |
| S_WAITCNT 49279 |
| WAVE_BARRIER |
| %131:sreg_32 = disjoint S_OR_B32 %105, 4096, implicit-def dead $scc |
| %132:vgpr_32 = nuw nsw V_LSHLREV_B32_e32 6, %22, implicit $exec |
| %133:vgpr_32 = V_AND_B32_e32 1984, %132, implicit $exec |
| %134:vgpr_32 = V_AND_B32_e32 304, %29, implicit $exec |
| %135:vgpr_32 = V_LSHL_OR_B32_e64 %22, 8, %108, implicit $exec |
| %136:vgpr_32 = V_AND_B32_e32 64, %108, implicit $exec |
| %137:vgpr_32 = nuw nsw V_LSHLREV_B32_e32 2, %24, implicit $exec |
| %138:sreg_32 = S_MOV_B32 1088 |
| %139:vgpr_32 = disjoint V_AND_OR_B32_e64 %135, %138, %137, implicit $exec |
| %140:vgpr_32 = disjoint V_OR_B32_e32 %139, %134, implicit $exec |
| %141:sreg_32 = S_MOV_B32 576 |
| %142:vgpr_32 = V_BITOP3_B32_e64 %139, %141, %134, 54, implicit $exec |
| %143:vgpr_32 = nuw nsw V_LSHLREV_B32_e32 2, %22, implicit $exec |
| %144:vgpr_32 = V_AND_B32_e32 48, %143, implicit $exec |
| %145:vgpr_32 = V_BFE_I32_e64 %0(s32), 1, 1, implicit $exec |
| %146:vgpr_32 = V_AND_B32_e32 576, %145, implicit $exec |
| %147:vgpr_32 = V_AND_B32_e32 1024, %132, implicit $exec |
| %148:vgpr_32 = V_BITOP3_B32_e64 %146, %37, %144, 54, implicit $exec |
| %149:vgpr_32 = disjoint V_LSHL_OR_B32_e64 %25, 11, %147, implicit $exec |
| %150:vgpr_32 = nuw nsw V_LSHLREV_B32_e32 4, %23, implicit $exec |
| %151:vgpr_32 = V_LSHLREV_B32_e32 1, %22, implicit $exec |
| %152:vgpr_32 = V_XOR_B32_e32 264, %151, implicit $exec |
| %153:vgpr_32 = V_XOR_B32_e32 528, %151, implicit $exec |
| %154:vgpr_32 = V_XOR_B32_e32 792, %151, implicit $exec |
| %155:vgpr_32 = V_XOR_B32_e32 1056, %151, implicit $exec |
| %156:vgpr_32 = V_XOR_B32_e32 1320, %151, implicit $exec |
| %157:vgpr_32 = V_XOR_B32_e32 1584, %151, implicit $exec |
| %158:vgpr_32 = V_XOR_B32_e32 1848, %151, implicit $exec |
| %159:vgpr_32 = V_XOR_B32_e32 2112, %151, implicit $exec |
| %160:vgpr_32 = V_XOR_B32_e32 2376, %151, implicit $exec |
| %161:vgpr_32 = V_XOR_B32_e32 2640, %151, implicit $exec |
| %162:vgpr_32 = V_XOR_B32_e32 2904, %151, implicit $exec |
| %163:vgpr_32 = V_XOR_B32_e32 3168, %151, implicit $exec |
| %164:vgpr_32 = V_XOR_B32_e32 3432, %151, implicit $exec |
| %165:vgpr_32 = V_XOR_B32_e32 3696, %151, implicit $exec |
| %166:vgpr_32 = V_XOR_B32_e32 3960, %151, implicit $exec |
| %167:vgpr_32 = exact V_LSHRREV_B32_e32 1, %26, implicit $exec |
| %168:vgpr_32 = V_MUL_U32_U24_e32 264, %23, implicit $exec |
| %169:vgpr_32 = V_XOR_B32_e32 %168, %167, implicit $exec |
| %170:vgpr_32 = V_XOR_B32_e32 32, %169, implicit $exec |
| %171:vgpr_32 = V_XOR_B32_e32 64, %169, implicit $exec |
| %172:vgpr_32 = V_XOR_B32_e32 96, %169, implicit $exec |
| undef %173.sub0:vreg_64_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| undef %174.sub0:vreg_64_align2 = V_MOV_B32_e32 -8388608, implicit $exec |
| undef %175.sub2:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec, implicit $exec |
| %175.sub3:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec, implicit $exec |
| %175.sub0:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec, implicit $exec |
| %175.sub1:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec, implicit $exec |
| undef %176.sub2:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec, implicit $exec |
| %176.sub3:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec, implicit $exec |
| %176.sub0:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec, implicit $exec |
| %176.sub1:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec, implicit $exec |
| undef %177.sub2:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec, implicit $exec |
| %177.sub3:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec, implicit $exec |
| %177.sub0:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec, implicit $exec |
| %177.sub1:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec, implicit $exec |
| undef %178.sub2:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec, implicit $exec |
| %178.sub3:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec, implicit $exec |
| %178.sub0:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec, implicit $exec |
| %178.sub1:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec, implicit $exec |
| undef %179.sub2:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec, implicit $exec |
| %179.sub3:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec, implicit $exec |
| %179.sub0:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec, implicit $exec |
| %179.sub1:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec, implicit $exec |
| undef %180.sub2:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec, implicit $exec |
| %180.sub3:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec, implicit $exec |
| %180.sub0:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec, implicit $exec |
| %180.sub1:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec, implicit $exec |
| undef %181.sub2:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec, implicit $exec |
| %181.sub3:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec, implicit $exec |
| %181.sub0:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec, implicit $exec |
| %181.sub1:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec, implicit $exec |
| undef %182.sub2:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec, implicit $exec |
| %182.sub3:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec, implicit $exec |
| %182.sub0:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec, implicit $exec |
| %182.sub1:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec, implicit $exec |
| %8.sub2:sgpr_128 = COPY %9.sub2 |
| %8.sub3:sgpr_128 = COPY %9.sub3 |
| %183:vgpr_32 = V_ADD_U32_e32 %149, %148, implicit $exec |
| undef %184.sub0:sgpr_64 = S_MOV_B32 1069066811 |
| %7.sub2:sgpr_128 = COPY %9.sub2 |
| %7.sub3:sgpr_128 = COPY %9.sub3 |
| %185:vgpr_32 = COPY %104 |
| %186:sreg_32 = COPY %103 |
| %174.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %187.sub0:vreg_64_align2 = COPY %174.sub0 |
| %187.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %188.sub0:vreg_64_align2 = COPY %174.sub0 |
| %188.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %189.sub0:vreg_64_align2 = COPY %174.sub0 |
| %189.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %190.sub0:vreg_64_align2 = COPY %174.sub0 |
| %190.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %191.sub0:vreg_64_align2 = COPY %174.sub0 |
| %191.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %192.sub0:vreg_64_align2 = COPY %174.sub0 |
| %192.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %193.sub0:vreg_64_align2 = COPY %174.sub0 |
| %193.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %194.sub0:vreg_64_align2 = COPY %174.sub0 |
| %194.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %195.sub0:vreg_64_align2 = COPY %174.sub0 |
| %195.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %196.sub0:vreg_64_align2 = COPY %174.sub0 |
| %196.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %197.sub0:vreg_64_align2 = COPY %174.sub0 |
| %197.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %198.sub0:vreg_64_align2 = COPY %174.sub0 |
| %198.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %199.sub0:vreg_64_align2 = COPY %174.sub0 |
| %199.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %200.sub0:vreg_64_align2 = COPY %174.sub0 |
| %200.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %201.sub0:vreg_64_align2 = COPY %174.sub0 |
| %201.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %202.sub0:vreg_64_align2 = COPY %174.sub0 |
| %202.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %203.sub0:vreg_64_align2 = COPY %174.sub0 |
| %203.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %204.sub0:vreg_64_align2 = COPY %174.sub0 |
| %204.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %205.sub0:vreg_64_align2 = COPY %174.sub0 |
| %205.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %206.sub0:vreg_64_align2 = COPY %174.sub0 |
| %206.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %207.sub0:vreg_64_align2 = COPY %174.sub0 |
| %207.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %208.sub0:vreg_64_align2 = COPY %174.sub0 |
| %208.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %209.sub0:vreg_64_align2 = COPY %174.sub0 |
| %209.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %210.sub0:vreg_64_align2 = COPY %174.sub0 |
| %210.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %211.sub0:vreg_64_align2 = COPY %174.sub0 |
| %211.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %212.sub0:vreg_64_align2 = COPY %174.sub0 |
| %212.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %213.sub0:vreg_64_align2 = COPY %174.sub0 |
| %213.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %214.sub0:vreg_64_align2 = COPY %174.sub0 |
| %214.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %215.sub0:vreg_64_align2 = COPY %174.sub0 |
| %215.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %216.sub0:vreg_64_align2 = COPY %174.sub0 |
| %216.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %217.sub0:vreg_64_align2 = COPY %174.sub0 |
| %217.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %218.sub0:vreg_64_align2 = COPY %174.sub0 |
| %218.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %219.sub0:vreg_64_align2 = COPY %174.sub0 |
| %219.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %220.sub0:vreg_64_align2 = COPY %174.sub0 |
| %220.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %221.sub0:vreg_64_align2 = COPY %174.sub0 |
| %221.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %222.sub0:vreg_64_align2 = COPY %174.sub0 |
| %222.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %223.sub0:vreg_64_align2 = COPY %174.sub0 |
| %223.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %224.sub0:vreg_64_align2 = COPY %174.sub0 |
| %224.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %225.sub0:vreg_64_align2 = COPY %174.sub0 |
| %225.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %226.sub0:vreg_64_align2 = COPY %174.sub0 |
| %226.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %227.sub0:vreg_64_align2 = COPY %174.sub0 |
| %227.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %228.sub0:vreg_64_align2 = COPY %174.sub0 |
| %228.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %229.sub0:vreg_64_align2 = COPY %174.sub0 |
| %229.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %230.sub0:vreg_64_align2 = COPY %174.sub0 |
| %230.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %231.sub0:vreg_64_align2 = COPY %174.sub0 |
| %231.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %232.sub0:vreg_64_align2 = COPY %174.sub0 |
| %232.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %233.sub0:vreg_64_align2 = COPY %174.sub0 |
| %233.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %234.sub0:vreg_64_align2 = COPY %174.sub0 |
| %234.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %235.sub0:vreg_64_align2 = COPY %174.sub0 |
| %235.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %236.sub0:vreg_64_align2 = COPY %174.sub0 |
| %236.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %237.sub0:vreg_64_align2 = COPY %174.sub0 |
| %237.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %238.sub0:vreg_64_align2 = COPY %174.sub0 |
| %238.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %239.sub0:vreg_64_align2 = COPY %174.sub0 |
| %239.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %240.sub0:vreg_64_align2 = COPY %174.sub0 |
| %240.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %241.sub0:vreg_64_align2 = COPY %174.sub0 |
| %241.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %242.sub0:vreg_64_align2 = COPY %174.sub0 |
| %242.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %243.sub0:vreg_64_align2 = COPY %174.sub0 |
| %243.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %244.sub0:vreg_64_align2 = COPY %174.sub0 |
| %244.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %245.sub0:vreg_64_align2 = COPY %174.sub0 |
| %245.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %246.sub0:vreg_64_align2 = COPY %174.sub0 |
| %246.sub1:vreg_64_align2 = COPY %174.sub0 |
| undef %247.sub0:vreg_64_align2 = COPY %174.sub0 |
| undef %248.sub0:vreg_64_align2 = COPY %174.sub0 |
| undef %249.sub0:vreg_64_align2 = COPY %174.sub0 |
| undef %250.sub0:vreg_64_align2 = COPY %174.sub0 |
| undef %251.sub0:vreg_64_align2 = COPY %174.sub0 |
| undef %252.sub0:vreg_64_align2 = COPY %174.sub0 |
| %173.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %253.sub0:vreg_64_align2 = COPY %173.sub0 |
| %253.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %254.sub0:vreg_64_align2 = COPY %173.sub0 |
| %254.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %255.sub0:vreg_64_align2 = COPY %173.sub0 |
| %255.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %256.sub0:vreg_64_align2 = COPY %173.sub0 |
| %256.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %257.sub0:vreg_64_align2 = COPY %173.sub0 |
| %257.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %258.sub0:vreg_64_align2 = COPY %173.sub0 |
| %258.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %259.sub0:vreg_64_align2 = COPY %173.sub0 |
| %259.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %260.sub0:vreg_64_align2 = COPY %173.sub0 |
| %260.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %261.sub0:vreg_64_align2 = COPY %173.sub0 |
| %261.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %262.sub0:vreg_64_align2 = COPY %173.sub0 |
| %262.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %263.sub0:vreg_64_align2 = COPY %173.sub0 |
| %263.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %264.sub0:vreg_64_align2 = COPY %173.sub0 |
| %264.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %265.sub0:vreg_64_align2 = COPY %173.sub0 |
| %265.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %266.sub0:vreg_64_align2 = COPY %173.sub0 |
| %266.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %267.sub0:vreg_64_align2 = COPY %173.sub0 |
| %267.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %268.sub0:vreg_64_align2 = COPY %173.sub0 |
| %268.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %269.sub0:vreg_64_align2 = COPY %173.sub0 |
| %269.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %270.sub0:vreg_64_align2 = COPY %173.sub0 |
| %270.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %271.sub0:vreg_64_align2 = COPY %173.sub0 |
| %271.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %272.sub0:vreg_64_align2 = COPY %173.sub0 |
| %272.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %273.sub0:vreg_64_align2 = COPY %173.sub0 |
| %273.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %274.sub0:vreg_64_align2 = COPY %173.sub0 |
| %274.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %275.sub0:vreg_64_align2 = COPY %173.sub0 |
| %275.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %276.sub0:vreg_64_align2 = COPY %173.sub0 |
| %276.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %277.sub0:vreg_64_align2 = COPY %173.sub0 |
| %277.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %278.sub0:vreg_64_align2 = COPY %173.sub0 |
| %278.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %279.sub0:vreg_64_align2 = COPY %173.sub0 |
| %279.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %280.sub0:vreg_64_align2 = COPY %173.sub0 |
| %280.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %281.sub0:vreg_64_align2 = COPY %173.sub0 |
| %281.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %282.sub0:vreg_64_align2 = COPY %173.sub0 |
| %282.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %283.sub0:vreg_64_align2 = COPY %173.sub0 |
| %283.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %284.sub0:vreg_64_align2 = COPY %173.sub0 |
| %284.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %285.sub0:vreg_64_align2 = COPY %173.sub0 |
| %285.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %286.sub0:vreg_64_align2 = COPY %173.sub0 |
| %286.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %287.sub0:vreg_64_align2 = COPY %173.sub0 |
| %287.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %288.sub0:vreg_64_align2 = COPY %173.sub0 |
| %288.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %289.sub0:vreg_64_align2 = COPY %173.sub0 |
| %289.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %290.sub0:vreg_64_align2 = COPY %173.sub0 |
| %290.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %291.sub0:vreg_64_align2 = COPY %173.sub0 |
| %291.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %292.sub0:vreg_64_align2 = COPY %173.sub0 |
| %292.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %293.sub0:vreg_64_align2 = COPY %173.sub0 |
| %293.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %294.sub0:vreg_64_align2 = COPY %173.sub0 |
| %294.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %295.sub0:vreg_64_align2 = COPY %173.sub0 |
| %295.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %296.sub0:vreg_64_align2 = COPY %173.sub0 |
| %296.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %297.sub0:vreg_64_align2 = COPY %173.sub0 |
| %297.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %298.sub0:vreg_64_align2 = COPY %173.sub0 |
| %298.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %299.sub0:vreg_64_align2 = COPY %173.sub0 |
| %299.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %300.sub0:vreg_64_align2 = COPY %173.sub0 |
| %300.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %301.sub0:vreg_64_align2 = COPY %173.sub0 |
| %301.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %302.sub0:vreg_64_align2 = COPY %173.sub0 |
| %302.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %303.sub0:vreg_64_align2 = COPY %173.sub0 |
| %303.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %304.sub0:vreg_64_align2 = COPY %173.sub0 |
| %304.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %305.sub0:vreg_64_align2 = COPY %173.sub0 |
| %305.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %306.sub0:vreg_64_align2 = COPY %173.sub0 |
| %306.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %307.sub0:vreg_64_align2 = COPY %173.sub0 |
| %307.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %308.sub0:vreg_64_align2 = COPY %173.sub0 |
| %308.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %309.sub0:vreg_64_align2 = COPY %173.sub0 |
| %309.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %310.sub0:vreg_64_align2 = COPY %173.sub0 |
| %310.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %311.sub0:vreg_64_align2 = COPY %173.sub0 |
| %311.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %312.sub0:vreg_64_align2 = COPY %173.sub0 |
| %312.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %313.sub0:vreg_64_align2 = COPY %173.sub0 |
| %313.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %314.sub0:vreg_64_align2 = COPY %173.sub0 |
| %314.sub1:vreg_64_align2 = COPY %173.sub0 |
| undef %315.sub0:vreg_64_align2 = COPY %173.sub0 |
| %315.sub1:vreg_64_align2 = COPY %173.sub0 |
| |
| bb.1: |
| successors: %bb.2(0x04000000), %bb.1(0x7c000000) |
| |
| %316:sreg_32 = COPY %12 |
| %12:sreg_32 = COPY %14 |
| %317:sreg_32 = COPY %186 |
| %186:sreg_32 = COPY %103 |
| %318:vgpr_32 = COPY %185 |
| %185:vgpr_32 = COPY %104 |
| %319:sreg_32 = COPY %13 |
| %13:sreg_32 = COPY %15 |
| undef %320.sub0:vreg_64_align2 = COPY %251.sub0 |
| %320.sub1:vreg_64_align2 = COPY %252.sub0 |
| undef %321.sub0:vreg_64_align2 = COPY %249.sub0 |
| %321.sub1:vreg_64_align2 = COPY %250.sub0 |
| undef %322.sub0:vreg_64_align2 = COPY %247.sub0 |
| %322.sub1:vreg_64_align2 = COPY %248.sub0 |
| undef %323.sub0:vreg_64_align2 = COPY %246.sub0 |
| %323.sub1:vreg_64_align2 = COPY %246.sub1 |
| undef %324.sub0:vreg_64_align2 = COPY %245.sub0 |
| %324.sub1:vreg_64_align2 = COPY %245.sub1 |
| undef %325.sub0:vreg_64_align2 = COPY %244.sub0 |
| %325.sub1:vreg_64_align2 = COPY %244.sub1 |
| undef %326.sub0:vreg_64_align2 = COPY %243.sub0 |
| %326.sub1:vreg_64_align2 = COPY %243.sub1 |
| undef %327.sub0:vreg_64_align2 = COPY %242.sub0 |
| %327.sub1:vreg_64_align2 = COPY %242.sub1 |
| undef %328.sub0:vreg_64_align2 = COPY %241.sub0 |
| %328.sub1:vreg_64_align2 = COPY %241.sub1 |
| undef %329.sub0:vreg_64_align2 = COPY %240.sub0 |
| %329.sub1:vreg_64_align2 = COPY %240.sub1 |
| undef %330.sub0:vreg_64_align2 = COPY %239.sub0 |
| %330.sub1:vreg_64_align2 = COPY %239.sub1 |
| undef %331.sub0:vreg_64_align2 = COPY %238.sub0 |
| %331.sub1:vreg_64_align2 = COPY %238.sub1 |
| undef %332.sub0:vreg_64_align2 = COPY %237.sub0 |
| %332.sub1:vreg_64_align2 = COPY %237.sub1 |
| undef %333.sub0:vreg_64_align2 = COPY %236.sub0 |
| %333.sub1:vreg_64_align2 = COPY %236.sub1 |
| undef %334.sub0:vreg_64_align2 = COPY %235.sub0 |
| %334.sub1:vreg_64_align2 = COPY %235.sub1 |
| undef %335.sub0:vreg_64_align2 = COPY %234.sub0 |
| %335.sub1:vreg_64_align2 = COPY %234.sub1 |
| undef %336.sub0:vreg_64_align2 = COPY %233.sub0 |
| %336.sub1:vreg_64_align2 = COPY %233.sub1 |
| undef %337.sub0:vreg_64_align2 = COPY %232.sub0 |
| %337.sub1:vreg_64_align2 = COPY %232.sub1 |
| undef %338.sub0:vreg_64_align2 = COPY %231.sub0 |
| %338.sub1:vreg_64_align2 = COPY %231.sub1 |
| undef %339.sub0:vreg_64_align2 = COPY %230.sub0 |
| %339.sub1:vreg_64_align2 = COPY %230.sub1 |
| undef %340.sub0:vreg_64_align2 = COPY %229.sub0 |
| %340.sub1:vreg_64_align2 = COPY %229.sub1 |
| undef %341.sub0:vreg_64_align2 = COPY %228.sub0 |
| %341.sub1:vreg_64_align2 = COPY %228.sub1 |
| undef %342.sub0:vreg_64_align2 = COPY %227.sub0 |
| %342.sub1:vreg_64_align2 = COPY %227.sub1 |
| undef %343.sub0:vreg_64_align2 = COPY %226.sub0 |
| %343.sub1:vreg_64_align2 = COPY %226.sub1 |
| undef %344.sub0:vreg_64_align2 = COPY %225.sub0 |
| %344.sub1:vreg_64_align2 = COPY %225.sub1 |
| undef %345.sub0:vreg_64_align2 = COPY %224.sub0 |
| %345.sub1:vreg_64_align2 = COPY %224.sub1 |
| undef %346.sub0:vreg_64_align2 = COPY %223.sub0 |
| %346.sub1:vreg_64_align2 = COPY %223.sub1 |
| undef %347.sub0:vreg_64_align2 = COPY %222.sub0 |
| %347.sub1:vreg_64_align2 = COPY %222.sub1 |
| undef %348.sub0:vreg_64_align2 = COPY %221.sub0 |
| %348.sub1:vreg_64_align2 = COPY %221.sub1 |
| undef %349.sub0:vreg_64_align2 = COPY %220.sub0 |
| %349.sub1:vreg_64_align2 = COPY %220.sub1 |
| undef %350.sub0:vreg_64_align2 = COPY %219.sub0 |
| %350.sub1:vreg_64_align2 = COPY %219.sub1 |
| undef %351.sub0:vreg_64_align2 = COPY %218.sub0 |
| %351.sub1:vreg_64_align2 = COPY %218.sub1 |
| undef %352.sub0:vreg_64_align2 = COPY %217.sub0 |
| %352.sub1:vreg_64_align2 = COPY %217.sub1 |
| undef %353.sub0:vreg_64_align2 = COPY %216.sub0 |
| %353.sub1:vreg_64_align2 = COPY %216.sub1 |
| undef %354.sub0:vreg_64_align2 = COPY %215.sub0 |
| %354.sub1:vreg_64_align2 = COPY %215.sub1 |
| undef %355.sub0:vreg_64_align2 = COPY %214.sub0 |
| %355.sub1:vreg_64_align2 = COPY %214.sub1 |
| undef %356.sub0:vreg_64_align2 = COPY %213.sub0 |
| %356.sub1:vreg_64_align2 = COPY %213.sub1 |
| undef %357.sub0:vreg_64_align2 = COPY %212.sub0 |
| %357.sub1:vreg_64_align2 = COPY %212.sub1 |
| undef %358.sub0:vreg_64_align2 = COPY %211.sub0 |
| %358.sub1:vreg_64_align2 = COPY %211.sub1 |
| undef %359.sub0:vreg_64_align2 = COPY %210.sub0 |
| %359.sub1:vreg_64_align2 = COPY %210.sub1 |
| undef %360.sub0:vreg_64_align2 = COPY %209.sub0 |
| %360.sub1:vreg_64_align2 = COPY %209.sub1 |
| undef %361.sub0:vreg_64_align2 = COPY %208.sub0 |
| %361.sub1:vreg_64_align2 = COPY %208.sub1 |
| undef %362.sub0:vreg_64_align2 = COPY %207.sub0 |
| %362.sub1:vreg_64_align2 = COPY %207.sub1 |
| undef %363.sub0:vreg_64_align2 = COPY %206.sub0 |
| %363.sub1:vreg_64_align2 = COPY %206.sub1 |
| undef %364.sub0:vreg_64_align2 = COPY %205.sub0 |
| %364.sub1:vreg_64_align2 = COPY %205.sub1 |
| undef %365.sub0:vreg_64_align2 = COPY %204.sub0 |
| %365.sub1:vreg_64_align2 = COPY %204.sub1 |
| undef %366.sub0:vreg_64_align2 = COPY %203.sub0 |
| %366.sub1:vreg_64_align2 = COPY %203.sub1 |
| undef %367.sub0:vreg_64_align2 = COPY %202.sub0 |
| %367.sub1:vreg_64_align2 = COPY %202.sub1 |
| undef %368.sub0:vreg_64_align2 = COPY %201.sub0 |
| %368.sub1:vreg_64_align2 = COPY %201.sub1 |
| undef %369.sub0:vreg_64_align2 = COPY %200.sub0 |
| %369.sub1:vreg_64_align2 = COPY %200.sub1 |
| undef %370.sub0:vreg_64_align2 = COPY %199.sub0 |
| %370.sub1:vreg_64_align2 = COPY %199.sub1 |
| undef %371.sub0:vreg_64_align2 = COPY %198.sub0 |
| %371.sub1:vreg_64_align2 = COPY %198.sub1 |
| undef %372.sub0:vreg_64_align2 = COPY %197.sub0 |
| %372.sub1:vreg_64_align2 = COPY %197.sub1 |
| undef %373.sub0:vreg_64_align2 = COPY %196.sub0 |
| %373.sub1:vreg_64_align2 = COPY %196.sub1 |
| undef %374.sub0:vreg_64_align2 = COPY %195.sub0 |
| %374.sub1:vreg_64_align2 = COPY %195.sub1 |
| undef %375.sub0:vreg_64_align2 = COPY %194.sub0 |
| %375.sub1:vreg_64_align2 = COPY %194.sub1 |
| undef %376.sub0:vreg_64_align2 = COPY %193.sub0 |
| %376.sub1:vreg_64_align2 = COPY %193.sub1 |
| undef %377.sub0:vreg_64_align2 = COPY %192.sub0 |
| %377.sub1:vreg_64_align2 = COPY %192.sub1 |
| undef %378.sub0:vreg_64_align2 = COPY %191.sub0 |
| %378.sub1:vreg_64_align2 = COPY %191.sub1 |
| undef %379.sub0:vreg_64_align2 = COPY %190.sub0 |
| %379.sub1:vreg_64_align2 = COPY %190.sub1 |
| undef %380.sub0:vreg_64_align2 = COPY %189.sub0 |
| %380.sub1:vreg_64_align2 = COPY %189.sub1 |
| undef %381.sub0:vreg_64_align2 = COPY %188.sub0 |
| %381.sub1:vreg_64_align2 = COPY %188.sub1 |
| undef %382.sub0:vreg_64_align2 = COPY %187.sub0 |
| %382.sub1:vreg_64_align2 = COPY %187.sub1 |
| undef %383.sub0:vreg_64_align2 = COPY %174.sub0 |
| %383.sub1:vreg_64_align2 = COPY %174.sub1 |
| %384:sreg_32 = S_ADD_I32 %17, 1, implicit-def dead $scc |
| S_CMP_LT_I32 %384, 3, implicit-def $scc |
| %17:sreg_32 = S_CSELECT_B32 %384, 0, implicit killed $scc |
| %385:sreg_32 = nuw nsw S_LSHL_B32 %34, 11, implicit-def dead $scc |
| %386:sreg_32 = nuw nsw S_ADD_I32 %131, %385, implicit-def dead $scc |
| %387:vgpr_32 = disjoint V_OR_B32_e32 %386, %29, implicit $exec |
| %388:vgpr_32 = disjoint V_OR_B32_e32 %386, %30, implicit $exec |
| %389:sreg_32 = S_LSHL_B32 %17, 11, implicit-def dead $scc |
| %14:sreg_32 = S_ADD_I32 %389, 45408, implicit-def dead $scc |
| $m0 = COPY %14 |
| BUFFER_LOAD_DWORDX4_LDS_OFFEN %387, %8, 0, 0, 0, 0, 1, implicit $exec, implicit $m0 |
| $m0 = S_ADD_I32 %389, 46432, implicit-def dead $scc |
| BUFFER_LOAD_DWORDX4_LDS_OFFEN %388, %8, 0, 0, 0, 0, 1, implicit $exec, implicit $m0 |
| %390:vgpr_32 = nuw V_ADD_U32_e32 %316, %133, implicit $exec |
| %391:vreg_128_align2 = DS_READ_B128_gfx9 %390, 0, 0, implicit $exec |
| %392:vreg_128_align2 = DS_READ_B128_gfx9 %390, 16, 0, implicit $exec |
| %393:vreg_128_align2 = DS_READ_B128_gfx9 %390, 32, 0, implicit $exec |
| %394:vreg_128_align2 = DS_READ_B128_gfx9 %390, 48, 0, implicit $exec |
| undef %395.sub0:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| undef %395.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %38.sub0, %391.sub0, %395.sub0, implicit $exec |
| undef %395.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %38.sub1, %391.sub1, %395.sub0, implicit $exec |
| undef %395.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %38.sub2, %391.sub2, %395.sub0, implicit $exec |
| undef %395.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %38.sub3, %391.sub3, %395.sub0, implicit $exec |
| undef %396.sub0:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| undef %396.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %38.sub0, %392.sub0, %396.sub0, implicit $exec |
| undef %396.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %38.sub1, %392.sub1, %396.sub0, implicit $exec |
| undef %396.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %38.sub2, %392.sub2, %396.sub0, implicit $exec |
| undef %396.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %38.sub3, %392.sub3, %396.sub0, implicit $exec |
| undef %397.sub0:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| undef %397.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %38.sub0, %393.sub0, %397.sub0, implicit $exec |
| undef %397.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %38.sub1, %393.sub1, %397.sub0, implicit $exec |
| undef %397.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %38.sub2, %393.sub2, %397.sub0, implicit $exec |
| undef %397.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %38.sub3, %393.sub3, %397.sub0, implicit $exec |
| undef %398.sub0:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| undef %398.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %38.sub0, %394.sub0, %398.sub0, implicit $exec |
| undef %398.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %38.sub1, %394.sub1, %398.sub0, implicit $exec |
| undef %398.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %38.sub2, %394.sub2, %398.sub0, implicit $exec |
| undef %398.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %38.sub3, %394.sub3, %398.sub0, implicit $exec |
| %395.sub1:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %395.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %39.sub0, %391.sub0, %395.sub1, implicit $exec |
| %395.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %39.sub1, %391.sub1, %395.sub1, implicit $exec |
| %395.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %39.sub2, %391.sub2, %395.sub1, implicit $exec |
| %395.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %39.sub3, %391.sub3, %395.sub1, implicit $exec |
| %396.sub1:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %396.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %39.sub0, %392.sub0, %396.sub1, implicit $exec |
| %396.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %39.sub1, %392.sub1, %396.sub1, implicit $exec |
| %396.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %39.sub2, %392.sub2, %396.sub1, implicit $exec |
| %396.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %39.sub3, %392.sub3, %396.sub1, implicit $exec |
| %397.sub1:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %397.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %39.sub0, %393.sub0, %397.sub1, implicit $exec |
| %397.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %39.sub1, %393.sub1, %397.sub1, implicit $exec |
| %397.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %39.sub2, %393.sub2, %397.sub1, implicit $exec |
| %397.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %39.sub3, %393.sub3, %397.sub1, implicit $exec |
| %398.sub1:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %398.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %39.sub0, %394.sub0, %398.sub1, implicit $exec |
| %398.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %39.sub1, %394.sub1, %398.sub1, implicit $exec |
| %398.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %39.sub2, %394.sub2, %398.sub1, implicit $exec |
| %398.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %39.sub3, %394.sub3, %398.sub1, implicit $exec |
| %395.sub2:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %395.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %40.sub0, %391.sub0, %395.sub2, implicit $exec |
| %395.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %40.sub1, %391.sub1, %395.sub2, implicit $exec |
| %395.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %40.sub2, %391.sub2, %395.sub2, implicit $exec |
| %395.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %40.sub3, %391.sub3, %395.sub2, implicit $exec |
| %396.sub2:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %396.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %40.sub0, %392.sub0, %396.sub2, implicit $exec |
| %396.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %40.sub1, %392.sub1, %396.sub2, implicit $exec |
| %396.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %40.sub2, %392.sub2, %396.sub2, implicit $exec |
| %396.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %40.sub3, %392.sub3, %396.sub2, implicit $exec |
| %397.sub2:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %397.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %40.sub0, %393.sub0, %397.sub2, implicit $exec |
| %397.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %40.sub1, %393.sub1, %397.sub2, implicit $exec |
| %397.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %40.sub2, %393.sub2, %397.sub2, implicit $exec |
| %397.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %40.sub3, %393.sub3, %397.sub2, implicit $exec |
| %398.sub2:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %398.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %40.sub0, %394.sub0, %398.sub2, implicit $exec |
| %398.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %40.sub1, %394.sub1, %398.sub2, implicit $exec |
| %398.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %40.sub2, %394.sub2, %398.sub2, implicit $exec |
| %398.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %40.sub3, %394.sub3, %398.sub2, implicit $exec |
| %395.sub3:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %395.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %41.sub0, %391.sub0, %395.sub3, implicit $exec |
| %395.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %41.sub1, %391.sub1, %395.sub3, implicit $exec |
| %395.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %41.sub2, %391.sub2, %395.sub3, implicit $exec |
| %395.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %41.sub3, %391.sub3, %395.sub3, implicit $exec |
| %396.sub3:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %396.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %41.sub0, %392.sub0, %396.sub3, implicit $exec |
| %396.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %41.sub1, %392.sub1, %396.sub3, implicit $exec |
| %396.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %41.sub2, %392.sub2, %396.sub3, implicit $exec |
| %396.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %41.sub3, %392.sub3, %396.sub3, implicit $exec |
| %397.sub3:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %397.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %41.sub0, %393.sub0, %397.sub3, implicit $exec |
| %397.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %41.sub1, %393.sub1, %397.sub3, implicit $exec |
| %397.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %41.sub2, %393.sub2, %397.sub3, implicit $exec |
| %397.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %41.sub3, %393.sub3, %397.sub3, implicit $exec |
| %398.sub3:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %398.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %41.sub0, %394.sub0, %398.sub3, implicit $exec |
| %398.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %41.sub1, %394.sub1, %398.sub3, implicit $exec |
| %398.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %41.sub2, %394.sub2, %398.sub3, implicit $exec |
| %398.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %41.sub3, %394.sub3, %398.sub3, implicit $exec |
| undef %399.sub0:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| undef %399.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %42.sub0, %391.sub0, %399.sub0, implicit $exec |
| undef %399.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %42.sub1, %391.sub1, %399.sub0, implicit $exec |
| undef %399.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %42.sub2, %391.sub2, %399.sub0, implicit $exec |
| undef %399.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %42.sub3, %391.sub3, %399.sub0, implicit $exec |
| undef %400.sub0:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| undef %400.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %42.sub0, %392.sub0, %400.sub0, implicit $exec |
| undef %400.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %42.sub1, %392.sub1, %400.sub0, implicit $exec |
| undef %400.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %42.sub2, %392.sub2, %400.sub0, implicit $exec |
| undef %400.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %42.sub3, %392.sub3, %400.sub0, implicit $exec |
| undef %401.sub0:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| undef %401.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %42.sub0, %393.sub0, %401.sub0, implicit $exec |
| undef %401.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %42.sub1, %393.sub1, %401.sub0, implicit $exec |
| undef %401.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %42.sub2, %393.sub2, %401.sub0, implicit $exec |
| undef %401.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %42.sub3, %393.sub3, %401.sub0, implicit $exec |
| undef %402.sub0:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| undef %402.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %42.sub0, %394.sub0, %402.sub0, implicit $exec |
| undef %402.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %42.sub1, %394.sub1, %402.sub0, implicit $exec |
| undef %402.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %42.sub2, %394.sub2, %402.sub0, implicit $exec |
| undef %402.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %42.sub3, %394.sub3, %402.sub0, implicit $exec |
| %399.sub1:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %399.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %43.sub0, %391.sub0, %399.sub1, implicit $exec |
| %399.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %43.sub1, %391.sub1, %399.sub1, implicit $exec |
| %399.sub3:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %399.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %45.sub0, %391.sub0, %399.sub3, implicit $exec |
| %399.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %45.sub1, %391.sub1, %399.sub3, implicit $exec |
| %399.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %45.sub2, %391.sub2, %399.sub3, implicit $exec |
| %399.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %45.sub3, %391.sub3, %399.sub3, implicit $exec |
| %400.sub3:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %400.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %45.sub0, %392.sub0, %400.sub3, implicit $exec |
| %400.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %45.sub1, %392.sub1, %400.sub3, implicit $exec |
| %400.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %45.sub2, %392.sub2, %400.sub3, implicit $exec |
| %400.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %45.sub3, %392.sub3, %400.sub3, implicit $exec |
| %401.sub3:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %401.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %45.sub0, %393.sub0, %401.sub3, implicit $exec |
| %401.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %45.sub1, %393.sub1, %401.sub3, implicit $exec |
| %401.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %45.sub2, %393.sub2, %401.sub3, implicit $exec |
| %401.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %45.sub3, %393.sub3, %401.sub3, implicit $exec |
| %402.sub3:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %402.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %45.sub0, %394.sub0, %402.sub3, implicit $exec |
| %402.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %45.sub1, %394.sub1, %402.sub3, implicit $exec |
| %402.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %45.sub2, %394.sub2, %402.sub3, implicit $exec |
| %402.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %45.sub3, %394.sub3, %402.sub3, implicit $exec |
| undef %403.sub0:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| undef %403.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %46.sub0, %391.sub0, %403.sub0, implicit $exec |
| undef %403.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %46.sub1, %391.sub1, %403.sub0, implicit $exec |
| undef %403.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %46.sub2, %391.sub2, %403.sub0, implicit $exec |
| undef %403.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %46.sub3, %391.sub3, %403.sub0, implicit $exec |
| undef %404.sub0:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| undef %404.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %46.sub0, %392.sub0, %404.sub0, implicit $exec |
| undef %404.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %46.sub1, %392.sub1, %404.sub0, implicit $exec |
| undef %404.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %46.sub2, %392.sub2, %404.sub0, implicit $exec |
| undef %404.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %46.sub3, %392.sub3, %404.sub0, implicit $exec |
| undef %405.sub0:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| undef %405.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %46.sub0, %393.sub0, %405.sub0, implicit $exec |
| undef %405.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %46.sub1, %393.sub1, %405.sub0, implicit $exec |
| undef %405.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %46.sub2, %393.sub2, %405.sub0, implicit $exec |
| undef %405.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %46.sub3, %393.sub3, %405.sub0, implicit $exec |
| undef %406.sub0:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| undef %406.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %46.sub0, %394.sub0, %406.sub0, implicit $exec |
| undef %406.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %46.sub1, %394.sub1, %406.sub0, implicit $exec |
| undef %406.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %46.sub2, %394.sub2, %406.sub0, implicit $exec |
| undef %406.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %46.sub3, %394.sub3, %406.sub0, implicit $exec |
| %403.sub1:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %403.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %47.sub0, %391.sub0, %403.sub1, implicit $exec |
| %403.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %47.sub1, %391.sub1, %403.sub1, implicit $exec |
| %403.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %47.sub2, %391.sub2, %403.sub1, implicit $exec |
| %403.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %47.sub3, %391.sub3, %403.sub1, implicit $exec |
| %404.sub1:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %404.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %47.sub0, %392.sub0, %404.sub1, implicit $exec |
| %404.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %47.sub1, %392.sub1, %404.sub1, implicit $exec |
| %404.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %47.sub2, %392.sub2, %404.sub1, implicit $exec |
| %404.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %47.sub3, %392.sub3, %404.sub1, implicit $exec |
| %405.sub1:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %405.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %47.sub0, %393.sub0, %405.sub1, implicit $exec |
| %405.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %47.sub1, %393.sub1, %405.sub1, implicit $exec |
| %405.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %47.sub2, %393.sub2, %405.sub1, implicit $exec |
| %405.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %47.sub3, %393.sub3, %405.sub1, implicit $exec |
| %406.sub1:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %406.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %47.sub0, %394.sub0, %406.sub1, implicit $exec |
| %406.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %47.sub1, %394.sub1, %406.sub1, implicit $exec |
| %406.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %47.sub2, %394.sub2, %406.sub1, implicit $exec |
| %406.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %47.sub3, %394.sub3, %406.sub1, implicit $exec |
| %403.sub2:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %403.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %48.sub0, %391.sub0, %403.sub2, implicit $exec |
| %403.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %48.sub1, %391.sub1, %403.sub2, implicit $exec |
| %403.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %48.sub2, %391.sub2, %403.sub2, implicit $exec |
| %403.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %48.sub3, %391.sub3, %403.sub2, implicit $exec |
| %404.sub2:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %404.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %48.sub0, %392.sub0, %404.sub2, implicit $exec |
| %404.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %48.sub1, %392.sub1, %404.sub2, implicit $exec |
| %404.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %48.sub2, %392.sub2, %404.sub2, implicit $exec |
| %404.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %48.sub3, %392.sub3, %404.sub2, implicit $exec |
| %405.sub2:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %405.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %48.sub0, %393.sub0, %405.sub2, implicit $exec |
| %405.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %48.sub1, %393.sub1, %405.sub2, implicit $exec |
| %405.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %48.sub2, %393.sub2, %405.sub2, implicit $exec |
| %405.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %48.sub3, %393.sub3, %405.sub2, implicit $exec |
| %406.sub2:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %406.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %48.sub0, %394.sub0, %406.sub2, implicit $exec |
| %406.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %48.sub1, %394.sub1, %406.sub2, implicit $exec |
| %406.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %48.sub2, %394.sub2, %406.sub2, implicit $exec |
| %406.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %48.sub3, %394.sub3, %406.sub2, implicit $exec |
| %403.sub3:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %403.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %49.sub0, %391.sub0, %403.sub3, implicit $exec |
| %403.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %49.sub1, %391.sub1, %403.sub3, implicit $exec |
| %403.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %49.sub2, %391.sub2, %403.sub3, implicit $exec |
| %403.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %49.sub3, %391.sub3, %403.sub3, implicit $exec |
| %404.sub3:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %404.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %49.sub0, %392.sub0, %404.sub3, implicit $exec |
| %404.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %49.sub1, %392.sub1, %404.sub3, implicit $exec |
| %404.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %49.sub2, %392.sub2, %404.sub3, implicit $exec |
| %404.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %49.sub3, %392.sub3, %404.sub3, implicit $exec |
| %405.sub3:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %405.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %49.sub0, %393.sub0, %405.sub3, implicit $exec |
| %405.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %49.sub1, %393.sub1, %405.sub3, implicit $exec |
| %405.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %49.sub2, %393.sub2, %405.sub3, implicit $exec |
| %405.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %49.sub3, %393.sub3, %405.sub3, implicit $exec |
| %406.sub3:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %406.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %49.sub0, %394.sub0, %406.sub3, implicit $exec |
| %406.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %49.sub1, %394.sub1, %406.sub3, implicit $exec |
| %406.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %49.sub2, %394.sub2, %406.sub3, implicit $exec |
| %406.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %49.sub3, %394.sub3, %406.sub3, implicit $exec |
| undef %407.sub0:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| undef %407.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %50.sub0, %391.sub0, %407.sub0, implicit $exec |
| undef %407.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %50.sub1, %391.sub1, %407.sub0, implicit $exec |
| undef %407.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %50.sub2, %391.sub2, %407.sub0, implicit $exec |
| undef %407.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %50.sub3, %391.sub3, %407.sub0, implicit $exec |
| undef %408.sub0:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| undef %408.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %50.sub0, %392.sub0, %408.sub0, implicit $exec |
| undef %408.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %50.sub1, %392.sub1, %408.sub0, implicit $exec |
| undef %408.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %50.sub2, %392.sub2, %408.sub0, implicit $exec |
| undef %408.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %50.sub3, %392.sub3, %408.sub0, implicit $exec |
| undef %409.sub0:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| undef %409.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %50.sub0, %393.sub0, %409.sub0, implicit $exec |
| undef %409.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %50.sub1, %393.sub1, %409.sub0, implicit $exec |
| undef %409.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %50.sub2, %393.sub2, %409.sub0, implicit $exec |
| undef %409.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %50.sub3, %393.sub3, %409.sub0, implicit $exec |
| undef %410.sub0:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| undef %410.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %50.sub0, %394.sub0, %410.sub0, implicit $exec |
| undef %410.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %50.sub1, %394.sub1, %410.sub0, implicit $exec |
| undef %410.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %50.sub2, %394.sub2, %410.sub0, implicit $exec |
| undef %410.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %50.sub3, %394.sub3, %410.sub0, implicit $exec |
| %407.sub1:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %407.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %51.sub0, %391.sub0, %407.sub1, implicit $exec |
| %407.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %51.sub1, %391.sub1, %407.sub1, implicit $exec |
| %407.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %51.sub2, %391.sub2, %407.sub1, implicit $exec |
| %407.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %51.sub3, %391.sub3, %407.sub1, implicit $exec |
| %408.sub1:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %408.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %51.sub0, %392.sub0, %408.sub1, implicit $exec |
| %408.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %51.sub1, %392.sub1, %408.sub1, implicit $exec |
| %408.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %51.sub2, %392.sub2, %408.sub1, implicit $exec |
| %408.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %51.sub3, %392.sub3, %408.sub1, implicit $exec |
| %409.sub1:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %409.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %51.sub0, %393.sub0, %409.sub1, implicit $exec |
| %409.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %51.sub1, %393.sub1, %409.sub1, implicit $exec |
| %409.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %51.sub2, %393.sub2, %409.sub1, implicit $exec |
| %409.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %51.sub3, %393.sub3, %409.sub1, implicit $exec |
| %410.sub1:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %410.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %51.sub0, %394.sub0, %410.sub1, implicit $exec |
| %410.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %51.sub1, %394.sub1, %410.sub1, implicit $exec |
| %410.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %51.sub2, %394.sub2, %410.sub1, implicit $exec |
| %410.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %51.sub3, %394.sub3, %410.sub1, implicit $exec |
| %407.sub2:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %407.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %52.sub0, %391.sub0, %407.sub2, implicit $exec |
| %407.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %52.sub1, %391.sub1, %407.sub2, implicit $exec |
| %407.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %52.sub2, %391.sub2, %407.sub2, implicit $exec |
| %407.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %52.sub3, %391.sub3, %407.sub2, implicit $exec |
| %408.sub2:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %408.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %52.sub0, %392.sub0, %408.sub2, implicit $exec |
| %408.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %52.sub1, %392.sub1, %408.sub2, implicit $exec |
| %408.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %52.sub2, %392.sub2, %408.sub2, implicit $exec |
| %408.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %52.sub3, %392.sub3, %408.sub2, implicit $exec |
| %409.sub2:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %409.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %52.sub0, %393.sub0, %409.sub2, implicit $exec |
| %409.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %52.sub1, %393.sub1, %409.sub2, implicit $exec |
| %409.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %52.sub2, %393.sub2, %409.sub2, implicit $exec |
| %409.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %52.sub3, %393.sub3, %409.sub2, implicit $exec |
| %410.sub2:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %410.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %52.sub0, %394.sub0, %410.sub2, implicit $exec |
| %410.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %52.sub1, %394.sub1, %410.sub2, implicit $exec |
| %410.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %52.sub2, %394.sub2, %410.sub2, implicit $exec |
| %410.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %52.sub3, %394.sub3, %410.sub2, implicit $exec |
| %407.sub3:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %407.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %53.sub0, %391.sub0, %407.sub3, implicit $exec |
| %407.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %53.sub1, %391.sub1, %407.sub3, implicit $exec |
| %407.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %53.sub2, %391.sub2, %407.sub3, implicit $exec |
| %407.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %53.sub3, %391.sub3, %407.sub3, implicit $exec |
| %408.sub3:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %408.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %53.sub0, %392.sub0, %408.sub3, implicit $exec |
| %408.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %53.sub1, %392.sub1, %408.sub3, implicit $exec |
| %408.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %53.sub2, %392.sub2, %408.sub3, implicit $exec |
| %408.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %53.sub3, %392.sub3, %408.sub3, implicit $exec |
| %409.sub3:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %409.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %53.sub0, %393.sub0, %409.sub3, implicit $exec |
| %409.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %53.sub1, %393.sub1, %409.sub3, implicit $exec |
| %409.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %53.sub2, %393.sub2, %409.sub3, implicit $exec |
| %409.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %53.sub3, %393.sub3, %409.sub3, implicit $exec |
| %410.sub3:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %410.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %53.sub0, %394.sub0, %410.sub3, implicit $exec |
| %410.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %53.sub1, %394.sub1, %410.sub3, implicit $exec |
| %410.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %53.sub2, %394.sub2, %410.sub3, implicit $exec |
| %410.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %53.sub3, %394.sub3, %410.sub3, implicit $exec |
| undef %411.sub0:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| undef %411.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %54.sub0, %391.sub0, %411.sub0, implicit $exec |
| undef %411.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %54.sub1, %391.sub1, %411.sub0, implicit $exec |
| undef %411.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %54.sub2, %391.sub2, %411.sub0, implicit $exec |
| undef %411.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %54.sub3, %391.sub3, %411.sub0, implicit $exec |
| undef %412.sub0:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| undef %412.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %54.sub0, %392.sub0, %412.sub0, implicit $exec |
| undef %412.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %54.sub1, %392.sub1, %412.sub0, implicit $exec |
| undef %412.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %54.sub2, %392.sub2, %412.sub0, implicit $exec |
| undef %412.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %54.sub3, %392.sub3, %412.sub0, implicit $exec |
| undef %413.sub0:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| undef %413.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %54.sub0, %393.sub0, %413.sub0, implicit $exec |
| undef %413.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %54.sub1, %393.sub1, %413.sub0, implicit $exec |
| undef %413.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %54.sub2, %393.sub2, %413.sub0, implicit $exec |
| undef %413.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %54.sub3, %393.sub3, %413.sub0, implicit $exec |
| undef %414.sub0:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| undef %414.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %54.sub0, %394.sub0, %414.sub0, implicit $exec |
| undef %414.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %54.sub1, %394.sub1, %414.sub0, implicit $exec |
| undef %414.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %54.sub2, %394.sub2, %414.sub0, implicit $exec |
| undef %414.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %54.sub3, %394.sub3, %414.sub0, implicit $exec |
| %411.sub1:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %411.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %55.sub0, %391.sub0, %411.sub1, implicit $exec |
| %411.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %55.sub1, %391.sub1, %411.sub1, implicit $exec |
| %411.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %55.sub2, %391.sub2, %411.sub1, implicit $exec |
| %411.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %55.sub3, %391.sub3, %411.sub1, implicit $exec |
| %412.sub1:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %412.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %55.sub0, %392.sub0, %412.sub1, implicit $exec |
| %412.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %55.sub1, %392.sub1, %412.sub1, implicit $exec |
| %412.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %55.sub2, %392.sub2, %412.sub1, implicit $exec |
| %412.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %55.sub3, %392.sub3, %412.sub1, implicit $exec |
| %413.sub1:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %413.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %55.sub0, %393.sub0, %413.sub1, implicit $exec |
| %413.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %55.sub1, %393.sub1, %413.sub1, implicit $exec |
| %413.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %55.sub2, %393.sub2, %413.sub1, implicit $exec |
| %413.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %55.sub3, %393.sub3, %413.sub1, implicit $exec |
| %414.sub1:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %414.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %55.sub0, %394.sub0, %414.sub1, implicit $exec |
| %414.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %55.sub1, %394.sub1, %414.sub1, implicit $exec |
| %414.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %55.sub2, %394.sub2, %414.sub1, implicit $exec |
| %414.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %55.sub3, %394.sub3, %414.sub1, implicit $exec |
| %411.sub2:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %411.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %56.sub0, %391.sub0, %411.sub2, implicit $exec |
| %411.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %56.sub1, %391.sub1, %411.sub2, implicit $exec |
| %411.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %56.sub2, %391.sub2, %411.sub2, implicit $exec |
| %411.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %56.sub3, %391.sub3, %411.sub2, implicit $exec |
| %412.sub2:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %412.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %56.sub0, %392.sub0, %412.sub2, implicit $exec |
| %412.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %56.sub1, %392.sub1, %412.sub2, implicit $exec |
| %412.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %56.sub2, %392.sub2, %412.sub2, implicit $exec |
| %412.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %56.sub3, %392.sub3, %412.sub2, implicit $exec |
| %413.sub2:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %413.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %56.sub0, %393.sub0, %413.sub2, implicit $exec |
| %413.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %56.sub1, %393.sub1, %413.sub2, implicit $exec |
| %413.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %56.sub2, %393.sub2, %413.sub2, implicit $exec |
| %413.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %56.sub3, %393.sub3, %413.sub2, implicit $exec |
| %414.sub2:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %414.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %56.sub0, %394.sub0, %414.sub2, implicit $exec |
| %414.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %56.sub1, %394.sub1, %414.sub2, implicit $exec |
| %414.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %56.sub2, %394.sub2, %414.sub2, implicit $exec |
| %414.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %56.sub3, %394.sub3, %414.sub2, implicit $exec |
| %411.sub3:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %411.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %57.sub0, %391.sub0, %411.sub3, implicit $exec |
| %411.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %57.sub1, %391.sub1, %411.sub3, implicit $exec |
| %411.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %57.sub2, %391.sub2, %411.sub3, implicit $exec |
| %411.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %57.sub3, %391.sub3, %411.sub3, implicit $exec |
| %412.sub3:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %412.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %57.sub0, %392.sub0, %412.sub3, implicit $exec |
| %412.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %57.sub1, %392.sub1, %412.sub3, implicit $exec |
| %412.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %57.sub2, %392.sub2, %412.sub3, implicit $exec |
| %412.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %57.sub3, %392.sub3, %412.sub3, implicit $exec |
| %413.sub3:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %413.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %57.sub0, %393.sub0, %413.sub3, implicit $exec |
| %413.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %57.sub1, %393.sub1, %413.sub3, implicit $exec |
| %413.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %57.sub2, %393.sub2, %413.sub3, implicit $exec |
| %413.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %57.sub3, %393.sub3, %413.sub3, implicit $exec |
| %414.sub3:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %414.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %57.sub0, %394.sub0, %414.sub3, implicit $exec |
| %414.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %57.sub1, %394.sub1, %414.sub3, implicit $exec |
| %414.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %57.sub2, %394.sub2, %414.sub3, implicit $exec |
| %414.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %57.sub3, %394.sub3, %414.sub3, implicit $exec |
| undef %415.sub0:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| undef %415.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %58.sub0, %391.sub0, %415.sub0, implicit $exec |
| undef %415.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %58.sub1, %391.sub1, %415.sub0, implicit $exec |
| undef %415.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %58.sub2, %391.sub2, %415.sub0, implicit $exec |
| undef %415.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %58.sub3, %391.sub3, %415.sub0, implicit $exec |
| undef %416.sub0:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| undef %416.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %58.sub0, %392.sub0, %416.sub0, implicit $exec |
| undef %416.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %58.sub1, %392.sub1, %416.sub0, implicit $exec |
| undef %416.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %58.sub2, %392.sub2, %416.sub0, implicit $exec |
| undef %416.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %58.sub3, %392.sub3, %416.sub0, implicit $exec |
| undef %417.sub0:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| undef %417.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %58.sub0, %393.sub0, %417.sub0, implicit $exec |
| undef %417.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %58.sub1, %393.sub1, %417.sub0, implicit $exec |
| undef %417.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %58.sub2, %393.sub2, %417.sub0, implicit $exec |
| undef %417.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %58.sub3, %393.sub3, %417.sub0, implicit $exec |
| undef %418.sub0:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| undef %418.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %58.sub0, %394.sub0, %418.sub0, implicit $exec |
| undef %418.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %58.sub1, %394.sub1, %418.sub0, implicit $exec |
| undef %418.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %58.sub2, %394.sub2, %418.sub0, implicit $exec |
| undef %418.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %58.sub3, %394.sub3, %418.sub0, implicit $exec |
| %415.sub1:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %415.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %59.sub0, %391.sub0, %415.sub1, implicit $exec |
| %415.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %59.sub1, %391.sub1, %415.sub1, implicit $exec |
| %415.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %59.sub2, %391.sub2, %415.sub1, implicit $exec |
| %415.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %59.sub3, %391.sub3, %415.sub1, implicit $exec |
| %416.sub1:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %416.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %59.sub0, %392.sub0, %416.sub1, implicit $exec |
| %416.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %59.sub1, %392.sub1, %416.sub1, implicit $exec |
| %416.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %59.sub2, %392.sub2, %416.sub1, implicit $exec |
| %416.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %59.sub3, %392.sub3, %416.sub1, implicit $exec |
| %417.sub1:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %417.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %59.sub0, %393.sub0, %417.sub1, implicit $exec |
| %417.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %59.sub1, %393.sub1, %417.sub1, implicit $exec |
| %417.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %59.sub2, %393.sub2, %417.sub1, implicit $exec |
| %417.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %59.sub3, %393.sub3, %417.sub1, implicit $exec |
| %418.sub1:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %418.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %59.sub0, %394.sub0, %418.sub1, implicit $exec |
| %418.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %59.sub1, %394.sub1, %418.sub1, implicit $exec |
| %418.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %59.sub2, %394.sub2, %418.sub1, implicit $exec |
| %418.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %59.sub3, %394.sub3, %418.sub1, implicit $exec |
| %415.sub2:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %415.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %60.sub0, %391.sub0, %415.sub2, implicit $exec |
| %415.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %60.sub1, %391.sub1, %415.sub2, implicit $exec |
| %415.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %60.sub2, %391.sub2, %415.sub2, implicit $exec |
| %415.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %60.sub3, %391.sub3, %415.sub2, implicit $exec |
| %416.sub2:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %416.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %60.sub0, %392.sub0, %416.sub2, implicit $exec |
| %416.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %60.sub1, %392.sub1, %416.sub2, implicit $exec |
| %416.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %60.sub2, %392.sub2, %416.sub2, implicit $exec |
| %416.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %60.sub3, %392.sub3, %416.sub2, implicit $exec |
| %417.sub2:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %417.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %60.sub0, %393.sub0, %417.sub2, implicit $exec |
| %417.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %60.sub1, %393.sub1, %417.sub2, implicit $exec |
| %417.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %60.sub2, %393.sub2, %417.sub2, implicit $exec |
| %417.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %60.sub3, %393.sub3, %417.sub2, implicit $exec |
| %418.sub2:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %418.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %60.sub0, %394.sub0, %418.sub2, implicit $exec |
| %418.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %60.sub1, %394.sub1, %418.sub2, implicit $exec |
| %418.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %60.sub2, %394.sub2, %418.sub2, implicit $exec |
| %418.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %60.sub3, %394.sub3, %418.sub2, implicit $exec |
| %415.sub3:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %415.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %61.sub0, %391.sub0, %415.sub3, implicit $exec |
| %415.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %61.sub1, %391.sub1, %415.sub3, implicit $exec |
| %415.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %61.sub2, %391.sub2, %415.sub3, implicit $exec |
| %415.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %61.sub3, %391.sub3, %415.sub3, implicit $exec |
| %416.sub3:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %416.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %61.sub0, %392.sub0, %416.sub3, implicit $exec |
| %416.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %61.sub1, %392.sub1, %416.sub3, implicit $exec |
| %416.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %61.sub2, %392.sub2, %416.sub3, implicit $exec |
| %416.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %61.sub3, %392.sub3, %416.sub3, implicit $exec |
| %417.sub3:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %417.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %61.sub0, %393.sub0, %417.sub3, implicit $exec |
| %417.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %61.sub1, %393.sub1, %417.sub3, implicit $exec |
| %417.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %61.sub2, %393.sub2, %417.sub3, implicit $exec |
| %417.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %61.sub3, %393.sub3, %417.sub3, implicit $exec |
| %418.sub3:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %418.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %61.sub0, %394.sub0, %418.sub3, implicit $exec |
| %418.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %61.sub1, %394.sub1, %418.sub3, implicit $exec |
| %418.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %61.sub2, %394.sub2, %418.sub3, implicit $exec |
| %418.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %61.sub3, %394.sub3, %418.sub3, implicit $exec |
| undef %419.sub0:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| undef %419.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %62.sub0, %391.sub0, %419.sub0, implicit $exec |
| undef %419.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %62.sub1, %391.sub1, %419.sub0, implicit $exec |
| undef %419.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %62.sub2, %391.sub2, %419.sub0, implicit $exec |
| undef %419.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %62.sub3, %391.sub3, %419.sub0, implicit $exec |
| undef %420.sub0:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| undef %420.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %62.sub0, %392.sub0, %420.sub0, implicit $exec |
| undef %420.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %62.sub1, %392.sub1, %420.sub0, implicit $exec |
| undef %420.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %62.sub2, %392.sub2, %420.sub0, implicit $exec |
| undef %420.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %62.sub3, %392.sub3, %420.sub0, implicit $exec |
| undef %421.sub0:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| undef %421.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %62.sub0, %393.sub0, %421.sub0, implicit $exec |
| undef %421.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %62.sub1, %393.sub1, %421.sub0, implicit $exec |
| undef %421.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %62.sub2, %393.sub2, %421.sub0, implicit $exec |
| undef %421.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %62.sub3, %393.sub3, %421.sub0, implicit $exec |
| undef %422.sub0:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| undef %422.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %62.sub0, %394.sub0, %422.sub0, implicit $exec |
| undef %422.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %62.sub1, %394.sub1, %422.sub0, implicit $exec |
| undef %422.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %62.sub2, %394.sub2, %422.sub0, implicit $exec |
| undef %422.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %62.sub3, %394.sub3, %422.sub0, implicit $exec |
| %419.sub1:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %419.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %63.sub0, %391.sub0, %419.sub1, implicit $exec |
| %419.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %63.sub1, %391.sub1, %419.sub1, implicit $exec |
| %419.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %63.sub2, %391.sub2, %419.sub1, implicit $exec |
| %419.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %63.sub3, %391.sub3, %419.sub1, implicit $exec |
| %420.sub1:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %420.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %63.sub0, %392.sub0, %420.sub1, implicit $exec |
| %420.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %63.sub1, %392.sub1, %420.sub1, implicit $exec |
| %420.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %63.sub2, %392.sub2, %420.sub1, implicit $exec |
| %420.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %63.sub3, %392.sub3, %420.sub1, implicit $exec |
| undef %423.sub0:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| undef %423.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %82.sub0, %391.sub0, %423.sub0, implicit $exec |
| undef %423.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %82.sub1, %391.sub1, %423.sub0, implicit $exec |
| undef %423.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %82.sub2, %391.sub2, %423.sub0, implicit $exec |
| undef %423.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %82.sub3, %391.sub3, %423.sub0, implicit $exec |
| undef %424.sub0:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| undef %424.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %82.sub0, %392.sub0, %424.sub0, implicit $exec |
| undef %424.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %82.sub1, %392.sub1, %424.sub0, implicit $exec |
| undef %424.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %82.sub2, %392.sub2, %424.sub0, implicit $exec |
| undef %424.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %82.sub3, %392.sub3, %424.sub0, implicit $exec |
| undef %425.sub0:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| undef %425.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %82.sub0, %393.sub0, %425.sub0, implicit $exec |
| undef %425.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %82.sub1, %393.sub1, %425.sub0, implicit $exec |
| undef %425.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %82.sub2, %393.sub2, %425.sub0, implicit $exec |
| undef %425.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %82.sub3, %393.sub3, %425.sub0, implicit $exec |
| undef %426.sub0:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| undef %426.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %82.sub0, %394.sub0, %426.sub0, implicit $exec |
| undef %426.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %82.sub1, %394.sub1, %426.sub0, implicit $exec |
| undef %426.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %82.sub2, %394.sub2, %426.sub0, implicit $exec |
| undef %426.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %82.sub3, %394.sub3, %426.sub0, implicit $exec |
| %423.sub1:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %423.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %83.sub0, %391.sub0, %423.sub1, implicit $exec |
| %423.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %83.sub1, %391.sub1, %423.sub1, implicit $exec |
| %423.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %83.sub2, %391.sub2, %423.sub1, implicit $exec |
| %423.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %83.sub3, %391.sub3, %423.sub1, implicit $exec |
| %424.sub1:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %424.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %83.sub0, %392.sub0, %424.sub1, implicit $exec |
| %424.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %83.sub1, %392.sub1, %424.sub1, implicit $exec |
| %424.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %83.sub2, %392.sub2, %424.sub1, implicit $exec |
| %424.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %83.sub3, %392.sub3, %424.sub1, implicit $exec |
| %425.sub1:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %425.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %83.sub0, %393.sub0, %425.sub1, implicit $exec |
| %425.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %83.sub1, %393.sub1, %425.sub1, implicit $exec |
| %425.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %83.sub2, %393.sub2, %425.sub1, implicit $exec |
| %425.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %83.sub3, %393.sub3, %425.sub1, implicit $exec |
| %426.sub1:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %426.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %83.sub0, %394.sub0, %426.sub1, implicit $exec |
| %426.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %83.sub1, %394.sub1, %426.sub1, implicit $exec |
| %426.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %83.sub2, %394.sub2, %426.sub1, implicit $exec |
| %426.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %83.sub3, %394.sub3, %426.sub1, implicit $exec |
| %423.sub2:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %423.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %84.sub0, %391.sub0, %423.sub2, implicit $exec |
| %423.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %84.sub1, %391.sub1, %423.sub2, implicit $exec |
| %423.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %84.sub2, %391.sub2, %423.sub2, implicit $exec |
| %423.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %84.sub3, %391.sub3, %423.sub2, implicit $exec |
| %424.sub2:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %424.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %84.sub0, %392.sub0, %424.sub2, implicit $exec |
| %424.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %84.sub1, %392.sub1, %424.sub2, implicit $exec |
| %424.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %84.sub2, %392.sub2, %424.sub2, implicit $exec |
| %424.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %84.sub3, %392.sub3, %424.sub2, implicit $exec |
| %425.sub2:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %425.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %84.sub0, %393.sub0, %425.sub2, implicit $exec |
| %425.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %84.sub1, %393.sub1, %425.sub2, implicit $exec |
| %425.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %84.sub2, %393.sub2, %425.sub2, implicit $exec |
| %425.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %84.sub3, %393.sub3, %425.sub2, implicit $exec |
| %426.sub2:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %426.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %84.sub0, %394.sub0, %426.sub2, implicit $exec |
| %426.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %84.sub1, %394.sub1, %426.sub2, implicit $exec |
| %426.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %84.sub2, %394.sub2, %426.sub2, implicit $exec |
| %426.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %84.sub3, %394.sub3, %426.sub2, implicit $exec |
| %423.sub3:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %423.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %85.sub0, %391.sub0, %423.sub3, implicit $exec |
| %423.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %85.sub1, %391.sub1, %423.sub3, implicit $exec |
| %423.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %85.sub2, %391.sub2, %423.sub3, implicit $exec |
| %423.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %85.sub3, %391.sub3, %423.sub3, implicit $exec |
| %424.sub3:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %424.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %85.sub0, %392.sub0, %424.sub3, implicit $exec |
| %424.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %85.sub1, %392.sub1, %424.sub3, implicit $exec |
| %424.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %85.sub2, %392.sub2, %424.sub3, implicit $exec |
| %424.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %85.sub3, %392.sub3, %424.sub3, implicit $exec |
| %425.sub3:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %425.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %85.sub0, %393.sub0, %425.sub3, implicit $exec |
| %425.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %85.sub1, %393.sub1, %425.sub3, implicit $exec |
| %425.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %85.sub2, %393.sub2, %425.sub3, implicit $exec |
| %425.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %85.sub3, %393.sub3, %425.sub3, implicit $exec |
| %426.sub3:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %426.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %85.sub0, %394.sub0, %426.sub3, implicit $exec |
| %426.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %85.sub1, %394.sub1, %426.sub3, implicit $exec |
| %426.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %85.sub2, %394.sub2, %426.sub3, implicit $exec |
| %426.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %85.sub3, %394.sub3, %426.sub3, implicit $exec |
| undef %427.sub0:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| undef %427.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %86.sub0, %391.sub0, %427.sub0, implicit $exec |
| undef %427.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %86.sub1, %391.sub1, %427.sub0, implicit $exec |
| undef %427.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %86.sub2, %391.sub2, %427.sub0, implicit $exec |
| undef %427.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %86.sub3, %391.sub3, %427.sub0, implicit $exec |
| undef %428.sub0:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| undef %428.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %86.sub0, %392.sub0, %428.sub0, implicit $exec |
| undef %428.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %86.sub1, %392.sub1, %428.sub0, implicit $exec |
| undef %428.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %86.sub2, %392.sub2, %428.sub0, implicit $exec |
| undef %428.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %86.sub3, %392.sub3, %428.sub0, implicit $exec |
| undef %429.sub0:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| undef %429.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %86.sub0, %393.sub0, %429.sub0, implicit $exec |
| undef %429.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %86.sub1, %393.sub1, %429.sub0, implicit $exec |
| undef %429.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %86.sub2, %393.sub2, %429.sub0, implicit $exec |
| undef %429.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %86.sub3, %393.sub3, %429.sub0, implicit $exec |
| undef %430.sub0:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| undef %430.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %86.sub0, %394.sub0, %430.sub0, implicit $exec |
| undef %430.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %86.sub1, %394.sub1, %430.sub0, implicit $exec |
| undef %430.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %86.sub2, %394.sub2, %430.sub0, implicit $exec |
| undef %430.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %86.sub3, %394.sub3, %430.sub0, implicit $exec |
| %427.sub1:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %427.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %87.sub0, %391.sub0, %427.sub1, implicit $exec |
| %427.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %87.sub1, %391.sub1, %427.sub1, implicit $exec |
| %427.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %87.sub2, %391.sub2, %427.sub1, implicit $exec |
| %427.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %87.sub3, %391.sub3, %427.sub1, implicit $exec |
| %428.sub1:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %428.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %87.sub0, %392.sub0, %428.sub1, implicit $exec |
| %428.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %87.sub1, %392.sub1, %428.sub1, implicit $exec |
| %428.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %87.sub2, %392.sub2, %428.sub1, implicit $exec |
| %428.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %87.sub3, %392.sub3, %428.sub1, implicit $exec |
| %429.sub1:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %429.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %87.sub0, %393.sub0, %429.sub1, implicit $exec |
| %429.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %87.sub1, %393.sub1, %429.sub1, implicit $exec |
| %429.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %87.sub2, %393.sub2, %429.sub1, implicit $exec |
| %429.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %87.sub3, %393.sub3, %429.sub1, implicit $exec |
| %430.sub1:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %430.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %87.sub0, %394.sub0, %430.sub1, implicit $exec |
| %430.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %87.sub1, %394.sub1, %430.sub1, implicit $exec |
| %430.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %87.sub2, %394.sub2, %430.sub1, implicit $exec |
| %430.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %87.sub3, %394.sub3, %430.sub1, implicit $exec |
| %427.sub2:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %427.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %88.sub0, %391.sub0, %427.sub2, implicit $exec |
| %427.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %88.sub1, %391.sub1, %427.sub2, implicit $exec |
| %427.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %88.sub2, %391.sub2, %427.sub2, implicit $exec |
| %427.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %88.sub3, %391.sub3, %427.sub2, implicit $exec |
| %428.sub2:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %428.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %88.sub0, %392.sub0, %428.sub2, implicit $exec |
| %428.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %88.sub1, %392.sub1, %428.sub2, implicit $exec |
| %428.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %88.sub2, %392.sub2, %428.sub2, implicit $exec |
| %428.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %88.sub3, %392.sub3, %428.sub2, implicit $exec |
| %429.sub2:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %429.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %88.sub0, %393.sub0, %429.sub2, implicit $exec |
| %429.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %88.sub1, %393.sub1, %429.sub2, implicit $exec |
| %429.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %88.sub2, %393.sub2, %429.sub2, implicit $exec |
| %429.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %88.sub3, %393.sub3, %429.sub2, implicit $exec |
| %430.sub2:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %430.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %88.sub0, %394.sub0, %430.sub2, implicit $exec |
| %430.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %88.sub1, %394.sub1, %430.sub2, implicit $exec |
| %430.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %88.sub2, %394.sub2, %430.sub2, implicit $exec |
| %430.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %88.sub3, %394.sub3, %430.sub2, implicit $exec |
| %427.sub3:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %427.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %89.sub0, %391.sub0, %427.sub3, implicit $exec |
| %427.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %89.sub1, %391.sub1, %427.sub3, implicit $exec |
| %427.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %89.sub2, %391.sub2, %427.sub3, implicit $exec |
| %427.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %89.sub3, %391.sub3, %427.sub3, implicit $exec |
| %428.sub3:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %428.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %89.sub0, %392.sub0, %428.sub3, implicit $exec |
| %428.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %89.sub1, %392.sub1, %428.sub3, implicit $exec |
| %428.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %89.sub2, %392.sub2, %428.sub3, implicit $exec |
| %428.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %89.sub3, %392.sub3, %428.sub3, implicit $exec |
| %429.sub3:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %429.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %89.sub0, %393.sub0, %429.sub3, implicit $exec |
| %429.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %89.sub1, %393.sub1, %429.sub3, implicit $exec |
| %429.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %89.sub2, %393.sub2, %429.sub3, implicit $exec |
| %429.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %89.sub3, %393.sub3, %429.sub3, implicit $exec |
| %430.sub3:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %430.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %89.sub0, %394.sub0, %430.sub3, implicit $exec |
| %430.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %89.sub1, %394.sub1, %430.sub3, implicit $exec |
| %430.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %89.sub2, %394.sub2, %430.sub3, implicit $exec |
| %430.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %89.sub3, %394.sub3, %430.sub3, implicit $exec |
| undef %431.sub0:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| undef %431.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %90.sub0, %391.sub0, %431.sub0, implicit $exec |
| undef %431.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %90.sub1, %391.sub1, %431.sub0, implicit $exec |
| undef %431.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %90.sub2, %391.sub2, %431.sub0, implicit $exec |
| undef %431.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %90.sub3, %391.sub3, %431.sub0, implicit $exec |
| undef %432.sub0:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| undef %432.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %90.sub0, %392.sub0, %432.sub0, implicit $exec |
| undef %432.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %90.sub1, %392.sub1, %432.sub0, implicit $exec |
| undef %432.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %90.sub2, %392.sub2, %432.sub0, implicit $exec |
| undef %432.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %90.sub3, %392.sub3, %432.sub0, implicit $exec |
| undef %433.sub0:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| undef %433.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %90.sub0, %393.sub0, %433.sub0, implicit $exec |
| undef %433.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %90.sub1, %393.sub1, %433.sub0, implicit $exec |
| undef %433.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %90.sub2, %393.sub2, %433.sub0, implicit $exec |
| undef %433.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %90.sub3, %393.sub3, %433.sub0, implicit $exec |
| undef %434.sub0:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| undef %434.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %90.sub0, %394.sub0, %434.sub0, implicit $exec |
| undef %434.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %90.sub1, %394.sub1, %434.sub0, implicit $exec |
| undef %434.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %90.sub2, %394.sub2, %434.sub0, implicit $exec |
| undef %434.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %90.sub3, %394.sub3, %434.sub0, implicit $exec |
| %431.sub1:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %431.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %91.sub0, %391.sub0, %431.sub1, implicit $exec |
| %431.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %91.sub1, %391.sub1, %431.sub1, implicit $exec |
| %431.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %91.sub2, %391.sub2, %431.sub1, implicit $exec |
| %431.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %91.sub3, %391.sub3, %431.sub1, implicit $exec |
| %432.sub1:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %432.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %91.sub0, %392.sub0, %432.sub1, implicit $exec |
| %432.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %91.sub1, %392.sub1, %432.sub1, implicit $exec |
| %432.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %91.sub2, %392.sub2, %432.sub1, implicit $exec |
| %432.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %91.sub3, %392.sub3, %432.sub1, implicit $exec |
| %433.sub1:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %433.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %91.sub0, %393.sub0, %433.sub1, implicit $exec |
| %433.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %91.sub1, %393.sub1, %433.sub1, implicit $exec |
| %433.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %91.sub2, %393.sub2, %433.sub1, implicit $exec |
| %433.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %91.sub3, %393.sub3, %433.sub1, implicit $exec |
| %434.sub1:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %434.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %91.sub0, %394.sub0, %434.sub1, implicit $exec |
| %434.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %91.sub1, %394.sub1, %434.sub1, implicit $exec |
| %434.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %91.sub2, %394.sub2, %434.sub1, implicit $exec |
| %434.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %91.sub3, %394.sub3, %434.sub1, implicit $exec |
| %431.sub2:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %431.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %92.sub0, %391.sub0, %431.sub2, implicit $exec |
| %431.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %92.sub1, %391.sub1, %431.sub2, implicit $exec |
| %431.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %92.sub2, %391.sub2, %431.sub2, implicit $exec |
| %431.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %92.sub3, %391.sub3, %431.sub2, implicit $exec |
| %432.sub2:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %432.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %92.sub0, %392.sub0, %432.sub2, implicit $exec |
| %432.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %92.sub1, %392.sub1, %432.sub2, implicit $exec |
| %432.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %92.sub2, %392.sub2, %432.sub2, implicit $exec |
| %432.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %92.sub3, %392.sub3, %432.sub2, implicit $exec |
| %433.sub2:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %433.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %92.sub0, %393.sub0, %433.sub2, implicit $exec |
| %433.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %92.sub1, %393.sub1, %433.sub2, implicit $exec |
| %433.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %92.sub2, %393.sub2, %433.sub2, implicit $exec |
| %433.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %92.sub3, %393.sub3, %433.sub2, implicit $exec |
| %434.sub2:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %434.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %92.sub0, %394.sub0, %434.sub2, implicit $exec |
| %434.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %92.sub1, %394.sub1, %434.sub2, implicit $exec |
| %434.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %92.sub2, %394.sub2, %434.sub2, implicit $exec |
| %434.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %92.sub3, %394.sub3, %434.sub2, implicit $exec |
| %431.sub3:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %431.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %93.sub0, %391.sub0, %431.sub3, implicit $exec |
| %431.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %93.sub1, %391.sub1, %431.sub3, implicit $exec |
| %431.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %93.sub2, %391.sub2, %431.sub3, implicit $exec |
| %431.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %93.sub3, %391.sub3, %431.sub3, implicit $exec |
| %432.sub3:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %432.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %93.sub0, %392.sub0, %432.sub3, implicit $exec |
| %432.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %93.sub1, %392.sub1, %432.sub3, implicit $exec |
| %432.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %93.sub2, %392.sub2, %432.sub3, implicit $exec |
| %432.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %93.sub3, %392.sub3, %432.sub3, implicit $exec |
| %433.sub3:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %433.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %93.sub0, %393.sub0, %433.sub3, implicit $exec |
| %433.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %93.sub1, %393.sub1, %433.sub3, implicit $exec |
| %433.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %93.sub2, %393.sub2, %433.sub3, implicit $exec |
| %433.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %93.sub3, %393.sub3, %433.sub3, implicit $exec |
| %434.sub3:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %434.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %93.sub0, %394.sub0, %434.sub3, implicit $exec |
| %434.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %93.sub1, %394.sub1, %434.sub3, implicit $exec |
| %434.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %93.sub2, %394.sub2, %434.sub3, implicit $exec |
| %434.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %93.sub3, %394.sub3, %434.sub3, implicit $exec |
| undef %435.sub0:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| undef %435.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %94.sub0, %391.sub0, %435.sub0, implicit $exec |
| undef %435.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %94.sub1, %391.sub1, %435.sub0, implicit $exec |
| undef %435.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %94.sub2, %391.sub2, %435.sub0, implicit $exec |
| undef %435.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %94.sub3, %391.sub3, %435.sub0, implicit $exec |
| undef %436.sub0:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| undef %436.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %94.sub0, %392.sub0, %436.sub0, implicit $exec |
| undef %436.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %94.sub1, %392.sub1, %436.sub0, implicit $exec |
| undef %436.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %94.sub2, %392.sub2, %436.sub0, implicit $exec |
| undef %436.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %94.sub3, %392.sub3, %436.sub0, implicit $exec |
| undef %437.sub0:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| undef %437.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %94.sub0, %393.sub0, %437.sub0, implicit $exec |
| undef %437.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %94.sub1, %393.sub1, %437.sub0, implicit $exec |
| undef %437.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %94.sub2, %393.sub2, %437.sub0, implicit $exec |
| undef %437.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %94.sub3, %393.sub3, %437.sub0, implicit $exec |
| undef %438.sub0:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| undef %438.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %94.sub0, %394.sub0, %438.sub0, implicit $exec |
| undef %438.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %94.sub1, %394.sub1, %438.sub0, implicit $exec |
| undef %438.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %94.sub2, %394.sub2, %438.sub0, implicit $exec |
| undef %438.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %94.sub3, %394.sub3, %438.sub0, implicit $exec |
| %435.sub1:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %435.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %95.sub0, %391.sub0, %435.sub1, implicit $exec |
| %435.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %95.sub1, %391.sub1, %435.sub1, implicit $exec |
| %435.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %95.sub2, %391.sub2, %435.sub1, implicit $exec |
| %435.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %95.sub3, %391.sub3, %435.sub1, implicit $exec |
| %436.sub1:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %436.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %95.sub0, %392.sub0, %436.sub1, implicit $exec |
| %436.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %95.sub1, %392.sub1, %436.sub1, implicit $exec |
| %436.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %95.sub2, %392.sub2, %436.sub1, implicit $exec |
| %436.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %95.sub3, %392.sub3, %436.sub1, implicit $exec |
| %437.sub1:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %437.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %95.sub0, %393.sub0, %437.sub1, implicit $exec |
| %437.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %95.sub1, %393.sub1, %437.sub1, implicit $exec |
| %437.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %95.sub2, %393.sub2, %437.sub1, implicit $exec |
| %437.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %95.sub3, %393.sub3, %437.sub1, implicit $exec |
| %438.sub1:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %438.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %95.sub0, %394.sub0, %438.sub1, implicit $exec |
| %438.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %95.sub1, %394.sub1, %438.sub1, implicit $exec |
| %438.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %95.sub2, %394.sub2, %438.sub1, implicit $exec |
| %438.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %95.sub3, %394.sub3, %438.sub1, implicit $exec |
| %435.sub2:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %435.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %96.sub0, %391.sub0, %435.sub2, implicit $exec |
| %435.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %96.sub1, %391.sub1, %435.sub2, implicit $exec |
| %435.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %96.sub2, %391.sub2, %435.sub2, implicit $exec |
| %435.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %96.sub3, %391.sub3, %435.sub2, implicit $exec |
| %436.sub2:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %436.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %96.sub0, %392.sub0, %436.sub2, implicit $exec |
| %436.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %96.sub1, %392.sub1, %436.sub2, implicit $exec |
| %436.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %96.sub2, %392.sub2, %436.sub2, implicit $exec |
| %436.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %96.sub3, %392.sub3, %436.sub2, implicit $exec |
| %437.sub2:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %437.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %96.sub0, %393.sub0, %437.sub2, implicit $exec |
| %437.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %96.sub1, %393.sub1, %437.sub2, implicit $exec |
| %437.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %96.sub2, %393.sub2, %437.sub2, implicit $exec |
| %437.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %96.sub3, %393.sub3, %437.sub2, implicit $exec |
| %438.sub2:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %438.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %96.sub0, %394.sub0, %438.sub2, implicit $exec |
| %438.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %96.sub1, %394.sub1, %438.sub2, implicit $exec |
| %438.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %96.sub2, %394.sub2, %438.sub2, implicit $exec |
| %438.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %96.sub3, %394.sub3, %438.sub2, implicit $exec |
| %435.sub3:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %435.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %97.sub0, %391.sub0, %435.sub3, implicit $exec |
| %435.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %97.sub1, %391.sub1, %435.sub3, implicit $exec |
| %435.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %97.sub2, %391.sub2, %435.sub3, implicit $exec |
| %435.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %97.sub3, %391.sub3, %435.sub3, implicit $exec |
| %436.sub3:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %436.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %97.sub0, %392.sub0, %436.sub3, implicit $exec |
| %436.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %97.sub1, %392.sub1, %436.sub3, implicit $exec |
| %436.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %97.sub2, %392.sub2, %436.sub3, implicit $exec |
| %436.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %97.sub3, %392.sub3, %436.sub3, implicit $exec |
| %437.sub3:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %437.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %97.sub0, %393.sub0, %437.sub3, implicit $exec |
| %437.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %97.sub1, %393.sub1, %437.sub3, implicit $exec |
| %437.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %97.sub2, %393.sub2, %437.sub3, implicit $exec |
| %437.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %97.sub3, %393.sub3, %437.sub3, implicit $exec |
| %438.sub3:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %438.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %97.sub0, %394.sub0, %438.sub3, implicit $exec |
| %438.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %97.sub1, %394.sub1, %438.sub3, implicit $exec |
| %438.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %97.sub2, %394.sub2, %438.sub3, implicit $exec |
| %438.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %97.sub3, %394.sub3, %438.sub3, implicit $exec |
| undef %439.sub0:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| undef %439.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %98.sub0, %391.sub0, %439.sub0, implicit $exec |
| undef %439.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %98.sub1, %391.sub1, %439.sub0, implicit $exec |
| undef %439.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %98.sub2, %391.sub2, %439.sub0, implicit $exec |
| undef %439.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %98.sub3, %391.sub3, %439.sub0, implicit $exec |
| undef %440.sub0:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| undef %440.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %98.sub0, %392.sub0, %440.sub0, implicit $exec |
| undef %440.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %98.sub1, %392.sub1, %440.sub0, implicit $exec |
| undef %440.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %98.sub2, %392.sub2, %440.sub0, implicit $exec |
| undef %440.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %98.sub3, %392.sub3, %440.sub0, implicit $exec |
| undef %441.sub0:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| undef %441.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %98.sub0, %393.sub0, %441.sub0, implicit $exec |
| undef %441.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %98.sub1, %393.sub1, %441.sub0, implicit $exec |
| undef %441.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %98.sub2, %393.sub2, %441.sub0, implicit $exec |
| undef %441.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %98.sub3, %393.sub3, %441.sub0, implicit $exec |
| undef %442.sub0:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| undef %442.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %98.sub0, %394.sub0, %442.sub0, implicit $exec |
| undef %442.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %98.sub1, %394.sub1, %442.sub0, implicit $exec |
| undef %442.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %98.sub2, %394.sub2, %442.sub0, implicit $exec |
| undef %442.sub0:vreg_128_align2 = V_DOT4C_I32_I8_e32 %98.sub3, %394.sub3, %442.sub0, implicit $exec |
| %439.sub1:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %439.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %99.sub0, %391.sub0, %439.sub1, implicit $exec |
| %439.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %99.sub1, %391.sub1, %439.sub1, implicit $exec |
| %439.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %99.sub2, %391.sub2, %439.sub1, implicit $exec |
| %439.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %99.sub3, %391.sub3, %439.sub1, implicit $exec |
| %440.sub1:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %440.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %99.sub0, %392.sub0, %440.sub1, implicit $exec |
| %440.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %99.sub1, %392.sub1, %440.sub1, implicit $exec |
| %440.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %99.sub2, %392.sub2, %440.sub1, implicit $exec |
| %440.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %99.sub3, %392.sub3, %440.sub1, implicit $exec |
| %441.sub1:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %441.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %99.sub0, %393.sub0, %441.sub1, implicit $exec |
| %441.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %99.sub1, %393.sub1, %441.sub1, implicit $exec |
| %441.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %99.sub2, %393.sub2, %441.sub1, implicit $exec |
| %441.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %99.sub3, %393.sub3, %441.sub1, implicit $exec |
| %442.sub1:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %442.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %99.sub0, %394.sub0, %442.sub1, implicit $exec |
| %442.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %99.sub1, %394.sub1, %442.sub1, implicit $exec |
| %442.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %99.sub2, %394.sub2, %442.sub1, implicit $exec |
| %442.sub1:vreg_128_align2 = V_DOT4C_I32_I8_e32 %99.sub3, %394.sub3, %442.sub1, implicit $exec |
| %439.sub2:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %439.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %100.sub0, %391.sub0, %439.sub2, implicit $exec |
| %439.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %100.sub1, %391.sub1, %439.sub2, implicit $exec |
| %439.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %100.sub2, %391.sub2, %439.sub2, implicit $exec |
| %439.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %100.sub3, %391.sub3, %439.sub2, implicit $exec |
| %440.sub2:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %440.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %100.sub0, %392.sub0, %440.sub2, implicit $exec |
| %440.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %100.sub1, %392.sub1, %440.sub2, implicit $exec |
| %440.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %100.sub2, %392.sub2, %440.sub2, implicit $exec |
| %440.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %100.sub3, %392.sub3, %440.sub2, implicit $exec |
| %441.sub2:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %441.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %100.sub0, %393.sub0, %441.sub2, implicit $exec |
| %441.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %100.sub1, %393.sub1, %441.sub2, implicit $exec |
| %441.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %100.sub2, %393.sub2, %441.sub2, implicit $exec |
| %441.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %100.sub3, %393.sub3, %441.sub2, implicit $exec |
| %442.sub2:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %442.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %100.sub0, %394.sub0, %442.sub2, implicit $exec |
| %442.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %100.sub1, %394.sub1, %442.sub2, implicit $exec |
| %442.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %100.sub2, %394.sub2, %442.sub2, implicit $exec |
| %442.sub2:vreg_128_align2 = V_DOT4C_I32_I8_e32 %100.sub3, %394.sub3, %442.sub2, implicit $exec |
| %439.sub3:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %439.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %101.sub0, %391.sub0, %439.sub3, implicit $exec |
| %439.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %101.sub1, %391.sub1, %439.sub3, implicit $exec |
| %439.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %101.sub2, %391.sub2, %439.sub3, implicit $exec |
| %439.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %101.sub3, %391.sub3, %439.sub3, implicit $exec |
| %440.sub3:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %440.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %101.sub0, %392.sub0, %440.sub3, implicit $exec |
| %440.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %101.sub1, %392.sub1, %440.sub3, implicit $exec |
| %440.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %101.sub2, %392.sub2, %440.sub3, implicit $exec |
| %440.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %101.sub3, %392.sub3, %440.sub3, implicit $exec |
| %441.sub3:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %441.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %101.sub0, %393.sub0, %441.sub3, implicit $exec |
| %441.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %101.sub1, %393.sub1, %441.sub3, implicit $exec |
| %441.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %101.sub2, %393.sub2, %441.sub3, implicit $exec |
| %441.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %101.sub3, %393.sub3, %441.sub3, implicit $exec |
| %442.sub3:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %442.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %101.sub0, %394.sub0, %442.sub3, implicit $exec |
| %442.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %101.sub1, %394.sub1, %442.sub3, implicit $exec |
| %442.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %101.sub2, %394.sub2, %442.sub3, implicit $exec |
| %442.sub3:vreg_128_align2 = V_DOT4C_I32_I8_e32 %101.sub3, %394.sub3, %442.sub3, implicit $exec |
| DS_WRITE_B128_gfx9 %140, %395, 0, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %140, %396, 2048, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %142, %397, 0, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %142, %398, 2048, 0, implicit $exec |
| WAVE_BARRIER |
| %443:vreg_128_align2 = DS_READ_B128_gfx9 %183, 0, 0, implicit $exec |
| %444:vreg_128_align2 = DS_READ_B128_gfx9 %183, 256, 0, implicit $exec |
| %445:vreg_128_align2 = DS_READ_B128_gfx9 %183, 128, 0, implicit $exec |
| %446:vreg_128_align2 = DS_READ_B128_gfx9 %183, 384, 0, implicit $exec |
| WAVE_BARRIER |
| DS_WRITE_B128_gfx9 %140, %399, 0, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %140, %400, 2048, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %142, %401, 0, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %142, %402, 2048, 0, implicit $exec |
| WAVE_BARRIER |
| WAVE_BARRIER |
| DS_WRITE_B128_gfx9 %140, %403, 0, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %140, %404, 2048, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %142, %405, 0, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %142, %406, 2048, 0, implicit $exec |
| WAVE_BARRIER |
| WAVE_BARRIER |
| DS_WRITE_B128_gfx9 %140, %407, 0, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %140, %408, 2048, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %142, %409, 0, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %142, %410, 2048, 0, implicit $exec |
| WAVE_BARRIER |
| WAVE_BARRIER |
| DS_WRITE_B128_gfx9 %140, %411, 0, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %140, %412, 2048, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %142, %413, 0, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %142, %414, 2048, 0, implicit $exec |
| WAVE_BARRIER |
| WAVE_BARRIER |
| DS_WRITE_B128_gfx9 %140, %415, 0, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %140, %416, 2048, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %142, %417, 0, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %142, %418, 2048, 0, implicit $exec |
| WAVE_BARRIER |
| WAVE_BARRIER |
| DS_WRITE_B128_gfx9 %140, %419, 0, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %140, %420, 2048, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %142, %421, 0, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %142, %422, 2048, 0, implicit $exec |
| WAVE_BARRIER |
| DS_WRITE_B128_gfx9 %140, %431, 0, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %140, %432, 2048, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %142, %433, 0, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %142, %434, 2048, 0, implicit $exec |
| WAVE_BARRIER |
| WAVE_BARRIER |
| DS_WRITE_B128_gfx9 %140, %435, 0, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %140, %436, 2048, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %142, %437, 0, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %142, %438, 2048, 0, implicit $exec |
| WAVE_BARRIER |
| WAVE_BARRIER |
| DS_WRITE_B128_gfx9 %140, %439, 0, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %140, %440, 2048, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %142, %441, 0, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %142, %442, 2048, 0, implicit $exec |
| WAVE_BARRIER |
| %447:vgpr_32 = GLOBAL_LOAD_UBYTE_SADDR %5, %11, 0, 0, implicit $exec |
| %103:sreg_32_xm0 = V_READFIRSTLANE_B32 %447, implicit $exec |
| %104:vgpr_32 = GLOBAL_LOAD_USHORT_SADDR %10.sub0_sub1, %11, 0, 0, implicit $exec |
| %448:sreg_32 = S_SEXT_I32_I8 %317 |
| %449:vgpr_32 = V_MOV_B32_dpp undef %449, %11, 280, 15, 15, -1, implicit $exec |
| %450:vgpr_32 = V_MAXIMUM3_F32_e64 0, %449, 0, 0, 0, 0, 0, 0, implicit $exec |
| %451:vgpr_32 = V_MOV_B32_dpp undef %451, %450, 276, 15, 15, -1, implicit $exec |
| %452:vgpr_32 = V_MAXIMUM3_F32_e64 0, %450, 0, %451, 0, %451, 0, 0, implicit $exec |
| %453:vgpr_32 = V_MOV_B32_dpp undef %453, %452, 274, 15, 15, -1, implicit $exec |
| %454:vgpr_32 = V_MAXIMUM3_F32_e64 0, %452, 0, %453, 0, %453, 0, 0, implicit $exec |
| %455:vgpr_32 = V_MOV_B32_dpp undef %455, %454, 273, 15, 15, -1, implicit $exec |
| %456:vgpr_32 = V_MAXIMUM3_F32_e64 0, %454, 0, %455, 0, %455, 0, 0, implicit $exec |
| %457:vgpr_32 = COPY %456 |
| %457:vgpr_32 = V_MOV_B32_dpp %457, %457, 322, 10, 15, -1, implicit $exec |
| %458:vgpr_32 = V_MAXIMUM3_F32_e64 0, %456, 0, %457, 0, %457, 0, 0, implicit $exec |
| %459:vgpr_32 = V_MOV_B32_dpp undef %459, %458, 323, 15, 15, -1, implicit $exec |
| %460:vgpr_32 = V_MAXIMUM3_F32_e64 0, %458, 0, %459, 0, %459, 0, 0, implicit $exec |
| %461:sgpr_32 = V_READLANE_B32 %460, 63 |
| %462:vgpr_32 = V_SUBREV_U32_e32 %448, %444.sub0, implicit $exec |
| %463:vgpr_32 = V_SUBREV_U32_e32 %448, %443.sub0, implicit $exec |
| %464:vgpr_32 = V_CVT_F32_I32_e32 %462, implicit $mode, implicit $exec |
| %465:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 %464, implicit $mode, implicit $exec |
| %466:vgpr_32 = V_CVT_F32_I32_e32 %463, implicit $mode, implicit $exec |
| %467:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 %466, implicit $mode, implicit $exec |
| %468:vgpr_32 = nofpexcept V_PACK_B32_F16_e64 0, %467, 0, %465, 0, 0, implicit $mode, implicit $exec |
| %469:vgpr_32 = nofpexcept V_PK_MUL_F16 0, %318, 8, %468, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| undef %470.sub0:vreg_64_align2 = nofpexcept V_CVT_F32_F16_e32 %469, implicit $mode, implicit $exec |
| %471:vgpr_32 = V_LSHRREV_B32_e32 16, %469, implicit $exec |
| %470.sub1:vreg_64_align2 = nofpexcept V_CVT_F32_F16_e32 %471, implicit $mode, implicit $exec |
| %472:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %470, 0, %184, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %473:vgpr_32 = V_MAXIMUM3_F32_e64 0, %472.sub0, 0, %472.sub1, 0, %472.sub1, 0, 0, implicit $exec |
| %474:vgpr_32 = V_MOV_B32_dpp undef %474, %473, 280, 15, 15, -1, implicit $exec |
| %475:vgpr_32 = V_MAXIMUM3_F32_e64 0, %473, 0, %474, 0, %474, 0, 0, implicit $exec |
| %476:vgpr_32 = V_MOV_B32_dpp undef %476, %475, 276, 15, 15, -1, implicit $exec |
| %477:vgpr_32 = V_MAXIMUM3_F32_e64 0, %475, 0, %476, 0, %476, 0, 0, implicit $exec |
| %478:vgpr_32 = V_MOV_B32_dpp undef %478, %477, 274, 15, 15, -1, implicit $exec |
| %479:vgpr_32 = V_MAXIMUM3_F32_e64 0, %477, 0, %478, 0, %478, 0, 0, implicit $exec |
| %480:vgpr_32 = V_MOV_B32_dpp undef %480, %479, 273, 15, 15, -1, implicit $exec |
| %481:vgpr_32 = V_MAXIMUM3_F32_e64 0, %479, 0, %480, 0, %480, 0, 0, implicit $exec |
| %482:vgpr_32 = COPY %481 |
| %482:vgpr_32 = V_MOV_B32_dpp %482, %482, 322, 10, 15, -1, implicit $exec |
| %483:vgpr_32 = V_MAXIMUM3_F32_e64 0, %481, 0, %482, 0, %482, 0, 0, implicit $exec |
| %484:vgpr_32 = V_MOV_B32_dpp undef %484, %483, 323, 15, 15, -1, implicit $exec |
| %485:vgpr_32 = V_MAXIMUM3_F32_e64 0, %483, 0, %484, 0, %484, 0, 0, implicit $exec |
| %486:sgpr_32 = V_READLANE_B32 %485, 63 |
| %487:vgpr_32 = V_SUBREV_U32_e32 %448, %444.sub1, implicit $exec |
| %488:vgpr_32 = V_SUBREV_U32_e32 %448, %443.sub1, implicit $exec |
| %489:vgpr_32 = V_CVT_F32_I32_e32 %487, implicit $mode, implicit $exec |
| %490:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 %489, implicit $mode, implicit $exec |
| %491:vgpr_32 = V_CVT_F32_I32_e32 %488, implicit $mode, implicit $exec |
| %492:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 %491, implicit $mode, implicit $exec |
| %493:vgpr_32 = nofpexcept V_PACK_B32_F16_e64 0, %492, 0, %490, 0, 0, implicit $mode, implicit $exec |
| %494:vgpr_32 = nofpexcept V_PK_MUL_F16 0, %318, 8, %493, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| undef %495.sub0:vreg_64_align2 = nofpexcept V_CVT_F32_F16_e32 %494, implicit $mode, implicit $exec |
| %496:vgpr_32 = V_LSHRREV_B32_e32 16, %494, implicit $exec |
| %495.sub1:vreg_64_align2 = nofpexcept V_CVT_F32_F16_e32 %496, implicit $mode, implicit $exec |
| %497:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %495, 0, %184, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %498:vgpr_32 = V_MAXIMUM3_F32_e64 0, %497.sub0, 0, %497.sub1, 0, %497.sub1, 0, 0, implicit $exec |
| %499:vgpr_32 = V_MOV_B32_dpp undef %499, %498, 280, 15, 15, -1, implicit $exec |
| %500:vgpr_32 = V_MAXIMUM3_F32_e64 0, %498, 0, %499, 0, %499, 0, 0, implicit $exec |
| %501:vgpr_32 = V_MOV_B32_dpp undef %501, %500, 276, 15, 15, -1, implicit $exec |
| %502:vgpr_32 = V_MAXIMUM3_F32_e64 0, %500, 0, %501, 0, %501, 0, 0, implicit $exec |
| %503:vgpr_32 = V_MOV_B32_dpp undef %503, %502, 274, 15, 15, -1, implicit $exec |
| %504:vgpr_32 = V_MAXIMUM3_F32_e64 0, %502, 0, %503, 0, %503, 0, 0, implicit $exec |
| %505:vgpr_32 = V_MOV_B32_dpp undef %505, %504, 273, 15, 15, -1, implicit $exec |
| %506:vgpr_32 = V_MAXIMUM3_F32_e64 0, %504, 0, %505, 0, %505, 0, 0, implicit $exec |
| %507:vgpr_32 = COPY %506 |
| %507:vgpr_32 = V_MOV_B32_dpp %507, %507, 322, 10, 15, -1, implicit $exec |
| %508:vgpr_32 = V_MAXIMUM3_F32_e64 0, %506, 0, %507, 0, %507, 0, 0, implicit $exec |
| %509:vgpr_32 = V_MOV_B32_dpp undef %509, %508, 323, 15, 15, -1, implicit $exec |
| %510:vgpr_32 = V_MAXIMUM3_F32_e64 0, %508, 0, %509, 0, %509, 0, 0, implicit $exec |
| %511:sgpr_32 = V_READLANE_B32 %510, 63 |
| %512:vgpr_32 = V_SUBREV_U32_e32 %448, %444.sub2, implicit $exec |
| %513:vgpr_32 = V_SUBREV_U32_e32 %448, %443.sub2, implicit $exec |
| %514:vgpr_32 = V_CVT_F32_I32_e32 %512, implicit $mode, implicit $exec |
| %515:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 %514, implicit $mode, implicit $exec |
| %516:vgpr_32 = V_CVT_F32_I32_e32 %513, implicit $mode, implicit $exec |
| %517:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 %516, implicit $mode, implicit $exec |
| %518:vgpr_32 = nofpexcept V_PACK_B32_F16_e64 0, %517, 0, %515, 0, 0, implicit $mode, implicit $exec |
| %519:vgpr_32 = nofpexcept V_PK_MUL_F16 0, %318, 8, %518, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| undef %520.sub0:vreg_64_align2 = nofpexcept V_CVT_F32_F16_e32 %519, implicit $mode, implicit $exec |
| %521:vgpr_32 = V_LSHRREV_B32_e32 16, %519, implicit $exec |
| %520.sub1:vreg_64_align2 = nofpexcept V_CVT_F32_F16_e32 %521, implicit $mode, implicit $exec |
| %522:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %520, 0, %184, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %523:vgpr_32 = V_MAXIMUM3_F32_e64 0, %522.sub0, 0, %522.sub1, 0, %522.sub1, 0, 0, implicit $exec |
| %524:vgpr_32 = V_MOV_B32_dpp undef %524, %523, 280, 15, 15, -1, implicit $exec |
| %525:vgpr_32 = V_MAXIMUM3_F32_e64 0, %523, 0, %524, 0, %524, 0, 0, implicit $exec |
| %526:vgpr_32 = V_MOV_B32_dpp undef %526, %525, 276, 15, 15, -1, implicit $exec |
| %527:vgpr_32 = V_MAXIMUM3_F32_e64 0, %525, 0, %526, 0, %526, 0, 0, implicit $exec |
| %528:vgpr_32 = V_MOV_B32_dpp undef %528, %527, 274, 15, 15, -1, implicit $exec |
| %529:vgpr_32 = V_MAXIMUM3_F32_e64 0, %527, 0, %528, 0, %528, 0, 0, implicit $exec |
| %530:vgpr_32 = V_MOV_B32_dpp undef %530, %529, 273, 15, 15, -1, implicit $exec |
| %531:vgpr_32 = V_MAXIMUM3_F32_e64 0, %529, 0, %530, 0, %530, 0, 0, implicit $exec |
| %532:vgpr_32 = COPY %531 |
| %532:vgpr_32 = V_MOV_B32_dpp %532, %532, 322, 10, 15, -1, implicit $exec |
| %533:vgpr_32 = V_MAXIMUM3_F32_e64 0, %531, 0, %532, 0, %532, 0, 0, implicit $exec |
| %534:vgpr_32 = V_MOV_B32_dpp undef %534, %533, 323, 15, 15, -1, implicit $exec |
| %535:vgpr_32 = V_MAXIMUM3_F32_e64 0, %533, 0, %534, 0, %534, 0, 0, implicit $exec |
| %536:sgpr_32 = V_READLANE_B32 %535, 63 |
| %537:vgpr_32 = V_SUBREV_U32_e32 %448, %444.sub3, implicit $exec |
| %538:vgpr_32 = V_SUBREV_U32_e32 %448, %443.sub3, implicit $exec |
| %539:vgpr_32 = V_CVT_F32_I32_e32 %537, implicit $mode, implicit $exec |
| %540:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 %539, implicit $mode, implicit $exec |
| %541:vgpr_32 = V_CVT_F32_I32_e32 %538, implicit $mode, implicit $exec |
| %542:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 %541, implicit $mode, implicit $exec |
| %543:vgpr_32 = nofpexcept V_PACK_B32_F16_e64 0, %542, 0, %540, 0, 0, implicit $mode, implicit $exec |
| %544:vgpr_32 = nofpexcept V_PK_MUL_F16 0, %318, 8, %543, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| undef %545.sub0:vreg_64_align2 = nofpexcept V_CVT_F32_F16_e32 %544, implicit $mode, implicit $exec |
| %546:vgpr_32 = V_LSHRREV_B32_e32 16, %544, implicit $exec |
| %545.sub1:vreg_64_align2 = nofpexcept V_CVT_F32_F16_e32 %546, implicit $mode, implicit $exec |
| %547:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %545, 0, %184, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %548:vgpr_32 = V_MAXIMUM3_F32_e64 0, %547.sub0, 0, %547.sub1, 0, %547.sub1, 0, 0, implicit $exec |
| %549:vgpr_32 = V_MOV_B32_dpp undef %549, %548, 280, 15, 15, -1, implicit $exec |
| %550:vgpr_32 = V_MAXIMUM3_F32_e64 0, %548, 0, %549, 0, %549, 0, 0, implicit $exec |
| %551:vgpr_32 = V_MOV_B32_dpp undef %551, %550, 276, 15, 15, -1, implicit $exec |
| %552:vgpr_32 = V_MAXIMUM3_F32_e64 0, %550, 0, %551, 0, %551, 0, 0, implicit $exec |
| %553:vgpr_32 = V_MOV_B32_dpp undef %553, %552, 274, 15, 15, -1, implicit $exec |
| %554:vgpr_32 = V_MAXIMUM3_F32_e64 0, %552, 0, %553, 0, %553, 0, 0, implicit $exec |
| %555:vgpr_32 = V_MOV_B32_dpp undef %555, %554, 273, 15, 15, -1, implicit $exec |
| %556:vgpr_32 = V_MAXIMUM3_F32_e64 0, %554, 0, %555, 0, %555, 0, 0, implicit $exec |
| %557:vgpr_32 = COPY %556 |
| %557:vgpr_32 = V_MOV_B32_dpp %557, %557, 322, 10, 15, -1, implicit $exec |
| %558:vgpr_32 = V_MAXIMUM3_F32_e64 0, %556, 0, %557, 0, %557, 0, 0, implicit $exec |
| %559:vgpr_32 = V_MOV_B32_dpp undef %559, %558, 323, 15, 15, -1, implicit $exec |
| %560:vgpr_32 = V_MAXIMUM3_F32_e64 0, %558, 0, %559, 0, %559, 0, 0, implicit $exec |
| %561:sgpr_32 = V_READLANE_B32 %560, 63 |
| %562:vgpr_32 = V_SUBREV_U32_e32 %448, %446.sub0, implicit $exec |
| %563:vgpr_32 = V_SUBREV_U32_e32 %448, %445.sub0, implicit $exec |
| %564:vgpr_32 = V_CVT_F32_I32_e32 %562, implicit $mode, implicit $exec |
| %565:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 %564, implicit $mode, implicit $exec |
| %566:vgpr_32 = V_CVT_F32_I32_e32 %563, implicit $mode, implicit $exec |
| %567:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 %566, implicit $mode, implicit $exec |
| %568:vgpr_32 = nofpexcept V_PACK_B32_F16_e64 0, %567, 0, %565, 0, 0, implicit $mode, implicit $exec |
| %569:vgpr_32 = nofpexcept V_PK_MUL_F16 0, %318, 8, %568, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| undef %570.sub0:vreg_64_align2 = nofpexcept V_CVT_F32_F16_e32 %569, implicit $mode, implicit $exec |
| %571:vgpr_32 = V_LSHRREV_B32_e32 16, %569, implicit $exec |
| %570.sub1:vreg_64_align2 = nofpexcept V_CVT_F32_F16_e32 %571, implicit $mode, implicit $exec |
| %572:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %570, 0, %184, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %573:vgpr_32 = V_MAXIMUM3_F32_e64 0, %572.sub0, 0, %572.sub1, 0, %572.sub1, 0, 0, implicit $exec |
| %574:vgpr_32 = V_MOV_B32_dpp undef %574, %573, 280, 15, 15, -1, implicit $exec |
| %575:vgpr_32 = V_MAXIMUM3_F32_e64 0, %573, 0, %574, 0, %574, 0, 0, implicit $exec |
| %576:vgpr_32 = V_MOV_B32_dpp undef %576, %575, 276, 15, 15, -1, implicit $exec |
| %577:vgpr_32 = V_MAXIMUM3_F32_e64 0, %575, 0, %576, 0, %576, 0, 0, implicit $exec |
| %578:vgpr_32 = V_MOV_B32_dpp undef %578, %577, 274, 15, 15, -1, implicit $exec |
| %579:vgpr_32 = V_MAXIMUM3_F32_e64 0, %577, 0, %578, 0, %578, 0, 0, implicit $exec |
| %580:vgpr_32 = V_MOV_B32_dpp undef %580, %579, 273, 15, 15, -1, implicit $exec |
| %581:vgpr_32 = V_MAXIMUM3_F32_e64 0, %579, 0, %580, 0, %580, 0, 0, implicit $exec |
| %582:vgpr_32 = COPY %581 |
| %582:vgpr_32 = V_MOV_B32_dpp %582, %582, 322, 10, 15, -1, implicit $exec |
| %583:vgpr_32 = V_MAXIMUM3_F32_e64 0, %581, 0, %582, 0, %582, 0, 0, implicit $exec |
| %584:vgpr_32 = V_MOV_B32_dpp undef %584, %583, 323, 15, 15, -1, implicit $exec |
| %585:vgpr_32 = V_MAXIMUM3_F32_e64 0, %583, 0, %584, 0, %584, 0, 0, implicit $exec |
| %586:sgpr_32 = V_READLANE_B32 %585, 63 |
| %587:vgpr_32 = V_SUBREV_U32_e32 %448, %446.sub1, implicit $exec |
| %588:vgpr_32 = V_SUBREV_U32_e32 %448, %445.sub1, implicit $exec |
| %589:vgpr_32 = V_CVT_F32_I32_e32 %587, implicit $mode, implicit $exec |
| %590:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 %589, implicit $mode, implicit $exec |
| %591:vgpr_32 = V_CVT_F32_I32_e32 %588, implicit $mode, implicit $exec |
| %592:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 %591, implicit $mode, implicit $exec |
| %593:vgpr_32 = nofpexcept V_PACK_B32_F16_e64 0, %592, 0, %590, 0, 0, implicit $mode, implicit $exec |
| %594:vgpr_32 = nofpexcept V_PK_MUL_F16 0, %318, 8, %593, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| undef %595.sub0:vreg_64_align2 = nofpexcept V_CVT_F32_F16_e32 %594, implicit $mode, implicit $exec |
| %596:vgpr_32 = V_LSHRREV_B32_e32 16, %594, implicit $exec |
| %595.sub1:vreg_64_align2 = nofpexcept V_CVT_F32_F16_e32 %596, implicit $mode, implicit $exec |
| %597:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %595, 0, %184, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %598:vgpr_32 = V_MAXIMUM3_F32_e64 0, %597.sub0, 0, %597.sub1, 0, %597.sub1, 0, 0, implicit $exec |
| %599:vgpr_32 = V_MOV_B32_dpp undef %599, %598, 280, 15, 15, -1, implicit $exec |
| %600:vgpr_32 = V_MAXIMUM3_F32_e64 0, %598, 0, %599, 0, %599, 0, 0, implicit $exec |
| %601:vgpr_32 = V_MOV_B32_dpp undef %601, %600, 276, 15, 15, -1, implicit $exec |
| %602:vgpr_32 = V_MAXIMUM3_F32_e64 0, %600, 0, %601, 0, %601, 0, 0, implicit $exec |
| %603:vgpr_32 = V_MOV_B32_dpp undef %603, %602, 274, 15, 15, -1, implicit $exec |
| %604:vgpr_32 = V_MAXIMUM3_F32_e64 0, %602, 0, %603, 0, %603, 0, 0, implicit $exec |
| %605:vgpr_32 = V_MOV_B32_dpp undef %605, %604, 273, 15, 15, -1, implicit $exec |
| %606:vgpr_32 = V_MAXIMUM3_F32_e64 0, %604, 0, %605, 0, %605, 0, 0, implicit $exec |
| %607:vgpr_32 = COPY %606 |
| %607:vgpr_32 = V_MOV_B32_dpp %607, %607, 322, 10, 15, -1, implicit $exec |
| %608:vgpr_32 = V_MAXIMUM3_F32_e64 0, %606, 0, %607, 0, %607, 0, 0, implicit $exec |
| %609:vgpr_32 = V_MOV_B32_dpp undef %609, %608, 323, 15, 15, -1, implicit $exec |
| %610:vgpr_32 = V_MAXIMUM3_F32_e64 0, %608, 0, %609, 0, %609, 0, 0, implicit $exec |
| %611:sgpr_32 = V_READLANE_B32 %610, 63 |
| %612:vgpr_32 = V_SUBREV_U32_e32 %448, %446.sub2, implicit $exec |
| %613:vgpr_32 = V_SUBREV_U32_e32 %448, %445.sub2, implicit $exec |
| %614:vgpr_32 = V_CVT_F32_I32_e32 %612, implicit $mode, implicit $exec |
| %615:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 %614, implicit $mode, implicit $exec |
| %616:vgpr_32 = V_CVT_F32_I32_e32 %613, implicit $mode, implicit $exec |
| %617:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 %616, implicit $mode, implicit $exec |
| %618:vgpr_32 = nofpexcept V_PACK_B32_F16_e64 0, %617, 0, %615, 0, 0, implicit $mode, implicit $exec |
| %619:vgpr_32 = nofpexcept V_PK_MUL_F16 0, %318, 8, %618, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| undef %620.sub0:vreg_64_align2 = nofpexcept V_CVT_F32_F16_e32 %619, implicit $mode, implicit $exec |
| %621:vgpr_32 = V_LSHRREV_B32_e32 16, %619, implicit $exec |
| %620.sub1:vreg_64_align2 = nofpexcept V_CVT_F32_F16_e32 %621, implicit $mode, implicit $exec |
| %622:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %620, 0, %184, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %623:vgpr_32 = V_MAXIMUM3_F32_e64 0, %622.sub0, 0, %622.sub1, 0, %622.sub1, 0, 0, implicit $exec |
| %624:vgpr_32 = V_MOV_B32_dpp undef %624, %623, 280, 15, 15, -1, implicit $exec |
| %625:vgpr_32 = V_MAXIMUM3_F32_e64 0, %623, 0, %624, 0, %624, 0, 0, implicit $exec |
| %626:vgpr_32 = V_MOV_B32_dpp undef %626, %625, 276, 15, 15, -1, implicit $exec |
| %627:vgpr_32 = V_MAXIMUM3_F32_e64 0, %625, 0, %626, 0, %626, 0, 0, implicit $exec |
| %628:vgpr_32 = V_MOV_B32_dpp undef %628, %627, 274, 15, 15, -1, implicit $exec |
| %629:vgpr_32 = V_MAXIMUM3_F32_e64 0, %627, 0, %628, 0, %628, 0, 0, implicit $exec |
| %630:vgpr_32 = V_MOV_B32_dpp undef %630, %629, 273, 15, 15, -1, implicit $exec |
| %631:vgpr_32 = V_MAXIMUM3_F32_e64 0, %629, 0, %630, 0, %630, 0, 0, implicit $exec |
| %632:vgpr_32 = COPY %631 |
| %632:vgpr_32 = V_MOV_B32_dpp %632, %632, 322, 10, 15, -1, implicit $exec |
| %633:vgpr_32 = V_MAXIMUM3_F32_e64 0, %631, 0, %632, 0, %632, 0, 0, implicit $exec |
| %634:vgpr_32 = V_MOV_B32_dpp undef %634, %633, 323, 15, 15, -1, implicit $exec |
| %635:vgpr_32 = V_MAXIMUM3_F32_e64 0, %633, 0, %634, 0, %634, 0, 0, implicit $exec |
| %636:sgpr_32 = V_READLANE_B32 %635, 63 |
| %637:vgpr_32 = nofpexcept V_ADD_F32_e32 0, %449, implicit $mode, implicit $exec |
| %638:vgpr_32 = nofpexcept V_ADD_F32_dpp undef %638, 0, %637, 0, %637, 276, 15, 15, 1, implicit $mode, implicit $exec |
| %639:vgpr_32 = nofpexcept V_ADD_F32_dpp undef %639, 0, %638, 0, %638, 274, 15, 15, 1, implicit $mode, implicit $exec |
| %640:vgpr_32 = nofpexcept V_ADD_F32_dpp undef %640, 0, %639, 0, %639, 273, 15, 15, 1, implicit $mode, implicit $exec |
| %641:vgpr_32 = COPY %640 |
| %641:vgpr_32 = V_MOV_B32_dpp %641, %641, 322, 10, 15, -1, implicit $exec |
| %642:vgpr_32 = nofpexcept V_ADD_F32_e32 %640, %641, implicit $mode, implicit $exec |
| %643:vgpr_32 = nofpexcept V_ADD_F32_dpp undef %643, 0, %642, 0, %642, 323, 15, 15, 1, implicit $mode, implicit $exec |
| undef %644.sub1:sreg_64 = V_READLANE_B32 %643, 63 |
| %645:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %511, 0, %252.sub0, 0, implicit $mode, implicit $exec |
| %646:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %486, 0, %251.sub0, 0, implicit $mode, implicit $exec |
| %647:sreg_64 = nofpexcept V_CMP_U_F32_e64 0, %511, 0, %511, 0, implicit $mode, implicit $exec |
| %648:sreg_64 = nofpexcept V_CMP_U_F32_e64 0, %486, 0, %486, 0, implicit $mode, implicit $exec |
| %649:sreg_64_xexec = S_OR_B64 %647, %645, implicit-def dead $scc |
| %650:sreg_64_xexec = S_OR_B64 %648, %646, implicit-def dead $scc |
| %651:vgpr_32 = COPY %511 |
| undef %252.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %252.sub0, 0, %651, %649, implicit $exec |
| %652:vgpr_32 = COPY %486 |
| undef %251.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %251.sub0, 0, %652, %650, implicit $exec |
| %653:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %472, 3, %251, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %654:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %497, 3, %252, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %655:vgpr_32 = nofpexcept V_EXP_F32_e32 %653.sub0, implicit $mode, implicit $exec |
| %656:vgpr_32 = nofpexcept V_EXP_F32_e32 %653.sub1, implicit $mode, implicit $exec |
| undef %657.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %654.sub0, implicit $mode, implicit $exec |
| undef %658.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %654.sub1, implicit $mode, implicit $exec |
| %659:vgpr_32 = nofpexcept V_ADD_F32_e32 %655, %656, implicit $mode, implicit $exec |
| %660:vgpr_32 = nofpexcept V_ADD_F32_dpp undef %660, 0, %659, 0, %659, 280, 15, 15, 1, implicit $mode, implicit $exec |
| %661:vgpr_32 = nofpexcept V_ADD_F32_dpp undef %661, 0, %660, 0, %660, 276, 15, 15, 1, implicit $mode, implicit $exec |
| %662:vgpr_32 = nofpexcept V_ADD_F32_dpp undef %662, 0, %661, 0, %661, 274, 15, 15, 1, implicit $mode, implicit $exec |
| %657.sub0:vreg_64_align2 = nofpexcept V_ADD_F32_dpp undef %657.sub0, 0, %662, 0, %662, 273, 15, 15, 1, implicit $mode, implicit $exec |
| %658.sub0:vreg_64_align2 = COPY %657.sub0 |
| %658.sub0:vreg_64_align2 = V_MOV_B32_dpp %658.sub0, %658.sub0, 322, 10, 15, -1, implicit $exec |
| %663:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %657, 8, %658, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| undef %664.sub0:vreg_64_align2 = V_MOV_B32_dpp undef %664.sub0, %663.sub0, 323, 15, 15, -1, implicit $exec |
| %664.sub1:vreg_64_align2 = V_MOV_B32_dpp undef %664.sub1, %663.sub1, 280, 15, 15, -1, implicit $exec |
| %665:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %663, 8, %664, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| undef %666.sub0:sreg_64 = V_READLANE_B32 %665.sub0, 63 |
| %667:vgpr_32 = nofpexcept V_ADD_F32_dpp undef %667, 0, %665.sub1, 0, %665.sub1, 276, 15, 15, 1, implicit $mode, implicit $exec |
| %668:vgpr_32 = nofpexcept V_ADD_F32_dpp undef %668, 0, %667, 0, %667, 274, 15, 15, 1, implicit $mode, implicit $exec |
| undef %669.sub0:vreg_64_align2 = nofpexcept V_ADD_F32_dpp undef %669.sub0, 0, %668, 0, %668, 273, 15, 15, 1, implicit $mode, implicit $exec |
| undef %670.sub0:vreg_64_align2 = COPY %669.sub0 |
| undef %670.sub0:vreg_64_align2 = V_MOV_B32_dpp %670.sub0, %670.sub0, 322, 10, 15, -1, implicit $exec |
| %251.sub1:vreg_64_align2 = COPY %252.sub0 |
| %671:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %320, 11, %251, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %672:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %561, 0, %250.sub0, 0, implicit $mode, implicit $exec |
| %673:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %536, 0, %249.sub0, 0, implicit $mode, implicit $exec |
| %674:sreg_64 = nofpexcept V_CMP_U_F32_e64 0, %561, 0, %561, 0, implicit $mode, implicit $exec |
| %675:sreg_64 = nofpexcept V_CMP_U_F32_e64 0, %536, 0, %536, 0, implicit $mode, implicit $exec |
| %676:sreg_64_xexec = S_OR_B64 %674, %672, implicit-def dead $scc |
| %677:sreg_64_xexec = S_OR_B64 %675, %673, implicit-def dead $scc |
| %678:vgpr_32 = COPY %561 |
| undef %250.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %250.sub0, 0, %678, %676, implicit $exec |
| %679:vgpr_32 = COPY %536 |
| undef %249.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %249.sub0, 0, %679, %677, implicit $exec |
| %680:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %522, 3, %249, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %681:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %547, 3, %250, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %669.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %680.sub0, implicit $mode, implicit $exec |
| %670.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %680.sub1, implicit $mode, implicit $exec |
| undef %682.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %681.sub0, implicit $mode, implicit $exec |
| undef %683.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %681.sub1, implicit $mode, implicit $exec |
| %684:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %669, 8, %670, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| undef %685.sub0:vreg_64_align2 = V_MOV_B32_dpp undef %685.sub0, %684.sub0, 323, 15, 15, -1, implicit $exec |
| %685.sub1:vreg_64_align2 = V_MOV_B32_dpp undef %685.sub1, %684.sub1, 280, 15, 15, -1, implicit $exec |
| %686:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %684, 8, %685, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %666.sub1:sreg_64 = V_READLANE_B32 %686.sub0, 63 |
| %687:vgpr_32 = nofpexcept V_ADD_F32_dpp undef %687, 0, %686.sub1, 0, %686.sub1, 276, 15, 15, 1, implicit $mode, implicit $exec |
| %688:vgpr_32 = nofpexcept V_ADD_F32_dpp undef %688, 0, %687, 0, %687, 274, 15, 15, 1, implicit $mode, implicit $exec |
| %682.sub0:vreg_64_align2 = nofpexcept V_ADD_F32_dpp undef %682.sub0, 0, %688, 0, %688, 273, 15, 15, 1, implicit $mode, implicit $exec |
| %683.sub0:vreg_64_align2 = COPY %682.sub0 |
| %683.sub0:vreg_64_align2 = V_MOV_B32_dpp %683.sub0, %683.sub0, 322, 10, 15, -1, implicit $exec |
| %689:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %682, 8, %683, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| undef %690.sub0:vreg_64_align2 = V_MOV_B32_dpp undef %690.sub0, %689.sub0, 323, 15, 15, -1, implicit $exec |
| %690.sub1:vreg_64_align2 = V_MOV_B32_dpp undef %690.sub1, %689.sub1, 280, 15, 15, -1, implicit $exec |
| %691:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %689, 8, %690, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| undef %692.sub0:sreg_64 = V_READLANE_B32 %691.sub0, 63 |
| %693:vgpr_32 = nofpexcept V_ADD_F32_dpp undef %693, 0, %691.sub1, 0, %691.sub1, 276, 15, 15, 1, implicit $mode, implicit $exec |
| %694:vgpr_32 = nofpexcept V_ADD_F32_dpp undef %694, 0, %693, 0, %693, 274, 15, 15, 1, implicit $mode, implicit $exec |
| undef %695.sub0:vreg_64_align2 = nofpexcept V_ADD_F32_dpp undef %695.sub0, 0, %694, 0, %694, 273, 15, 15, 1, implicit $mode, implicit $exec |
| undef %696.sub0:vreg_64_align2 = COPY %695.sub0 |
| undef %696.sub0:vreg_64_align2 = V_MOV_B32_dpp %696.sub0, %696.sub0, 322, 10, 15, -1, implicit $exec |
| %249.sub1:vreg_64_align2 = COPY %250.sub0 |
| %697:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %321, 11, %249, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %698:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %611, 0, %248.sub0, 0, implicit $mode, implicit $exec |
| %699:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %586, 0, %247.sub0, 0, implicit $mode, implicit $exec |
| %700:sreg_64 = nofpexcept V_CMP_U_F32_e64 0, %611, 0, %611, 0, implicit $mode, implicit $exec |
| %701:sreg_64 = nofpexcept V_CMP_U_F32_e64 0, %586, 0, %586, 0, implicit $mode, implicit $exec |
| %702:sreg_64_xexec = S_OR_B64 %700, %698, implicit-def dead $scc |
| %703:sreg_64_xexec = S_OR_B64 %701, %699, implicit-def dead $scc |
| %704:vgpr_32 = COPY %611 |
| undef %248.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %248.sub0, 0, %704, %702, implicit $exec |
| %705:vgpr_32 = COPY %586 |
| undef %247.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %247.sub0, 0, %705, %703, implicit $exec |
| %706:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %572, 3, %247, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %707:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %597, 3, %248, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %695.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %706.sub0, implicit $mode, implicit $exec |
| %696.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %706.sub1, implicit $mode, implicit $exec |
| undef %708.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %707.sub0, implicit $mode, implicit $exec |
| undef %709.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %707.sub1, implicit $mode, implicit $exec |
| %710:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %695, 8, %696, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| undef %711.sub0:vreg_64_align2 = V_MOV_B32_dpp undef %711.sub0, %710.sub0, 323, 15, 15, -1, implicit $exec |
| %711.sub1:vreg_64_align2 = V_MOV_B32_dpp undef %711.sub1, %710.sub1, 280, 15, 15, -1, implicit $exec |
| %712:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %710, 8, %711, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %692.sub1:sreg_64 = V_READLANE_B32 %712.sub0, 63 |
| %713:vgpr_32 = nofpexcept V_ADD_F32_dpp undef %713, 0, %712.sub1, 0, %712.sub1, 276, 15, 15, 1, implicit $mode, implicit $exec |
| %714:vgpr_32 = nofpexcept V_ADD_F32_dpp undef %714, 0, %713, 0, %713, 274, 15, 15, 1, implicit $mode, implicit $exec |
| %708.sub0:vreg_64_align2 = nofpexcept V_ADD_F32_dpp undef %708.sub0, 0, %714, 0, %714, 273, 15, 15, 1, implicit $mode, implicit $exec |
| %709.sub0:vreg_64_align2 = COPY %708.sub0 |
| %709.sub0:vreg_64_align2 = V_MOV_B32_dpp %709.sub0, %709.sub0, 322, 10, 15, -1, implicit $exec |
| %715:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %708, 8, %709, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| undef %716.sub0:vreg_64_align2 = V_MOV_B32_dpp undef %716.sub0, %715.sub0, 323, 15, 15, -1, implicit $exec |
| %716.sub1:vreg_64_align2 = V_MOV_B32_dpp undef %716.sub1, %715.sub1, 280, 15, 15, -1, implicit $exec |
| %717:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %715, 8, %716, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| undef %718.sub0:sreg_64 = V_READLANE_B32 %717.sub0, 63 |
| %719:vgpr_32 = nofpexcept V_ADD_F32_dpp undef %719, 0, %717.sub1, 0, %717.sub1, 276, 15, 15, 1, implicit $mode, implicit $exec |
| %720:vgpr_32 = nofpexcept V_ADD_F32_dpp undef %720, 0, %719, 0, %719, 274, 15, 15, 1, implicit $mode, implicit $exec |
| undef %721.sub0:vreg_64_align2 = nofpexcept V_ADD_F32_dpp undef %721.sub0, 0, %720, 0, %720, 273, 15, 15, 1, implicit $mode, implicit $exec |
| undef %722.sub0:vreg_64_align2 = COPY %721.sub0 |
| undef %722.sub0:vreg_64_align2 = V_MOV_B32_dpp %722.sub0, %722.sub0, 322, 10, 15, -1, implicit $exec |
| %247.sub1:vreg_64_align2 = COPY %248.sub0 |
| %723:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %322, 11, %247, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %724:sreg_64 = nofpexcept V_CMP_U_F32_e64 0, %461, 0, %461, 0, implicit $mode, implicit $exec |
| %725:sreg_64 = nofpexcept V_CMP_U_F32_e64 0, %636, 0, %636, 0, implicit $mode, implicit $exec |
| %726:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %246.sub1, 0, implicit $mode, implicit $exec |
| %727:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %636, 0, %246.sub0, 0, implicit $mode, implicit $exec |
| %728:sreg_64_xexec = S_OR_B64 %724, %726, implicit-def dead $scc |
| %729:sreg_64_xexec = S_OR_B64 %725, %727, implicit-def dead $scc |
| %730:vgpr_32 = COPY %461 |
| %246.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %246.sub1, 0, %730, %728, implicit $exec |
| %731:vgpr_32 = COPY %636 |
| %246.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %246.sub0, 0, %731, %729, implicit $exec |
| %732:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %622, 3, %246, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %721.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %732.sub0, implicit $mode, implicit $exec |
| %722.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %732.sub1, implicit $mode, implicit $exec |
| %733:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %721, 8, %722, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| undef %734.sub0:vreg_64_align2 = V_MOV_B32_dpp undef %734.sub0, %733.sub0, 323, 15, 15, -1, implicit $exec |
| %734.sub1:vreg_64_align2 = V_MOV_B32_dpp undef %734.sub1, %733.sub1, 280, 15, 15, -1, implicit $exec |
| %735:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %733, 8, %734, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %718.sub1:sreg_64 = V_READLANE_B32 %735.sub0, 63 |
| %736:vgpr_32 = nofpexcept V_ADD_F32_dpp undef %736, 0, %735.sub1, 0, %735.sub1, 276, 15, 15, 1, implicit $mode, implicit $exec |
| %737:vgpr_32 = nofpexcept V_ADD_F32_dpp undef %737, 0, %736, 0, %736, 274, 15, 15, 1, implicit $mode, implicit $exec |
| %738:vgpr_32 = nofpexcept V_ADD_F32_dpp undef %738, 0, %737, 0, %737, 273, 15, 15, 1, implicit $mode, implicit $exec |
| %739:vgpr_32 = COPY %738 |
| %739:vgpr_32 = V_MOV_B32_dpp %739, %739, 322, 10, 15, -1, implicit $exec |
| %740:vgpr_32 = nofpexcept V_ADD_F32_e32 %738, %739, implicit $mode, implicit $exec |
| %741:vgpr_32 = nofpexcept V_ADD_F32_dpp undef %741, 0, %740, 0, %740, 323, 15, 15, 1, implicit $mode, implicit $exec |
| %644.sub0:sreg_64 = V_READLANE_B32 %741, 63 |
| %742:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %323, 11, %246, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %743:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %245.sub1, 0, implicit $mode, implicit $exec |
| %744:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %245.sub0, 0, implicit $mode, implicit $exec |
| %745:sreg_64_xexec = S_OR_B64 %724, %743, implicit-def dead $scc |
| %746:sreg_64_xexec = S_OR_B64 %724, %744, implicit-def dead $scc |
| %245.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %245.sub1, 0, %730, %745, implicit $exec |
| %245.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %245.sub0, 0, %730, %746, implicit $exec |
| %747:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %324, 11, %245, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %748:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %244.sub1, 0, implicit $mode, implicit $exec |
| %749:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %244.sub0, 0, implicit $mode, implicit $exec |
| %750:sreg_64_xexec = S_OR_B64 %724, %748, implicit-def dead $scc |
| %751:sreg_64_xexec = S_OR_B64 %724, %749, implicit-def dead $scc |
| %244.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %244.sub1, 0, %730, %750, implicit $exec |
| %244.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %244.sub0, 0, %730, %751, implicit $exec |
| %752:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %325, 11, %244, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %753:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %243.sub1, 0, implicit $mode, implicit $exec |
| %754:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %243.sub0, 0, implicit $mode, implicit $exec |
| %755:sreg_64_xexec = S_OR_B64 %724, %753, implicit-def dead $scc |
| %756:sreg_64_xexec = S_OR_B64 %724, %754, implicit-def dead $scc |
| %243.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %243.sub1, 0, %730, %755, implicit $exec |
| %243.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %243.sub0, 0, %730, %756, implicit $exec |
| %757:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %326, 11, %243, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %758:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %242.sub1, 0, implicit $mode, implicit $exec |
| %759:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %242.sub0, 0, implicit $mode, implicit $exec |
| %760:sreg_64_xexec = S_OR_B64 %724, %758, implicit-def dead $scc |
| %761:sreg_64_xexec = S_OR_B64 %724, %759, implicit-def dead $scc |
| %242.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %242.sub1, 0, %730, %760, implicit $exec |
| %242.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %242.sub0, 0, %730, %761, implicit $exec |
| %762:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %327, 11, %242, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %763:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %241.sub1, 0, implicit $mode, implicit $exec |
| %764:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %241.sub0, 0, implicit $mode, implicit $exec |
| %765:sreg_64_xexec = S_OR_B64 %724, %763, implicit-def dead $scc |
| %766:sreg_64_xexec = S_OR_B64 %724, %764, implicit-def dead $scc |
| %241.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %241.sub1, 0, %730, %765, implicit $exec |
| %241.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %241.sub0, 0, %730, %766, implicit $exec |
| %767:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %328, 11, %241, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %768:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %240.sub1, 0, implicit $mode, implicit $exec |
| %769:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %240.sub0, 0, implicit $mode, implicit $exec |
| %770:sreg_64_xexec = S_OR_B64 %724, %768, implicit-def dead $scc |
| %771:sreg_64_xexec = S_OR_B64 %724, %769, implicit-def dead $scc |
| %240.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %240.sub1, 0, %730, %770, implicit $exec |
| %240.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %240.sub0, 0, %730, %771, implicit $exec |
| %772:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %329, 11, %240, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %773:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %239.sub1, 0, implicit $mode, implicit $exec |
| %774:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %239.sub0, 0, implicit $mode, implicit $exec |
| %775:sreg_64_xexec = S_OR_B64 %724, %773, implicit-def dead $scc |
| %776:sreg_64_xexec = S_OR_B64 %724, %774, implicit-def dead $scc |
| %239.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %239.sub1, 0, %730, %775, implicit $exec |
| %239.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %239.sub0, 0, %730, %776, implicit $exec |
| %777:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %330, 11, %239, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %778:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %238.sub1, 0, implicit $mode, implicit $exec |
| %779:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %238.sub0, 0, implicit $mode, implicit $exec |
| %780:sreg_64_xexec = S_OR_B64 %724, %778, implicit-def dead $scc |
| %781:sreg_64_xexec = S_OR_B64 %724, %779, implicit-def dead $scc |
| %238.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %238.sub1, 0, %730, %780, implicit $exec |
| %238.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %238.sub0, 0, %730, %781, implicit $exec |
| %782:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %331, 11, %238, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %783:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %237.sub1, 0, implicit $mode, implicit $exec |
| %784:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %237.sub0, 0, implicit $mode, implicit $exec |
| %785:sreg_64_xexec = S_OR_B64 %724, %783, implicit-def dead $scc |
| %786:sreg_64_xexec = S_OR_B64 %724, %784, implicit-def dead $scc |
| %237.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %237.sub1, 0, %730, %785, implicit $exec |
| %237.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %237.sub0, 0, %730, %786, implicit $exec |
| %787:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %332, 11, %237, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %788:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %236.sub1, 0, implicit $mode, implicit $exec |
| %789:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %236.sub0, 0, implicit $mode, implicit $exec |
| %790:sreg_64_xexec = S_OR_B64 %724, %788, implicit-def dead $scc |
| %791:sreg_64_xexec = S_OR_B64 %724, %789, implicit-def dead $scc |
| %236.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %236.sub1, 0, %730, %790, implicit $exec |
| %236.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %236.sub0, 0, %730, %791, implicit $exec |
| %792:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %333, 11, %236, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %793:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %235.sub1, 0, implicit $mode, implicit $exec |
| %794:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %235.sub0, 0, implicit $mode, implicit $exec |
| %795:sreg_64_xexec = S_OR_B64 %724, %793, implicit-def dead $scc |
| %796:sreg_64_xexec = S_OR_B64 %724, %794, implicit-def dead $scc |
| %235.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %235.sub1, 0, %730, %795, implicit $exec |
| %235.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %235.sub0, 0, %730, %796, implicit $exec |
| %797:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %334, 11, %235, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %798:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %234.sub1, 0, implicit $mode, implicit $exec |
| %799:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %234.sub0, 0, implicit $mode, implicit $exec |
| %800:sreg_64_xexec = S_OR_B64 %724, %798, implicit-def dead $scc |
| %801:sreg_64_xexec = S_OR_B64 %724, %799, implicit-def dead $scc |
| %234.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %234.sub1, 0, %730, %800, implicit $exec |
| %234.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %234.sub0, 0, %730, %801, implicit $exec |
| %802:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %335, 11, %234, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %803:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %233.sub1, 0, implicit $mode, implicit $exec |
| %804:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %233.sub0, 0, implicit $mode, implicit $exec |
| %805:sreg_64_xexec = S_OR_B64 %724, %803, implicit-def dead $scc |
| %806:sreg_64_xexec = S_OR_B64 %724, %804, implicit-def dead $scc |
| %233.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %233.sub1, 0, %730, %805, implicit $exec |
| %233.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %233.sub0, 0, %730, %806, implicit $exec |
| %807:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %336, 11, %233, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %808:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %232.sub1, 0, implicit $mode, implicit $exec |
| %809:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %232.sub0, 0, implicit $mode, implicit $exec |
| %810:sreg_64_xexec = S_OR_B64 %724, %808, implicit-def dead $scc |
| %811:sreg_64_xexec = S_OR_B64 %724, %809, implicit-def dead $scc |
| %232.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %232.sub1, 0, %730, %810, implicit $exec |
| %232.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %232.sub0, 0, %730, %811, implicit $exec |
| %812:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %337, 11, %232, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %813:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %231.sub1, 0, implicit $mode, implicit $exec |
| %814:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %231.sub0, 0, implicit $mode, implicit $exec |
| %815:sreg_64_xexec = S_OR_B64 %724, %813, implicit-def dead $scc |
| %816:sreg_64_xexec = S_OR_B64 %724, %814, implicit-def dead $scc |
| %231.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %231.sub1, 0, %730, %815, implicit $exec |
| %231.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %231.sub0, 0, %730, %816, implicit $exec |
| %817:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %338, 11, %231, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %818:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %230.sub1, 0, implicit $mode, implicit $exec |
| %819:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %230.sub0, 0, implicit $mode, implicit $exec |
| %820:sreg_64_xexec = S_OR_B64 %724, %818, implicit-def dead $scc |
| %821:sreg_64_xexec = S_OR_B64 %724, %819, implicit-def dead $scc |
| %230.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %230.sub1, 0, %730, %820, implicit $exec |
| %230.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %230.sub0, 0, %730, %821, implicit $exec |
| %822:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %339, 11, %230, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %823:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %229.sub1, 0, implicit $mode, implicit $exec |
| %824:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %229.sub0, 0, implicit $mode, implicit $exec |
| %825:sreg_64_xexec = S_OR_B64 %724, %823, implicit-def dead $scc |
| %826:sreg_64_xexec = S_OR_B64 %724, %824, implicit-def dead $scc |
| %229.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %229.sub1, 0, %730, %825, implicit $exec |
| %229.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %229.sub0, 0, %730, %826, implicit $exec |
| %827:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %340, 11, %229, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %828:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %228.sub1, 0, implicit $mode, implicit $exec |
| %829:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %228.sub0, 0, implicit $mode, implicit $exec |
| %830:sreg_64_xexec = S_OR_B64 %724, %828, implicit-def dead $scc |
| %831:sreg_64_xexec = S_OR_B64 %724, %829, implicit-def dead $scc |
| %228.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %228.sub1, 0, %730, %830, implicit $exec |
| %228.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %228.sub0, 0, %730, %831, implicit $exec |
| %832:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %341, 11, %228, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %833:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %227.sub1, 0, implicit $mode, implicit $exec |
| %834:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %227.sub0, 0, implicit $mode, implicit $exec |
| %835:sreg_64_xexec = S_OR_B64 %724, %833, implicit-def dead $scc |
| %836:sreg_64_xexec = S_OR_B64 %724, %834, implicit-def dead $scc |
| %227.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %227.sub1, 0, %730, %835, implicit $exec |
| %227.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %227.sub0, 0, %730, %836, implicit $exec |
| %837:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %342, 11, %227, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %838:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %226.sub1, 0, implicit $mode, implicit $exec |
| %839:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %226.sub0, 0, implicit $mode, implicit $exec |
| %840:sreg_64_xexec = S_OR_B64 %724, %838, implicit-def dead $scc |
| %841:sreg_64_xexec = S_OR_B64 %724, %839, implicit-def dead $scc |
| %226.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %226.sub1, 0, %730, %840, implicit $exec |
| %226.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %226.sub0, 0, %730, %841, implicit $exec |
| %842:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %343, 11, %226, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %843:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %225.sub1, 0, implicit $mode, implicit $exec |
| %844:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %225.sub0, 0, implicit $mode, implicit $exec |
| %845:sreg_64_xexec = S_OR_B64 %724, %843, implicit-def dead $scc |
| %846:sreg_64_xexec = S_OR_B64 %724, %844, implicit-def dead $scc |
| %225.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %225.sub1, 0, %730, %845, implicit $exec |
| %225.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %225.sub0, 0, %730, %846, implicit $exec |
| %847:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %344, 11, %225, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %848:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %224.sub1, 0, implicit $mode, implicit $exec |
| %849:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %224.sub0, 0, implicit $mode, implicit $exec |
| %850:sreg_64_xexec = S_OR_B64 %724, %848, implicit-def dead $scc |
| %851:sreg_64_xexec = S_OR_B64 %724, %849, implicit-def dead $scc |
| %224.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %224.sub1, 0, %730, %850, implicit $exec |
| %224.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %224.sub0, 0, %730, %851, implicit $exec |
| %852:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %345, 11, %224, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %853:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %223.sub1, 0, implicit $mode, implicit $exec |
| %854:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %223.sub0, 0, implicit $mode, implicit $exec |
| %855:sreg_64_xexec = S_OR_B64 %724, %853, implicit-def dead $scc |
| %856:sreg_64_xexec = S_OR_B64 %724, %854, implicit-def dead $scc |
| %223.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %223.sub1, 0, %730, %855, implicit $exec |
| %223.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %223.sub0, 0, %730, %856, implicit $exec |
| %857:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %346, 11, %223, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %858:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %222.sub1, 0, implicit $mode, implicit $exec |
| %859:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %222.sub0, 0, implicit $mode, implicit $exec |
| %860:sreg_64_xexec = S_OR_B64 %724, %858, implicit-def dead $scc |
| %861:sreg_64_xexec = S_OR_B64 %724, %859, implicit-def dead $scc |
| %222.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %222.sub1, 0, %730, %860, implicit $exec |
| %222.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %222.sub0, 0, %730, %861, implicit $exec |
| %862:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %347, 11, %222, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %863:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %221.sub1, 0, implicit $mode, implicit $exec |
| %864:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %221.sub0, 0, implicit $mode, implicit $exec |
| %865:sreg_64_xexec = S_OR_B64 %724, %863, implicit-def dead $scc |
| %866:sreg_64_xexec = S_OR_B64 %724, %864, implicit-def dead $scc |
| %221.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %221.sub1, 0, %730, %865, implicit $exec |
| %221.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %221.sub0, 0, %730, %866, implicit $exec |
| %867:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %348, 11, %221, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %868:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %220.sub1, 0, implicit $mode, implicit $exec |
| %869:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %220.sub0, 0, implicit $mode, implicit $exec |
| %870:sreg_64_xexec = S_OR_B64 %724, %868, implicit-def dead $scc |
| %871:sreg_64_xexec = S_OR_B64 %724, %869, implicit-def dead $scc |
| %220.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %220.sub1, 0, %730, %870, implicit $exec |
| %220.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %220.sub0, 0, %730, %871, implicit $exec |
| %872:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %349, 11, %220, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %873:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %219.sub1, 0, implicit $mode, implicit $exec |
| %874:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %219.sub0, 0, implicit $mode, implicit $exec |
| %875:sreg_64_xexec = S_OR_B64 %724, %873, implicit-def dead $scc |
| %876:sreg_64_xexec = S_OR_B64 %724, %874, implicit-def dead $scc |
| %219.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %219.sub1, 0, %730, %875, implicit $exec |
| %219.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %219.sub0, 0, %730, %876, implicit $exec |
| %877:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %350, 11, %219, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %878:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %218.sub1, 0, implicit $mode, implicit $exec |
| %879:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %218.sub0, 0, implicit $mode, implicit $exec |
| %880:sreg_64_xexec = S_OR_B64 %724, %878, implicit-def dead $scc |
| %881:sreg_64_xexec = S_OR_B64 %724, %879, implicit-def dead $scc |
| %218.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %218.sub1, 0, %730, %880, implicit $exec |
| %218.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %218.sub0, 0, %730, %881, implicit $exec |
| %882:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %351, 11, %218, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %883:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %217.sub1, 0, implicit $mode, implicit $exec |
| %884:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %217.sub0, 0, implicit $mode, implicit $exec |
| %885:sreg_64_xexec = S_OR_B64 %724, %883, implicit-def dead $scc |
| %886:sreg_64_xexec = S_OR_B64 %724, %884, implicit-def dead $scc |
| %217.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %217.sub1, 0, %730, %885, implicit $exec |
| %217.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %217.sub0, 0, %730, %886, implicit $exec |
| %887:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %352, 11, %217, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %888:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %216.sub1, 0, implicit $mode, implicit $exec |
| %889:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %216.sub0, 0, implicit $mode, implicit $exec |
| %890:sreg_64_xexec = S_OR_B64 %724, %888, implicit-def dead $scc |
| %891:sreg_64_xexec = S_OR_B64 %724, %889, implicit-def dead $scc |
| %216.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %216.sub1, 0, %730, %890, implicit $exec |
| %216.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %216.sub0, 0, %730, %891, implicit $exec |
| %892:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %353, 11, %216, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %893:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %215.sub1, 0, implicit $mode, implicit $exec |
| %894:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %215.sub0, 0, implicit $mode, implicit $exec |
| %895:sreg_64_xexec = S_OR_B64 %724, %893, implicit-def dead $scc |
| %896:sreg_64_xexec = S_OR_B64 %724, %894, implicit-def dead $scc |
| %215.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %215.sub1, 0, %730, %895, implicit $exec |
| %215.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %215.sub0, 0, %730, %896, implicit $exec |
| %897:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %354, 11, %215, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %898:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %214.sub1, 0, implicit $mode, implicit $exec |
| %899:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %214.sub0, 0, implicit $mode, implicit $exec |
| %900:sreg_64_xexec = S_OR_B64 %724, %898, implicit-def dead $scc |
| %901:sreg_64_xexec = S_OR_B64 %724, %899, implicit-def dead $scc |
| %214.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %214.sub1, 0, %730, %900, implicit $exec |
| %214.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %214.sub0, 0, %730, %901, implicit $exec |
| %902:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %355, 11, %214, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %903:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %213.sub1, 0, implicit $mode, implicit $exec |
| %904:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %213.sub0, 0, implicit $mode, implicit $exec |
| %905:sreg_64_xexec = S_OR_B64 %724, %903, implicit-def dead $scc |
| %906:sreg_64_xexec = S_OR_B64 %724, %904, implicit-def dead $scc |
| %213.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %213.sub1, 0, %730, %905, implicit $exec |
| %213.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %213.sub0, 0, %730, %906, implicit $exec |
| %907:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %356, 11, %213, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %908:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %212.sub1, 0, implicit $mode, implicit $exec |
| %909:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %212.sub0, 0, implicit $mode, implicit $exec |
| %910:sreg_64_xexec = S_OR_B64 %724, %908, implicit-def dead $scc |
| %911:sreg_64_xexec = S_OR_B64 %724, %909, implicit-def dead $scc |
| %212.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %212.sub1, 0, %730, %910, implicit $exec |
| %212.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %212.sub0, 0, %730, %911, implicit $exec |
| %912:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %357, 11, %212, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %913:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %211.sub1, 0, implicit $mode, implicit $exec |
| %914:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %211.sub0, 0, implicit $mode, implicit $exec |
| %915:sreg_64_xexec = S_OR_B64 %724, %913, implicit-def dead $scc |
| %916:sreg_64_xexec = S_OR_B64 %724, %914, implicit-def dead $scc |
| %211.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %211.sub1, 0, %730, %915, implicit $exec |
| %211.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %211.sub0, 0, %730, %916, implicit $exec |
| %917:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %358, 11, %211, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %918:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %210.sub1, 0, implicit $mode, implicit $exec |
| %919:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %210.sub0, 0, implicit $mode, implicit $exec |
| %920:sreg_64_xexec = S_OR_B64 %724, %918, implicit-def dead $scc |
| %921:sreg_64_xexec = S_OR_B64 %724, %919, implicit-def dead $scc |
| %210.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %210.sub1, 0, %730, %920, implicit $exec |
| %210.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %210.sub0, 0, %730, %921, implicit $exec |
| %922:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %359, 11, %210, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %923:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %209.sub1, 0, implicit $mode, implicit $exec |
| %924:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %209.sub0, 0, implicit $mode, implicit $exec |
| %925:sreg_64_xexec = S_OR_B64 %724, %923, implicit-def dead $scc |
| %926:sreg_64_xexec = S_OR_B64 %724, %924, implicit-def dead $scc |
| %209.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %209.sub1, 0, %730, %925, implicit $exec |
| %209.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %209.sub0, 0, %730, %926, implicit $exec |
| %927:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %360, 11, %209, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %928:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %208.sub1, 0, implicit $mode, implicit $exec |
| %929:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %208.sub0, 0, implicit $mode, implicit $exec |
| %930:sreg_64_xexec = S_OR_B64 %724, %928, implicit-def dead $scc |
| %931:sreg_64_xexec = S_OR_B64 %724, %929, implicit-def dead $scc |
| %208.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %208.sub1, 0, %730, %930, implicit $exec |
| %208.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %208.sub0, 0, %730, %931, implicit $exec |
| %932:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %361, 11, %208, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %933:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %207.sub1, 0, implicit $mode, implicit $exec |
| %934:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %207.sub0, 0, implicit $mode, implicit $exec |
| %935:sreg_64_xexec = S_OR_B64 %724, %933, implicit-def dead $scc |
| %936:sreg_64_xexec = S_OR_B64 %724, %934, implicit-def dead $scc |
| %207.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %207.sub1, 0, %730, %935, implicit $exec |
| %207.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %207.sub0, 0, %730, %936, implicit $exec |
| %937:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %362, 11, %207, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %938:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %206.sub1, 0, implicit $mode, implicit $exec |
| %939:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %206.sub0, 0, implicit $mode, implicit $exec |
| %940:sreg_64_xexec = S_OR_B64 %724, %938, implicit-def dead $scc |
| %941:sreg_64_xexec = S_OR_B64 %724, %939, implicit-def dead $scc |
| %206.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %206.sub1, 0, %730, %940, implicit $exec |
| %206.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %206.sub0, 0, %730, %941, implicit $exec |
| %942:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %363, 11, %206, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %943:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %205.sub1, 0, implicit $mode, implicit $exec |
| %944:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %205.sub0, 0, implicit $mode, implicit $exec |
| %945:sreg_64_xexec = S_OR_B64 %724, %943, implicit-def dead $scc |
| %946:sreg_64_xexec = S_OR_B64 %724, %944, implicit-def dead $scc |
| %205.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %205.sub1, 0, %730, %945, implicit $exec |
| %205.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %205.sub0, 0, %730, %946, implicit $exec |
| %947:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %364, 11, %205, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %948:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %204.sub1, 0, implicit $mode, implicit $exec |
| %949:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %204.sub0, 0, implicit $mode, implicit $exec |
| %950:sreg_64_xexec = S_OR_B64 %724, %948, implicit-def dead $scc |
| %951:sreg_64_xexec = S_OR_B64 %724, %949, implicit-def dead $scc |
| %204.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %204.sub1, 0, %730, %950, implicit $exec |
| %204.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %204.sub0, 0, %730, %951, implicit $exec |
| %952:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %365, 11, %204, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %953:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %203.sub1, 0, implicit $mode, implicit $exec |
| %954:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %203.sub0, 0, implicit $mode, implicit $exec |
| %955:sreg_64_xexec = S_OR_B64 %724, %953, implicit-def dead $scc |
| %956:sreg_64_xexec = S_OR_B64 %724, %954, implicit-def dead $scc |
| %203.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %203.sub1, 0, %730, %955, implicit $exec |
| %203.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %203.sub0, 0, %730, %956, implicit $exec |
| %957:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %366, 11, %203, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %958:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %202.sub1, 0, implicit $mode, implicit $exec |
| %959:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %202.sub0, 0, implicit $mode, implicit $exec |
| %960:sreg_64_xexec = S_OR_B64 %724, %958, implicit-def dead $scc |
| %961:sreg_64_xexec = S_OR_B64 %724, %959, implicit-def dead $scc |
| %202.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %202.sub1, 0, %730, %960, implicit $exec |
| %202.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %202.sub0, 0, %730, %961, implicit $exec |
| %962:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %367, 11, %202, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %963:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %201.sub1, 0, implicit $mode, implicit $exec |
| %964:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %201.sub0, 0, implicit $mode, implicit $exec |
| %965:sreg_64_xexec = S_OR_B64 %724, %963, implicit-def dead $scc |
| %966:sreg_64_xexec = S_OR_B64 %724, %964, implicit-def dead $scc |
| %201.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %201.sub1, 0, %730, %965, implicit $exec |
| %201.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %201.sub0, 0, %730, %966, implicit $exec |
| %967:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %368, 11, %201, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %968:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %200.sub1, 0, implicit $mode, implicit $exec |
| %969:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %200.sub0, 0, implicit $mode, implicit $exec |
| %970:sreg_64_xexec = S_OR_B64 %724, %968, implicit-def dead $scc |
| %971:sreg_64_xexec = S_OR_B64 %724, %969, implicit-def dead $scc |
| %200.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %200.sub1, 0, %730, %970, implicit $exec |
| %200.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %200.sub0, 0, %730, %971, implicit $exec |
| %972:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %369, 11, %200, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %973:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %199.sub1, 0, implicit $mode, implicit $exec |
| %974:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %199.sub0, 0, implicit $mode, implicit $exec |
| %975:sreg_64_xexec = S_OR_B64 %724, %973, implicit-def dead $scc |
| %976:sreg_64_xexec = S_OR_B64 %724, %974, implicit-def dead $scc |
| %199.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %199.sub1, 0, %730, %975, implicit $exec |
| %199.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %199.sub0, 0, %730, %976, implicit $exec |
| %977:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %370, 11, %199, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %978:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %198.sub1, 0, implicit $mode, implicit $exec |
| %979:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %198.sub0, 0, implicit $mode, implicit $exec |
| %980:sreg_64_xexec = S_OR_B64 %724, %978, implicit-def dead $scc |
| %981:sreg_64_xexec = S_OR_B64 %724, %979, implicit-def dead $scc |
| %198.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %198.sub1, 0, %730, %980, implicit $exec |
| %198.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %198.sub0, 0, %730, %981, implicit $exec |
| %982:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %371, 11, %198, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %983:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %197.sub1, 0, implicit $mode, implicit $exec |
| %984:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %197.sub0, 0, implicit $mode, implicit $exec |
| %985:sreg_64_xexec = S_OR_B64 %724, %983, implicit-def dead $scc |
| %986:sreg_64_xexec = S_OR_B64 %724, %984, implicit-def dead $scc |
| %197.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %197.sub1, 0, %730, %985, implicit $exec |
| %197.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %197.sub0, 0, %730, %986, implicit $exec |
| %987:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %372, 11, %197, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %988:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %196.sub1, 0, implicit $mode, implicit $exec |
| %989:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %196.sub0, 0, implicit $mode, implicit $exec |
| %990:sreg_64_xexec = S_OR_B64 %724, %988, implicit-def dead $scc |
| %991:sreg_64_xexec = S_OR_B64 %724, %989, implicit-def dead $scc |
| %196.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %196.sub1, 0, %730, %990, implicit $exec |
| %196.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %196.sub0, 0, %730, %991, implicit $exec |
| %992:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %373, 11, %196, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %993:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %195.sub1, 0, implicit $mode, implicit $exec |
| %994:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %195.sub0, 0, implicit $mode, implicit $exec |
| %995:sreg_64_xexec = S_OR_B64 %724, %993, implicit-def dead $scc |
| %996:sreg_64_xexec = S_OR_B64 %724, %994, implicit-def dead $scc |
| %195.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %195.sub1, 0, %730, %995, implicit $exec |
| %195.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %195.sub0, 0, %730, %996, implicit $exec |
| %997:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %374, 11, %195, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %998:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %194.sub1, 0, implicit $mode, implicit $exec |
| %999:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %194.sub0, 0, implicit $mode, implicit $exec |
| %1000:sreg_64_xexec = S_OR_B64 %724, %998, implicit-def dead $scc |
| %1001:sreg_64_xexec = S_OR_B64 %724, %999, implicit-def dead $scc |
| %194.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %194.sub1, 0, %730, %1000, implicit $exec |
| %194.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %194.sub0, 0, %730, %1001, implicit $exec |
| %1002:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %375, 11, %194, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1003:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %193.sub1, 0, implicit $mode, implicit $exec |
| %1004:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %193.sub0, 0, implicit $mode, implicit $exec |
| %1005:sreg_64_xexec = S_OR_B64 %724, %1003, implicit-def dead $scc |
| %1006:sreg_64_xexec = S_OR_B64 %724, %1004, implicit-def dead $scc |
| %193.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %193.sub1, 0, %730, %1005, implicit $exec |
| %193.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %193.sub0, 0, %730, %1006, implicit $exec |
| %1007:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %376, 11, %193, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1008:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %192.sub1, 0, implicit $mode, implicit $exec |
| %1009:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %192.sub0, 0, implicit $mode, implicit $exec |
| %1010:sreg_64_xexec = S_OR_B64 %724, %1008, implicit-def dead $scc |
| %1011:sreg_64_xexec = S_OR_B64 %724, %1009, implicit-def dead $scc |
| %192.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %192.sub1, 0, %730, %1010, implicit $exec |
| %192.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %192.sub0, 0, %730, %1011, implicit $exec |
| %1012:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %377, 11, %192, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1013:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %191.sub1, 0, implicit $mode, implicit $exec |
| %1014:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %191.sub0, 0, implicit $mode, implicit $exec |
| %1015:sreg_64_xexec = S_OR_B64 %724, %1013, implicit-def dead $scc |
| %1016:sreg_64_xexec = S_OR_B64 %724, %1014, implicit-def dead $scc |
| %191.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %191.sub1, 0, %730, %1015, implicit $exec |
| %191.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %191.sub0, 0, %730, %1016, implicit $exec |
| %1017:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %378, 11, %191, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1018:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %190.sub1, 0, implicit $mode, implicit $exec |
| %1019:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %190.sub0, 0, implicit $mode, implicit $exec |
| %1020:sreg_64_xexec = S_OR_B64 %724, %1018, implicit-def dead $scc |
| %1021:sreg_64_xexec = S_OR_B64 %724, %1019, implicit-def dead $scc |
| %190.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %190.sub1, 0, %730, %1020, implicit $exec |
| %190.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %190.sub0, 0, %730, %1021, implicit $exec |
| %1022:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %379, 11, %190, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1023:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %189.sub1, 0, implicit $mode, implicit $exec |
| %1024:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %189.sub0, 0, implicit $mode, implicit $exec |
| %1025:sreg_64_xexec = S_OR_B64 %724, %1023, implicit-def dead $scc |
| %1026:sreg_64_xexec = S_OR_B64 %724, %1024, implicit-def dead $scc |
| %189.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %189.sub1, 0, %730, %1025, implicit $exec |
| %189.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %189.sub0, 0, %730, %1026, implicit $exec |
| %1027:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %380, 11, %189, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1028:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %188.sub1, 0, implicit $mode, implicit $exec |
| %1029:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %188.sub0, 0, implicit $mode, implicit $exec |
| %1030:sreg_64_xexec = S_OR_B64 %724, %1028, implicit-def dead $scc |
| %1031:sreg_64_xexec = S_OR_B64 %724, %1029, implicit-def dead $scc |
| %188.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %188.sub1, 0, %730, %1030, implicit $exec |
| %188.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %188.sub0, 0, %730, %1031, implicit $exec |
| %1032:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %381, 11, %188, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1033:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %187.sub1, 0, implicit $mode, implicit $exec |
| %1034:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %187.sub0, 0, implicit $mode, implicit $exec |
| %1035:sreg_64_xexec = S_OR_B64 %724, %1033, implicit-def dead $scc |
| %1036:sreg_64_xexec = S_OR_B64 %724, %1034, implicit-def dead $scc |
| %187.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %187.sub1, 0, %730, %1035, implicit $exec |
| %187.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %187.sub0, 0, %730, %1036, implicit $exec |
| %1037:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %382, 11, %187, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1038:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %174.sub1, 0, implicit $mode, implicit $exec |
| %1039:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %461, 0, %174.sub0, 0, implicit $mode, implicit $exec |
| %1040:sreg_64_xexec = S_OR_B64 %724, %1038, implicit-def dead $scc |
| %1041:sreg_64_xexec = S_OR_B64 %724, %1039, implicit-def dead $scc |
| %174.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %174.sub1, 0, %730, %1040, implicit $exec |
| %174.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %174.sub0, 0, %730, %1041, implicit $exec |
| %1042:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %383, 11, %174, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| undef %1043.sub0:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %671.sub0, implicit $mode, implicit $exec |
| %1043.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %671.sub1, implicit $mode, implicit $exec |
| undef %1044.sub0:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %697.sub0, implicit $mode, implicit $exec |
| %1044.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %697.sub1, implicit $mode, implicit $exec |
| undef %1045.sub0:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %723.sub0, implicit $mode, implicit $exec |
| %1045.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %723.sub1, implicit $mode, implicit $exec |
| undef %1046.sub0:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %742.sub0, implicit $mode, implicit $exec |
| %1046.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %742.sub1, implicit $mode, implicit $exec |
| undef %1047.sub0:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %747.sub0, implicit $mode, implicit $exec |
| %1047.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %747.sub1, implicit $mode, implicit $exec |
| undef %1048.sub0:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %752.sub0, implicit $mode, implicit $exec |
| %1048.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %752.sub1, implicit $mode, implicit $exec |
| undef %1049.sub0:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %757.sub0, implicit $mode, implicit $exec |
| %1049.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %757.sub1, implicit $mode, implicit $exec |
| undef %1050.sub0:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %762.sub0, implicit $mode, implicit $exec |
| %1050.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %762.sub1, implicit $mode, implicit $exec |
| undef %1051.sub0:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %767.sub0, implicit $mode, implicit $exec |
| %1051.sub1:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %767.sub1, implicit $mode, implicit $exec |
| undef %1052.sub0:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %772.sub0, implicit $mode, implicit $exec |
| %1052.sub1:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %772.sub1, implicit $mode, implicit $exec |
| undef %1053.sub0:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %777.sub0, implicit $mode, implicit $exec |
| %1053.sub1:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %777.sub1, implicit $mode, implicit $exec |
| undef %1054.sub0:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %782.sub0, implicit $mode, implicit $exec |
| %1054.sub1:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %782.sub1, implicit $mode, implicit $exec |
| undef %1055.sub0:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %787.sub0, implicit $mode, implicit $exec |
| %1055.sub1:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %787.sub1, implicit $mode, implicit $exec |
| undef %1056.sub0:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %792.sub0, implicit $mode, implicit $exec |
| %1056.sub1:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %792.sub1, implicit $mode, implicit $exec |
| undef %1057.sub0:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %797.sub0, implicit $mode, implicit $exec |
| %1057.sub1:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %797.sub1, implicit $mode, implicit $exec |
| undef %1058.sub0:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %802.sub0, implicit $mode, implicit $exec |
| %1058.sub1:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %802.sub1, implicit $mode, implicit $exec |
| undef %1059.sub0:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %807.sub0, implicit $mode, implicit $exec |
| %1059.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %807.sub1, implicit $mode, implicit $exec |
| undef %1060.sub0:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %812.sub0, implicit $mode, implicit $exec |
| %1060.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %812.sub1, implicit $mode, implicit $exec |
| undef %1061.sub0:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %817.sub0, implicit $mode, implicit $exec |
| %1061.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %817.sub1, implicit $mode, implicit $exec |
| undef %1062.sub0:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %822.sub0, implicit $mode, implicit $exec |
| %1062.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %822.sub1, implicit $mode, implicit $exec |
| undef %1063.sub0:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %827.sub0, implicit $mode, implicit $exec |
| %1063.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %827.sub1, implicit $mode, implicit $exec |
| undef %1064.sub0:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %832.sub0, implicit $mode, implicit $exec |
| %1064.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %832.sub1, implicit $mode, implicit $exec |
| undef %1065.sub0:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %837.sub0, implicit $mode, implicit $exec |
| %1065.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %837.sub1, implicit $mode, implicit $exec |
| undef %1066.sub0:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %842.sub0, implicit $mode, implicit $exec |
| %1066.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %842.sub1, implicit $mode, implicit $exec |
| %1051.sub2:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %847.sub0, implicit $mode, implicit $exec |
| %1051.sub3:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %847.sub1, implicit $mode, implicit $exec |
| %1052.sub2:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %852.sub0, implicit $mode, implicit $exec |
| %1052.sub3:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %852.sub1, implicit $mode, implicit $exec |
| %1053.sub2:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %857.sub0, implicit $mode, implicit $exec |
| %1053.sub3:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %857.sub1, implicit $mode, implicit $exec |
| %1054.sub2:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %862.sub0, implicit $mode, implicit $exec |
| %1054.sub3:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %862.sub1, implicit $mode, implicit $exec |
| %1055.sub2:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %867.sub0, implicit $mode, implicit $exec |
| %1055.sub3:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %867.sub1, implicit $mode, implicit $exec |
| %1056.sub2:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %872.sub0, implicit $mode, implicit $exec |
| %1056.sub3:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %872.sub1, implicit $mode, implicit $exec |
| %1057.sub2:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %877.sub0, implicit $mode, implicit $exec |
| %1057.sub3:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %877.sub1, implicit $mode, implicit $exec |
| %1058.sub2:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %882.sub0, implicit $mode, implicit $exec |
| %1058.sub3:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %882.sub1, implicit $mode, implicit $exec |
| undef %1067.sub0:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %887.sub0, implicit $mode, implicit $exec |
| %1067.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %887.sub1, implicit $mode, implicit $exec |
| undef %1068.sub0:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %892.sub0, implicit $mode, implicit $exec |
| %1068.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %892.sub1, implicit $mode, implicit $exec |
| undef %1069.sub0:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %897.sub0, implicit $mode, implicit $exec |
| %1069.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %897.sub1, implicit $mode, implicit $exec |
| undef %1070.sub0:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %902.sub0, implicit $mode, implicit $exec |
| %1070.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %902.sub1, implicit $mode, implicit $exec |
| undef %1071.sub0:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %907.sub0, implicit $mode, implicit $exec |
| %1071.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %907.sub1, implicit $mode, implicit $exec |
| undef %1072.sub0:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %912.sub0, implicit $mode, implicit $exec |
| %1072.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %912.sub1, implicit $mode, implicit $exec |
| undef %1073.sub0:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %917.sub0, implicit $mode, implicit $exec |
| %1073.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %917.sub1, implicit $mode, implicit $exec |
| undef %1074.sub0:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %922.sub0, implicit $mode, implicit $exec |
| %1074.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %922.sub1, implicit $mode, implicit $exec |
| undef %1075.sub0:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %927.sub0, implicit $mode, implicit $exec |
| %1075.sub1:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %927.sub1, implicit $mode, implicit $exec |
| undef %1076.sub0:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %932.sub0, implicit $mode, implicit $exec |
| %1076.sub1:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %932.sub1, implicit $mode, implicit $exec |
| undef %1077.sub0:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %937.sub0, implicit $mode, implicit $exec |
| %1077.sub1:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %937.sub1, implicit $mode, implicit $exec |
| undef %1078.sub0:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %942.sub0, implicit $mode, implicit $exec |
| %1078.sub1:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %942.sub1, implicit $mode, implicit $exec |
| undef %1079.sub0:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %947.sub0, implicit $mode, implicit $exec |
| %1079.sub1:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %947.sub1, implicit $mode, implicit $exec |
| undef %1080.sub0:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %952.sub0, implicit $mode, implicit $exec |
| %1080.sub1:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %952.sub1, implicit $mode, implicit $exec |
| undef %1081.sub0:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %957.sub0, implicit $mode, implicit $exec |
| %1081.sub1:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %957.sub1, implicit $mode, implicit $exec |
| undef %1082.sub0:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %962.sub0, implicit $mode, implicit $exec |
| %1082.sub1:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %962.sub1, implicit $mode, implicit $exec |
| undef %1083.sub0:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %967.sub0, implicit $mode, implicit $exec |
| %1083.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %967.sub1, implicit $mode, implicit $exec |
| undef %1084.sub0:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %972.sub0, implicit $mode, implicit $exec |
| %1084.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %972.sub1, implicit $mode, implicit $exec |
| undef %1085.sub0:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %977.sub0, implicit $mode, implicit $exec |
| %1085.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %977.sub1, implicit $mode, implicit $exec |
| undef %1086.sub0:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %982.sub0, implicit $mode, implicit $exec |
| %1086.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %982.sub1, implicit $mode, implicit $exec |
| undef %1087.sub0:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %987.sub0, implicit $mode, implicit $exec |
| %1087.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %987.sub1, implicit $mode, implicit $exec |
| undef %1088.sub0:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %992.sub0, implicit $mode, implicit $exec |
| %1088.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %992.sub1, implicit $mode, implicit $exec |
| undef %1089.sub0:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %997.sub0, implicit $mode, implicit $exec |
| %1089.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %997.sub1, implicit $mode, implicit $exec |
| undef %1090.sub0:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %1002.sub0, implicit $mode, implicit $exec |
| %1090.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %1002.sub1, implicit $mode, implicit $exec |
| %1075.sub2:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1007.sub0, implicit $mode, implicit $exec |
| %1075.sub3:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1007.sub1, implicit $mode, implicit $exec |
| %1076.sub2:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1012.sub0, implicit $mode, implicit $exec |
| %1076.sub3:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1012.sub1, implicit $mode, implicit $exec |
| %1077.sub2:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1017.sub0, implicit $mode, implicit $exec |
| %1077.sub3:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1017.sub1, implicit $mode, implicit $exec |
| %1078.sub2:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1022.sub0, implicit $mode, implicit $exec |
| %1078.sub3:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1022.sub1, implicit $mode, implicit $exec |
| %1079.sub2:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1027.sub0, implicit $mode, implicit $exec |
| %1079.sub3:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1027.sub1, implicit $mode, implicit $exec |
| %1080.sub2:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1032.sub0, implicit $mode, implicit $exec |
| %1080.sub3:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1032.sub1, implicit $mode, implicit $exec |
| %1081.sub2:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1037.sub0, implicit $mode, implicit $exec |
| %1081.sub3:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1037.sub1, implicit $mode, implicit $exec |
| %1082.sub2:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1042.sub0, implicit $mode, implicit $exec |
| %1082.sub3:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1042.sub1, implicit $mode, implicit $exec |
| %1091:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %315, 8, %1043, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1092:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %314, 8, %1044, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1093:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %283, 8, %1045, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1094:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %282, 8, %1046, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1095:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %313, 8, %1047, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1096:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %312, 8, %1048, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1097:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %281, 8, %1049, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1098:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %280, 8, %1050, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1099:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %311, 8, %1051.sub0_sub1, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1100:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %310, 8, %1052.sub0_sub1, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1101:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %279, 8, %1053.sub0_sub1, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1102:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %278, 8, %1054.sub0_sub1, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1103:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %309, 8, %1055.sub0_sub1, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1104:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %308, 8, %1056.sub0_sub1, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1105:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %277, 8, %1057.sub0_sub1, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1106:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %276, 8, %1058.sub0_sub1, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1107:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %307, 8, %1059, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1108:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %306, 8, %1060, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1109:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %275, 8, %1061, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1110:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %274, 8, %1062, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1111:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %305, 8, %1063, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1112:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %304, 8, %1064, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1113:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %273, 8, %1065, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1114:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %272, 8, %1066, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1115:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %303, 8, %1051.sub2_sub3, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1116:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %302, 8, %1052.sub2_sub3, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1117:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %271, 8, %1053.sub2_sub3, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1118:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %270, 8, %1054.sub2_sub3, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1119:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %301, 8, %1055.sub2_sub3, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1120:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %300, 8, %1056.sub2_sub3, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1121:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %269, 8, %1057.sub2_sub3, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1122:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %268, 8, %1058.sub2_sub3, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1123:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %299, 8, %1067, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1124:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %298, 8, %1068, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1125:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %267, 8, %1069, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1126:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %266, 8, %1070, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1127:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %297, 8, %1071, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1128:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %296, 8, %1072, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1129:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %265, 8, %1073, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1130:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %264, 8, %1074, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1131:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %295, 8, %1075.sub0_sub1, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1132:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %294, 8, %1076.sub0_sub1, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1133:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %263, 8, %1077.sub0_sub1, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1134:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %262, 8, %1078.sub0_sub1, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1135:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %293, 8, %1079.sub0_sub1, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1136:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %292, 8, %1080.sub0_sub1, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1137:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %261, 8, %1081.sub0_sub1, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1138:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %260, 8, %1082.sub0_sub1, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1139:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %291, 8, %1083, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1140:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %290, 8, %1084, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1141:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %259, 8, %1085, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1142:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %258, 8, %1086, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1143:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %289, 8, %1087, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1144:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %288, 8, %1088, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1145:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %257, 8, %1089, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1146:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %256, 8, %1090, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1147:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %287, 8, %1075.sub2_sub3, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1148:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %286, 8, %1076.sub2_sub3, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1149:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %255, 8, %1077.sub2_sub3, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1150:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %254, 8, %1078.sub2_sub3, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1151:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %285, 8, %1079.sub2_sub3, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1152:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %284, 8, %1080.sub2_sub3, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1153:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %253, 8, %1081.sub2_sub3, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1154:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %173, 8, %1082.sub2_sub3, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %315:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %1091, 8, %666, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %314:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %1092, 8, %692, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %283:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %1093, 8, %718, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %282:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %1094, 8, %644, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| undef %1155.sub0:sgpr_64 = COPY %644.sub1 |
| %313:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %1095, 0, %1155, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %312:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %1096, 0, %1155, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %281:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %1097, 0, %1155, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %280:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %1098, 0, %1155, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %311:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %1099, 0, %1155, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %310:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %1100, 0, %1155, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %279:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %1101, 0, %1155, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %278:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %1102, 0, %1155, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %309:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %1103, 0, %1155, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %308:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %1104, 0, %1155, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %258:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %1142, 0, %1155, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %289:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %1143, 0, %1155, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %288:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %1144, 0, %1155, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %257:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %1145, 0, %1155, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %256:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %1146, 0, %1155, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %287:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %1147, 0, %1155, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %286:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %1148, 0, %1155, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %255:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %1149, 0, %1155, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %254:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %1150, 0, %1155, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %285:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %1151, 0, %1155, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %284:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %1152, 0, %1155, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %253:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %1153, 0, %1155, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %173:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %1154, 0, %1155, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1156:vgpr_32 = disjoint V_OR_B32_e32 %386, %108, implicit $exec |
| %1157:vgpr_32 = disjoint V_OR_B32_e32 %386, %109, implicit $exec |
| %1158:vgpr_32 = disjoint V_OR_B32_e32 %386, %110, implicit $exec |
| %1159:vgpr_32 = disjoint V_OR_B32_e32 %386, %111, implicit $exec |
| %1160:sreg_32 = S_LSHL_B32 %17, 12, implicit-def dead $scc |
| %1161:sreg_32 = exact S_LSHR_B32 %389, 4, implicit-def dead $scc |
| %1162:sreg_32 = S_ADD_I32 %1160, %1161, implicit-def dead $scc |
| %15:sreg_32 = S_ADD_I32 %1162, 32768, implicit-def dead $scc |
| %1163:vgpr_32 = V_LSHLREV_B32_e32 1, %1156, implicit $exec |
| $m0 = COPY %15 |
| BUFFER_LOAD_DWORDX4_LDS_OFFEN %1163, %7, 0, 0, 0, 0, 1, implicit $exec, implicit $m0 |
| $m0 = S_ADD_I32 %1162, 33824, implicit-def dead $scc |
| %1164:vgpr_32 = V_LSHLREV_B32_e32 1, %1157, implicit $exec |
| BUFFER_LOAD_DWORDX4_LDS_OFFEN %1164, %7, 0, 0, 0, 0, 1, implicit $exec, implicit $m0 |
| $m0 = S_ADD_I32 %1162, 34880, implicit-def dead $scc |
| %1165:vgpr_32 = V_LSHLREV_B32_e32 1, %1158, implicit $exec |
| BUFFER_LOAD_DWORDX4_LDS_OFFEN %1165, %7, 0, 0, 0, 0, 1, implicit $exec, implicit $m0 |
| $m0 = S_ADD_I32 %1162, 35936, implicit-def dead $scc |
| %1166:vgpr_32 = V_LSHLREV_B32_e32 1, %1159, implicit $exec |
| BUFFER_LOAD_DWORDX4_LDS_OFFEN %1166, %7, 0, 0, 0, 0, 1, implicit $exec, implicit $m0 |
| %1167:vgpr_32 = nuw V_ADD_U32_e32 %319, %108, implicit $exec |
| undef %1168.sub0_sub1:av_128_align2 = DS_READ_B64_TR_B16 %1167, 0, 0, implicit $exec |
| %1168.sub2_sub3:av_128_align2 = DS_READ_B64_TR_B16 %1167, 512, 0, implicit $exec |
| undef %1169.sub0_sub1:av_128_align2 = DS_READ_B64_TR_B16 %1167, 1056, 0, implicit $exec |
| %1169.sub2_sub3:av_128_align2 = DS_READ_B64_TR_B16 %1167, 1568, 0, implicit $exec |
| undef %1170.sub0_sub1:av_128_align2 = DS_READ_B64_TR_B16 %1167, 2112, 0, implicit $exec |
| %1170.sub2_sub3:av_128_align2 = DS_READ_B64_TR_B16 %1167, 2624, 0, implicit $exec |
| undef %1171.sub0_sub1:av_128_align2 = DS_READ_B64_TR_B16 %1167, 3168, 0, implicit $exec |
| %1171.sub2_sub3:av_128_align2 = DS_READ_B64_TR_B16 %1167, 3680, 0, implicit $exec |
| S_WAITCNT 49279 |
| WAVE_BARRIER |
| undef %1172.sub0:vreg_128_align2 = COPY %1043.sub0 |
| %1172.sub1:vreg_128_align2 = COPY %1051.sub0 |
| %1172.sub2:vreg_128_align2 = COPY %1059.sub0 |
| %1172.sub3:vreg_128_align2 = COPY %1051.sub2 |
| DS_WRITE_B128_gfx9 %11, %1172, 0, 0, implicit $exec |
| %1051.sub0:vreg_128_align2 = COPY %1043.sub1 |
| %1051.sub2:vreg_128_align2 = COPY %1059.sub1 |
| DS_WRITE_B128_gfx9 %11, %1051, 16, 0, implicit $exec |
| undef %1173.sub0:vreg_128_align2 = COPY %1044.sub0 |
| %1173.sub1:vreg_128_align2 = COPY %1052.sub0 |
| %1173.sub2:vreg_128_align2 = COPY %1060.sub0 |
| %1173.sub3:vreg_128_align2 = COPY %1052.sub2 |
| DS_WRITE_B128_gfx9 %11, %1173, 32, 0, implicit $exec |
| %1052.sub0:vreg_128_align2 = COPY %1044.sub1 |
| %1052.sub2:vreg_128_align2 = COPY %1060.sub1 |
| DS_WRITE_B128_gfx9 %11, %1052, 48, 0, implicit $exec |
| undef %1174.sub0:vreg_128_align2 = COPY %1045.sub0 |
| %1174.sub1:vreg_128_align2 = COPY %1053.sub0 |
| %1174.sub2:vreg_128_align2 = COPY %1061.sub0 |
| %1174.sub3:vreg_128_align2 = COPY %1053.sub2 |
| DS_WRITE_B128_gfx9 %11, %1174, 64, 0, implicit $exec |
| %1053.sub0:vreg_128_align2 = COPY %1045.sub1 |
| %1053.sub2:vreg_128_align2 = COPY %1061.sub1 |
| DS_WRITE_B128_gfx9 %11, %1053, 80, 0, implicit $exec |
| undef %1175.sub0:vreg_128_align2 = COPY %1046.sub0 |
| %1175.sub1:vreg_128_align2 = COPY %1054.sub0 |
| %1175.sub2:vreg_128_align2 = COPY %1062.sub0 |
| %1175.sub3:vreg_128_align2 = COPY %1054.sub2 |
| DS_WRITE_B128_gfx9 %11, %1175, 96, 0, implicit $exec |
| %1054.sub0:vreg_128_align2 = COPY %1046.sub1 |
| %1054.sub2:vreg_128_align2 = COPY %1062.sub1 |
| DS_WRITE_B128_gfx9 %11, %1054, 112, 0, implicit $exec |
| undef %1176.sub0:vreg_128_align2 = COPY %1047.sub0 |
| %1176.sub1:vreg_128_align2 = COPY %1055.sub0 |
| %1176.sub2:vreg_128_align2 = COPY %1063.sub0 |
| %1176.sub3:vreg_128_align2 = COPY %1055.sub2 |
| DS_WRITE_B128_gfx9 %11, %1176, 128, 0, implicit $exec |
| %1055.sub0:vreg_128_align2 = COPY %1047.sub1 |
| %1055.sub2:vreg_128_align2 = COPY %1063.sub1 |
| DS_WRITE_B128_gfx9 %11, %1055, 144, 0, implicit $exec |
| undef %1177.sub0:vreg_128_align2 = COPY %1048.sub0 |
| %1177.sub1:vreg_128_align2 = COPY %1056.sub0 |
| %1177.sub2:vreg_128_align2 = COPY %1064.sub0 |
| %1177.sub3:vreg_128_align2 = COPY %1056.sub2 |
| DS_WRITE_B128_gfx9 %11, %1177, 160, 0, implicit $exec |
| %1056.sub0:vreg_128_align2 = COPY %1048.sub1 |
| %1056.sub2:vreg_128_align2 = COPY %1064.sub1 |
| DS_WRITE_B128_gfx9 %11, %1056, 176, 0, implicit $exec |
| undef %1178.sub0:vreg_128_align2 = COPY %1049.sub0 |
| %1178.sub1:vreg_128_align2 = COPY %1057.sub0 |
| %1178.sub2:vreg_128_align2 = COPY %1065.sub0 |
| %1178.sub3:vreg_128_align2 = COPY %1057.sub2 |
| DS_WRITE_B128_gfx9 %11, %1178, 192, 0, implicit $exec |
| %1057.sub0:vreg_128_align2 = COPY %1049.sub1 |
| %1057.sub2:vreg_128_align2 = COPY %1065.sub1 |
| DS_WRITE_B128_gfx9 %11, %1057, 208, 0, implicit $exec |
| undef %1179.sub0:vreg_128_align2 = COPY %1050.sub0 |
| %1179.sub1:vreg_128_align2 = COPY %1058.sub0 |
| %1179.sub2:vreg_128_align2 = COPY %1066.sub0 |
| %1179.sub3:vreg_128_align2 = COPY %1058.sub2 |
| DS_WRITE_B128_gfx9 %11, %1179, 224, 0, implicit $exec |
| %1058.sub0:vreg_128_align2 = COPY %1050.sub1 |
| %1058.sub2:vreg_128_align2 = COPY %1066.sub1 |
| DS_WRITE_B128_gfx9 %11, %1058, 240, 0, implicit $exec |
| WAVE_BARRIER |
| %1180:vreg_128_align2 = DS_READ_B128_gfx9 %150, 0, 0, implicit $exec |
| WAVE_BARRIER |
| %1079.sub0:vreg_128_align2 = COPY %1071.sub1 |
| %1079.sub2:vreg_128_align2 = COPY %1087.sub1 |
| DS_WRITE_B128_gfx9 %11, %1079, 144, 0, implicit $exec |
| undef %1181.sub0:vreg_128_align2 = COPY %1072.sub0 |
| %1181.sub1:vreg_128_align2 = COPY %1080.sub0 |
| %1181.sub2:vreg_128_align2 = COPY %1088.sub0 |
| %1181.sub3:vreg_128_align2 = COPY %1080.sub2 |
| DS_WRITE_B128_gfx9 %11, %1181, 160, 0, implicit $exec |
| %1080.sub0:vreg_128_align2 = COPY %1072.sub1 |
| %1080.sub2:vreg_128_align2 = COPY %1088.sub1 |
| DS_WRITE_B128_gfx9 %11, %1080, 176, 0, implicit $exec |
| undef %1182.sub0:vreg_128_align2 = COPY %1073.sub0 |
| %1182.sub1:vreg_128_align2 = COPY %1081.sub0 |
| %1182.sub2:vreg_128_align2 = COPY %1089.sub0 |
| %1182.sub3:vreg_128_align2 = COPY %1081.sub2 |
| DS_WRITE_B128_gfx9 %11, %1182, 192, 0, implicit $exec |
| %1081.sub0:vreg_128_align2 = COPY %1073.sub1 |
| %1081.sub2:vreg_128_align2 = COPY %1089.sub1 |
| DS_WRITE_B128_gfx9 %11, %1081, 208, 0, implicit $exec |
| undef %1183.sub0:vreg_128_align2 = COPY %1074.sub0 |
| %1183.sub1:vreg_128_align2 = COPY %1082.sub0 |
| %1183.sub2:vreg_128_align2 = COPY %1090.sub0 |
| %1183.sub3:vreg_128_align2 = COPY %1082.sub2 |
| DS_WRITE_B128_gfx9 %11, %1183, 224, 0, implicit $exec |
| %1082.sub0:vreg_128_align2 = COPY %1074.sub1 |
| %1082.sub2:vreg_128_align2 = COPY %1090.sub1 |
| DS_WRITE_B128_gfx9 %11, %1082, 240, 0, implicit $exec |
| WAVE_BARRIER |
| %1184:vreg_128_align2 = DS_READ_B128_gfx9 %150, 0, 0, implicit $exec |
| S_WAITCNT 49279 |
| WAVE_BARRIER |
| %1185:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 %655, implicit $mode, implicit $exec |
| DS_WRITE_B16_gfx9 %151, %1185, 0, 0, implicit $exec |
| %1186:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 %656, implicit $mode, implicit $exec |
| DS_WRITE_B16_gfx9 %151, %1186, 128, 0, implicit $exec |
| DS_WRITE_B16_gfx9 %151, %11, 4096, 0, implicit $exec |
| DS_WRITE_B16_gfx9 %151, %11, 4224, 0, implicit $exec |
| DS_WRITE_B16_gfx9 %166, %11, 20608, 0, implicit $exec |
| DS_WRITE_B16_gfx9 %166, %11, 24576, 0, implicit $exec |
| DS_WRITE_B16_gfx9 %166, %11, 24704, 0, implicit $exec |
| DS_WRITE_B16_gfx9 %166, %11, 28672, 0, implicit $exec |
| DS_WRITE_B16_gfx9 %166, %11, 28800, 0, implicit $exec |
| S_WAITCNT 49279 |
| WAVE_BARRIER |
| undef %1187.sub0_sub1_sub2_sub3:av_192_align2 = DS_READ2_B64_gfx9 %169, 0, 16, 0, implicit $exec |
| %1188:vgpr_32 = V_ADD_U32_e32 4096, %169, implicit $exec |
| undef %1189.sub0_sub1_sub2_sub3:av_192_align2 = DS_READ2_B64_gfx9 %1188, 0, 16, 0, implicit $exec |
| %1190:vgpr_32 = V_ADD_U32_e32 8192, %169, implicit $exec |
| undef %1191.sub0_sub1_sub2_sub3:av_192_align2 = DS_READ2_B64_gfx9 %1190, 0, 16, 0, implicit $exec |
| %1192:vgpr_32 = V_ADD_U32_e32 12288, %169, implicit $exec |
| undef %1193.sub0_sub1_sub2_sub3:av_192_align2 = DS_READ2_B64_gfx9 %1192, 0, 16, 0, implicit $exec |
| %1194:vgpr_32 = V_ADD_U32_e32 16384, %169, implicit $exec |
| undef %1195.sub0_sub1_sub2_sub3:av_192_align2 = DS_READ2_B64_gfx9 %1194, 0, 16, 0, implicit $exec |
| %1196:vgpr_32 = V_ADD_U32_e32 20480, %169, implicit $exec |
| undef %1197.sub0_sub1_sub2_sub3:av_192_align2 = DS_READ2_B64_gfx9 %1196, 0, 16, 0, implicit $exec |
| %1198:vgpr_32 = V_ADD_U32_e32 24576, %169, implicit $exec |
| undef %1199.sub0_sub1_sub2_sub3:av_192_align2 = DS_READ2_B64_gfx9 %1198, 0, 16, 0, implicit $exec |
| %1200:vgpr_32 = V_ADD_U32_e32 28672, %169, implicit $exec |
| undef %1201.sub0_sub1_sub2_sub3:av_192_align2 = DS_READ2_B64_gfx9 %1200, 0, 16, 0, implicit $exec |
| undef %1202.sub2_sub3_sub4_sub5:av_192_align2 = DS_READ2_B64_gfx9 %170, 0, 16, 0, implicit $exec |
| %1203:vgpr_32 = V_ADD_U32_e32 4096, %170, implicit $exec |
| undef %1204.sub2_sub3_sub4_sub5:av_192_align2 = DS_READ2_B64_gfx9 %1203, 0, 16, 0, implicit $exec |
| %1205:vgpr_32 = V_ADD_U32_e32 8192, %170, implicit $exec |
| undef %1206.sub2_sub3_sub4_sub5:av_192_align2 = DS_READ2_B64_gfx9 %1205, 0, 16, 0, implicit $exec |
| %1207:vgpr_32 = V_ADD_U32_e32 12288, %170, implicit $exec |
| undef %1208.sub2_sub3_sub4_sub5:av_192_align2 = DS_READ2_B64_gfx9 %1207, 0, 16, 0, implicit $exec |
| %1209:vgpr_32 = V_ADD_U32_e32 16384, %170, implicit $exec |
| undef %1210.sub2_sub3_sub4_sub5:av_192_align2 = DS_READ2_B64_gfx9 %1209, 0, 16, 0, implicit $exec |
| %1211:vgpr_32 = V_ADD_U32_e32 20480, %170, implicit $exec |
| undef %1212.sub2_sub3_sub4_sub5:av_192_align2 = DS_READ2_B64_gfx9 %1211, 0, 16, 0, implicit $exec |
| %1213:vgpr_32 = V_ADD_U32_e32 24576, %170, implicit $exec |
| undef %1214.sub2_sub3_sub4_sub5:av_192_align2 = DS_READ2_B64_gfx9 %1213, 0, 16, 0, implicit $exec |
| %1215:vgpr_32 = V_ADD_U32_e32 28672, %170, implicit $exec |
| undef %1216.sub2_sub3_sub4_sub5:av_192_align2 = DS_READ2_B64_gfx9 %1215, 0, 16, 0, implicit $exec |
| undef %1217.sub0_sub1_sub2_sub3:av_192_align2 = DS_READ2_B64_gfx9 %171, 0, 16, 0, implicit $exec |
| %1218:vgpr_32 = V_ADD_U32_e32 4096, %171, implicit $exec |
| undef %1219.sub0_sub1_sub2_sub3:av_192_align2 = DS_READ2_B64_gfx9 %1218, 0, 16, 0, implicit $exec |
| %1220:vgpr_32 = V_ADD_U32_e32 8192, %171, implicit $exec |
| undef %1221.sub0_sub1_sub2_sub3:av_192_align2 = DS_READ2_B64_gfx9 %1220, 0, 16, 0, implicit $exec |
| %1222:vgpr_32 = V_ADD_U32_e32 12288, %171, implicit $exec |
| undef %1223.sub0_sub1_sub2_sub3:av_192_align2 = DS_READ2_B64_gfx9 %1222, 0, 16, 0, implicit $exec |
| %1224:vgpr_32 = V_ADD_U32_e32 16384, %171, implicit $exec |
| undef %1225.sub0_sub1_sub2_sub3:av_192_align2 = DS_READ2_B64_gfx9 %1224, 0, 16, 0, implicit $exec |
| %1226:vgpr_32 = V_ADD_U32_e32 20480, %171, implicit $exec |
| undef %1227.sub0_sub1_sub2_sub3:av_192_align2 = DS_READ2_B64_gfx9 %1226, 0, 16, 0, implicit $exec |
| %1228:vgpr_32 = V_ADD_U32_e32 24576, %171, implicit $exec |
| undef %1229.sub0_sub1_sub2_sub3:av_192_align2 = DS_READ2_B64_gfx9 %1228, 0, 16, 0, implicit $exec |
| %1230:vgpr_32 = V_ADD_U32_e32 28672, %171, implicit $exec |
| undef %1231.sub0_sub1_sub2_sub3:av_192_align2 = DS_READ2_B64_gfx9 %1230, 0, 16, 0, implicit $exec |
| undef %1232.sub2_sub3_sub4_sub5:av_192_align2 = DS_READ2_B64_gfx9 %172, 0, 16, 0, implicit $exec |
| %1233:vgpr_32 = V_ADD_U32_e32 4096, %172, implicit $exec |
| undef %1234.sub2_sub3_sub4_sub5:av_192_align2 = DS_READ2_B64_gfx9 %1233, 0, 16, 0, implicit $exec |
| %1235:vgpr_32 = V_ADD_U32_e32 8192, %172, implicit $exec |
| undef %1236.sub2_sub3_sub4_sub5:av_192_align2 = DS_READ2_B64_gfx9 %1235, 0, 16, 0, implicit $exec |
| %1237:vgpr_32 = V_ADD_U32_e32 12288, %172, implicit $exec |
| undef %1238.sub2_sub3_sub4_sub5:av_192_align2 = DS_READ2_B64_gfx9 %1237, 0, 16, 0, implicit $exec |
| %1239:vgpr_32 = V_ADD_U32_e32 16384, %172, implicit $exec |
| undef %1240.sub2_sub3_sub4_sub5:av_192_align2 = DS_READ2_B64_gfx9 %1239, 0, 16, 0, implicit $exec |
| %1241:vgpr_32 = V_ADD_U32_e32 20480, %172, implicit $exec |
| undef %1242.sub2_sub3_sub4_sub5:av_192_align2 = DS_READ2_B64_gfx9 %1241, 0, 16, 0, implicit $exec |
| %1243:vgpr_32 = V_ADD_U32_e32 24576, %172, implicit $exec |
| undef %1244.sub2_sub3_sub4_sub5:av_192_align2 = DS_READ2_B64_gfx9 %1243, 0, 16, 0, implicit $exec |
| %1245:vgpr_32 = V_ADD_U32_e32 28672, %172, implicit $exec |
| undef %1246.sub2_sub3_sub4_sub5:av_192_align2 = DS_READ2_B64_gfx9 %1245, 0, 16, 0, implicit $exec |
| %1202.sub0:av_192_align2 = COPY %1187.sub0 |
| %1202.sub1:av_192_align2 = COPY %1187.sub1 |
| %1232.sub0:av_192_align2 = COPY %1217.sub0 |
| %1232.sub1:av_192_align2 = COPY %1217.sub1 |
| %1187.sub4:av_192_align2 = COPY %1202.sub4 |
| %1187.sub5:av_192_align2 = COPY %1202.sub5 |
| %1217.sub4:av_192_align2 = COPY %1232.sub4 |
| %1197.sub4:av_192_align2 = COPY %1212.sub4 |
| %1197.sub5:av_192_align2 = COPY %1212.sub5 |
| %1227.sub4:av_192_align2 = COPY %1242.sub4 |
| %1227.sub5:av_192_align2 = COPY %1242.sub5 |
| %1214.sub0:av_192_align2 = COPY %1199.sub0 |
| %1214.sub1:av_192_align2 = COPY %1199.sub1 |
| %1244.sub0:av_192_align2 = COPY %1229.sub0 |
| %1244.sub1:av_192_align2 = COPY %1229.sub1 |
| %1199.sub4:av_192_align2 = COPY %1214.sub4 |
| %1199.sub5:av_192_align2 = COPY %1214.sub5 |
| %1229.sub4:av_192_align2 = COPY %1244.sub4 |
| %1229.sub5:av_192_align2 = COPY %1244.sub5 |
| %1216.sub0:av_192_align2 = COPY %1201.sub0 |
| %1216.sub1:av_192_align2 = COPY %1201.sub1 |
| %1246.sub0:av_192_align2 = COPY %1231.sub0 |
| %1246.sub1:av_192_align2 = COPY %1231.sub1 |
| %1201.sub4:av_192_align2 = COPY %1216.sub4 |
| %1201.sub5:av_192_align2 = COPY %1216.sub5 |
| %1231.sub4:av_192_align2 = COPY %1246.sub4 |
| %1231.sub5:av_192_align2 = COPY %1246.sub5 |
| undef %1247.sub2_sub3:vreg_128_align2 = nofpexcept V_PK_MUL_F32 8, %175.sub2_sub3, 0, %1180.sub0_sub1, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1247.sub0_sub1:vreg_128_align2 = nofpexcept V_PK_MUL_F32 8, %175.sub0_sub1, 0, %1180.sub0_sub1, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1248:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1168, %1202.sub0_sub1_sub2_sub3, %1247, 0, 0, 0, implicit $mode, implicit $exec |
| %1249:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1169, %1232.sub0_sub1_sub2_sub3, %1248, 0, 0, 0, implicit $mode, implicit $exec |
| %1250:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1170, %1187.sub2_sub3_sub4_sub5, %1249, 0, 0, 0, implicit $mode, implicit $exec |
| %175:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1171, %1217.sub2_sub3_sub4_sub5, %1250, 0, 0, 0, implicit $mode, implicit $exec |
| undef %1251.sub2_sub3:vreg_128_align2 = nofpexcept V_PK_MUL_F32 8, %176.sub2_sub3, 12, %1180.sub0_sub1, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1251.sub0_sub1:vreg_128_align2 = nofpexcept V_PK_MUL_F32 8, %176.sub0_sub1, 12, %1180.sub0_sub1, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1252:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1168, %1204.sub0_sub1_sub2_sub3, %1251, 0, 0, 0, implicit $mode, implicit $exec |
| %1253:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1169, %1234.sub0_sub1_sub2_sub3, %1252, 0, 0, 0, implicit $mode, implicit $exec |
| %1254:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1170, %1189.sub2_sub3_sub4_sub5, %1253, 0, 0, 0, implicit $mode, implicit $exec |
| %176:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1171, %1219.sub2_sub3_sub4_sub5, %1254, 0, 0, 0, implicit $mode, implicit $exec |
| undef %1255.sub2_sub3:vreg_128_align2 = nofpexcept V_PK_MUL_F32 8, %177.sub2_sub3, 0, %1180.sub2_sub3, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1255.sub0_sub1:vreg_128_align2 = nofpexcept V_PK_MUL_F32 8, %177.sub0_sub1, 0, %1180.sub2_sub3, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1256:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1168, %1206.sub0_sub1_sub2_sub3, %1255, 0, 0, 0, implicit $mode, implicit $exec |
| %1257:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1169, %1236.sub0_sub1_sub2_sub3, %1256, 0, 0, 0, implicit $mode, implicit $exec |
| %1258:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1170, %1191.sub2_sub3_sub4_sub5, %1257, 0, 0, 0, implicit $mode, implicit $exec |
| %177:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1171, %1221.sub2_sub3_sub4_sub5, %1258, 0, 0, 0, implicit $mode, implicit $exec |
| undef %1259.sub0:vreg_64_align2 = COPY %1180.sub3 |
| undef %1260.sub2_sub3:vreg_128_align2 = nofpexcept V_PK_MUL_F32 8, %178.sub2_sub3, 0, %1259, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1260.sub0_sub1:vreg_128_align2 = nofpexcept V_PK_MUL_F32 8, %178.sub0_sub1, 0, %1259, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1261:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1168, %1208.sub0_sub1_sub2_sub3, %1260, 0, 0, 0, implicit $mode, implicit $exec |
| %1262:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1169, %1238.sub0_sub1_sub2_sub3, %1261, 0, 0, 0, implicit $mode, implicit $exec |
| %1263:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1170, %1193.sub2_sub3_sub4_sub5, %1262, 0, 0, 0, implicit $mode, implicit $exec |
| %178:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1171, %1223.sub2_sub3_sub4_sub5, %1263, 0, 0, 0, implicit $mode, implicit $exec |
| undef %1264.sub2_sub3:vreg_128_align2 = nofpexcept V_PK_MUL_F32 8, %179.sub2_sub3, 0, %1184.sub0_sub1, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1264.sub0_sub1:vreg_128_align2 = nofpexcept V_PK_MUL_F32 8, %179.sub0_sub1, 0, %1184.sub0_sub1, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1265:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1168, %1210.sub0_sub1_sub2_sub3, %1264, 0, 0, 0, implicit $mode, implicit $exec |
| %1266:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1169, %1240.sub0_sub1_sub2_sub3, %1265, 0, 0, 0, implicit $mode, implicit $exec |
| %1267:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1170, %1195.sub2_sub3_sub4_sub5, %1266, 0, 0, 0, implicit $mode, implicit $exec |
| %179:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1171, %1225.sub2_sub3_sub4_sub5, %1267, 0, 0, 0, implicit $mode, implicit $exec |
| undef %1268.sub2_sub3:vreg_128_align2 = nofpexcept V_PK_MUL_F32 8, %180.sub2_sub3, 12, %1184.sub0_sub1, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1268.sub0_sub1:vreg_128_align2 = nofpexcept V_PK_MUL_F32 8, %180.sub0_sub1, 12, %1184.sub0_sub1, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1269:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1168, %1212.sub0_sub1_sub2_sub3, %1268, 0, 0, 0, implicit $mode, implicit $exec |
| %1270:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1169, %1242.sub0_sub1_sub2_sub3, %1269, 0, 0, 0, implicit $mode, implicit $exec |
| %1271:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1170, %1197.sub2_sub3_sub4_sub5, %1270, 0, 0, 0, implicit $mode, implicit $exec |
| %180:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1171, %1227.sub2_sub3_sub4_sub5, %1271, 0, 0, 0, implicit $mode, implicit $exec |
| undef %1272.sub2_sub3:vreg_128_align2 = nofpexcept V_PK_MUL_F32 8, %181.sub2_sub3, 0, %1184.sub2_sub3, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1272.sub0_sub1:vreg_128_align2 = nofpexcept V_PK_MUL_F32 8, %181.sub0_sub1, 0, %1184.sub2_sub3, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1273:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1168, %1214.sub0_sub1_sub2_sub3, %1272, 0, 0, 0, implicit $mode, implicit $exec |
| %1274:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1169, %1244.sub0_sub1_sub2_sub3, %1273, 0, 0, 0, implicit $mode, implicit $exec |
| %1275:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1170, %1199.sub2_sub3_sub4_sub5, %1274, 0, 0, 0, implicit $mode, implicit $exec |
| %181:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1171, %1229.sub2_sub3_sub4_sub5, %1275, 0, 0, 0, implicit $mode, implicit $exec |
| undef %1276.sub0:vreg_64_align2 = COPY %1184.sub3 |
| undef %1277.sub2_sub3:vreg_128_align2 = nofpexcept V_PK_MUL_F32 8, %182.sub2_sub3, 0, %1276, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1277.sub0_sub1:vreg_128_align2 = nofpexcept V_PK_MUL_F32 8, %182.sub0_sub1, 0, %1276, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1278:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1168, %1216.sub0_sub1_sub2_sub3, %1277, 0, 0, 0, implicit $mode, implicit $exec |
| %1279:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1169, %1246.sub0_sub1_sub2_sub3, %1278, 0, 0, 0, implicit $mode, implicit $exec |
| %1280:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1170, %1201.sub2_sub3_sub4_sub5, %1279, 0, 0, 0, implicit $mode, implicit $exec |
| %182:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1171, %1231.sub2_sub3_sub4_sub5, %1280, 0, 0, 0, implicit $mode, implicit $exec |
| S_WAITCNT 49279 |
| WAVE_BARRIER |
| %34:sreg_32 = nuw nsw S_ADD_I32 %34, 1, implicit-def dead $scc |
| S_CMP_LG_U32 %34, 30, implicit-def $scc |
| S_CBRANCH_SCC1 %bb.1, implicit killed $scc |
| S_BRANCH %bb.2 |
| |
| bb.2: |
| %1281:sreg_64_xexec = V_CMP_GT_U32_e64 7, %23, implicit $exec |
| undef %1282.sub0:sgpr_128 = S_MOV_B32 0 |
| %1283:sreg_64_xexec = V_CMP_EQ_U32_e64 0, %24, implicit $exec |
| %1284:vgpr_32 = exact V_LSHRREV_B32_e32 2, %26, implicit $exec |
| %1285:vgpr_32 = nuw nsw V_LSHLREV_B32_e32 10, %25, implicit $exec |
| %1286:vgpr_32 = nuw nsw V_LSHLREV_B32_e32 7, %22, implicit $exec |
| %1287:vgpr_32 = V_AND_B32_e32 2048, %1286, implicit $exec |
| %1288:vgpr_32 = disjoint V_OR3_B32_e64 %1285, %1287, %148, implicit $exec |
| %1289:vgpr_32 = V_AND_B32_e32 65535, %104, implicit $exec |
| undef %1290.sub0:vreg_128_align2 = V_LSHL_OR_B32_e64 %104, 16, %1289, implicit $exec |
| %1290.sub2:vreg_128_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %1290.sub1:vreg_128_align2 = COPY %1290.sub0 |
| %1290.sub3:vreg_128_align2 = COPY %1290.sub2 |
| DS_WRITE_B128_gfx9 %1288, %1290, 0, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1290, 256, 0, implicit $exec |
| %1290.sub1:vreg_128_align2 = V_AND_B32_e32 65535, %104, implicit $exec |
| %1290.sub3:vreg_128_align2 = COPY %1290.sub2 |
| DS_WRITE_B128_gfx9 %1288, %1290, 128, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1290, 384, 0, implicit $exec |
| WAVE_BARRIER |
| %1291:vgpr_32 = nuw nsw V_LSHLREV_B32_e32 9, %22, implicit $exec |
| %1292:vgpr_32 = V_AND_B32_e32 2048, %1291, implicit $exec |
| %1293:vgpr_32 = disjoint V_OR3_B32_e64 %1292, %136, %137, implicit $exec |
| %1294:vgpr_32 = disjoint V_OR_B32_e32 %1293, %134, implicit $exec |
| %1295:vreg_128_align2 = DS_READ_B128_gfx9 %1294, 0, 0, implicit $exec |
| %1296:vgpr_32 = V_LSHRREV_B32_e32 16, %1295.sub0, implicit $exec |
| %1297:vgpr_32 = V_LSHRREV_B32_e32 16, %1295.sub1, implicit $exec |
| %1298:vreg_128_align2 = DS_READ_B128_gfx9 %1294, 1024, 0, implicit $exec |
| %1299:vgpr_32 = V_LSHRREV_B32_e32 16, %1298.sub0, implicit $exec |
| %1300:vgpr_32 = V_LSHRREV_B32_e32 16, %1298.sub1, implicit $exec |
| %1301:sreg_32 = S_MOV_B32 576 |
| %1302:vgpr_32 = V_BITOP3_B32_e64 %1293, %1301, %134, 54, implicit $exec |
| %1303:vreg_128_align2 = DS_READ_B128_gfx9 %1302, 0, 0, implicit $exec |
| %1304:vgpr_32 = V_LSHRREV_B32_e32 16, %1303.sub0, implicit $exec |
| %1305:vgpr_32 = V_LSHRREV_B32_e32 16, %1303.sub1, implicit $exec |
| %1306:vreg_128_align2 = DS_READ_B128_gfx9 %1302, 1024, 0, implicit $exec |
| %1307:vgpr_32 = V_LSHRREV_B32_e32 16, %1306.sub0, implicit $exec |
| %1308:vgpr_32 = V_LSHRREV_B32_e32 16, %1306.sub1, implicit $exec |
| WAVE_BARRIER |
| %1282.sub1:sgpr_128 = COPY %1282.sub0 |
| %1282.sub2:sgpr_128 = COPY %1282.sub0 |
| %1282.sub3:sgpr_128 = COPY %1282.sub0 |
| %1309:av_128_align2 = COPY %1282 |
| DS_WRITE_B128_gfx9 %1288, %1309, 0, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1309, 256, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1309, 128, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1309, 384, 0, implicit $exec |
| WAVE_BARRIER |
| WAVE_BARRIER |
| DS_WRITE_B128_gfx9 %1288, %1309, 0, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1309, 256, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1309, 128, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1309, 384, 0, implicit $exec |
| WAVE_BARRIER |
| WAVE_BARRIER |
| DS_WRITE_B128_gfx9 %1288, %1309, 0, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1309, 256, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1309, 128, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1309, 384, 0, implicit $exec |
| WAVE_BARRIER |
| WAVE_BARRIER |
| DS_WRITE_B128_gfx9 %1288, %1309, 0, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1309, 256, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1309, 128, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1309, 384, 0, implicit $exec |
| WAVE_BARRIER |
| WAVE_BARRIER |
| DS_WRITE_B128_gfx9 %1288, %1309, 0, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1309, 256, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1309, 128, 0, implicit $exec |
| %304.sub1:vreg_64_align2, dead %272.sub1:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %304.sub1, %272.sub1, implicit $exec |
| %303.sub0:vreg_64_align2, %271.sub0:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %303.sub0, %271.sub0, implicit $exec |
| %303.sub1:vreg_64_align2, dead %271.sub1:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %303.sub1, %271.sub1, implicit $exec |
| %302.sub0:vreg_64_align2, %270.sub0:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %302.sub0, %270.sub0, implicit $exec |
| %302.sub1:vreg_64_align2, dead %270.sub1:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %302.sub1, %270.sub1, implicit $exec |
| %301.sub0:vreg_64_align2, %269.sub0:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %301.sub0, %269.sub0, implicit $exec |
| %301.sub1:vreg_64_align2, dead %269.sub1:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %301.sub1, %269.sub1, implicit $exec |
| %300.sub0:vreg_64_align2, %268.sub0:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %300.sub0, %268.sub0, implicit $exec |
| %300.sub1:vreg_64_align2, dead %268.sub1:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %300.sub1, %268.sub1, implicit $exec |
| %299.sub0:vreg_64_align2, %267.sub0:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %299.sub0, %267.sub0, implicit $exec |
| %299.sub1:vreg_64_align2, dead %267.sub1:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %299.sub1, %267.sub1, implicit $exec |
| %298.sub0:vreg_64_align2, %266.sub0:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %298.sub0, %266.sub0, implicit $exec |
| %298.sub1:vreg_64_align2, dead %266.sub1:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %298.sub1, %266.sub1, implicit $exec |
| %297.sub0:vreg_64_align2, %265.sub0:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %297.sub0, %265.sub0, implicit $exec |
| %297.sub1:vreg_64_align2, dead %265.sub1:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %297.sub1, %265.sub1, implicit $exec |
| %296.sub0:vreg_64_align2, %264.sub0:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %296.sub0, %264.sub0, implicit $exec |
| %296.sub1:vreg_64_align2, dead %264.sub1:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %296.sub1, %264.sub1, implicit $exec |
| %295.sub0:vreg_64_align2, %263.sub0:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %295.sub0, %263.sub0, implicit $exec |
| %295.sub1:vreg_64_align2, dead %263.sub1:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %295.sub1, %263.sub1, implicit $exec |
| %294.sub0:vreg_64_align2, %262.sub0:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %294.sub0, %262.sub0, implicit $exec |
| %294.sub1:vreg_64_align2, dead %262.sub1:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %294.sub1, %262.sub1, implicit $exec |
| %293.sub0:vreg_64_align2, %261.sub0:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %293.sub0, %261.sub0, implicit $exec |
| %293.sub1:vreg_64_align2, dead %261.sub1:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %293.sub1, %261.sub1, implicit $exec |
| %292.sub0:vreg_64_align2, %260.sub0:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %292.sub0, %260.sub0, implicit $exec |
| %292.sub1:vreg_64_align2, dead %260.sub1:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %292.sub1, %260.sub1, implicit $exec |
| %291.sub0:vreg_64_align2, %259.sub0:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %291.sub0, %259.sub0, implicit $exec |
| %291.sub1:vreg_64_align2, dead %259.sub1:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %291.sub1, %259.sub1, implicit $exec |
| %290.sub0:vreg_64_align2, %258.sub0:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %290.sub0, %258.sub0, implicit $exec |
| %290.sub1:vreg_64_align2, dead %258.sub1:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %290.sub1, %258.sub1, implicit $exec |
| %1310:vgpr_32 = COPY %289.sub0 |
| %1310:vgpr_32, %257.sub0:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %1310, %257.sub0, implicit $exec |
| %289.sub1:vreg_64_align2, dead %257.sub1:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %289.sub1, %257.sub1, implicit $exec |
| %288.sub0:vreg_64_align2, %256.sub0:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %288.sub0, %256.sub0, implicit $exec |
| %288.sub1:vreg_64_align2, dead %256.sub1:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %288.sub1, %256.sub1, implicit $exec |
| %287.sub0:vreg_64_align2, %255.sub0:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %287.sub0, %255.sub0, implicit $exec |
| %287.sub1:vreg_64_align2, dead %255.sub1:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %287.sub1, %255.sub1, implicit $exec |
| %286.sub0:vreg_64_align2, %254.sub0:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %286.sub0, %254.sub0, implicit $exec |
| %286.sub1:vreg_64_align2, dead %254.sub1:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %286.sub1, %254.sub1, implicit $exec |
| %285.sub0:vreg_64_align2, %253.sub0:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %285.sub0, %253.sub0, implicit $exec |
| %285.sub1:vreg_64_align2, dead %253.sub1:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %285.sub1, %253.sub1, implicit $exec |
| %284.sub0:vreg_64_align2, %173.sub0:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %284.sub0, %173.sub0, implicit $exec |
| %284.sub1:vreg_64_align2, dead %173.sub1:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %284.sub1, %173.sub1, implicit $exec |
| undef %1311.sub0:vreg_64_align2 = COPY %310.sub0 |
| %1311.sub1:vreg_64_align2 = COPY %306.sub0 |
| %306.sub0:vreg_64_align2 = COPY %310.sub1 |
| undef %1312.sub0:vreg_64_align2 = COPY %309.sub0 |
| %1312.sub1:vreg_64_align2 = COPY %305.sub0 |
| %305.sub0:vreg_64_align2 = COPY %309.sub1 |
| %289.sub0:vreg_64_align2 = COPY %293.sub1 |
| undef %1313.sub0:vreg_64_align2 = COPY %292.sub0 |
| %1313.sub1:vreg_64_align2 = COPY %288.sub0 |
| %288.sub0:vreg_64_align2 = COPY %292.sub1 |
| %251.sub0:vreg_64_align2, dead %247.sub0:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %251.sub0, %247.sub0, implicit $exec |
| %252.sub0:vreg_64_align2, dead %248.sub0:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %252.sub0, %248.sub0, implicit $exec |
| %249.sub0:vreg_64_align2, %246.sub0:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %249.sub0, %246.sub0, implicit $exec |
| %250.sub0:vreg_64_align2, dead %246.sub1:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %250.sub0, %246.sub1, implicit $exec |
| %245.sub0:vreg_64_align2, %243.sub0:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %245.sub0, %243.sub0, implicit $exec |
| %245.sub1:vreg_64_align2, dead %243.sub1:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %245.sub1, %243.sub1, implicit $exec |
| %244.sub0:vreg_64_align2, %242.sub0:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %244.sub0, %242.sub0, implicit $exec |
| %244.sub1:vreg_64_align2, dead %242.sub1:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %244.sub1, %242.sub1, implicit $exec |
| %241.sub0:vreg_64_align2, %239.sub0:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %241.sub0, %239.sub0, implicit $exec |
| %241.sub1:vreg_64_align2, dead %239.sub1:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %241.sub1, %239.sub1, implicit $exec |
| %240.sub0:vreg_64_align2, %238.sub0:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %240.sub0, %238.sub0, implicit $exec |
| %240.sub1:vreg_64_align2, dead %238.sub1:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %240.sub1, %238.sub1, implicit $exec |
| %237.sub0:vreg_64_align2, %235.sub0:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %237.sub0, %235.sub0, implicit $exec |
| %237.sub1:vreg_64_align2, dead %235.sub1:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %237.sub1, %235.sub1, implicit $exec |
| %236.sub0:vreg_64_align2, %234.sub0:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %236.sub0, %234.sub0, implicit $exec |
| %236.sub1:vreg_64_align2, dead %234.sub1:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %236.sub1, %234.sub1, implicit $exec |
| %233.sub0:vreg_64_align2, %231.sub0:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %233.sub0, %231.sub0, implicit $exec |
| %233.sub1:vreg_64_align2, dead %231.sub1:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %233.sub1, %231.sub1, implicit $exec |
| %232.sub0:vreg_64_align2, %230.sub0:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %232.sub0, %230.sub0, implicit $exec |
| %232.sub1:vreg_64_align2, dead %230.sub1:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %232.sub1, %230.sub1, implicit $exec |
| %229.sub0:vreg_64_align2, %227.sub0:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %229.sub0, %227.sub0, implicit $exec |
| %229.sub1:vreg_64_align2, dead %227.sub1:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %229.sub1, %227.sub1, implicit $exec |
| %192.sub1:vreg_64_align2, dead %190.sub1:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %192.sub1, %190.sub1, implicit $exec |
| %189.sub0:vreg_64_align2, %187.sub0:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %189.sub0, %187.sub0, implicit $exec |
| %189.sub1:vreg_64_align2, dead %187.sub1:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %189.sub1, %187.sub1, implicit $exec |
| %188.sub0:vreg_64_align2, %174.sub0:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %188.sub0, %174.sub0, implicit $exec |
| %188.sub1:vreg_64_align2, dead %174.sub1:vreg_64_align2 = V_PERMLANE32_SWAP_B32_e32 %188.sub1, %174.sub1, implicit $exec |
| S_WAITCNT 49279 |
| WAVE_BARRIER |
| %1314:vgpr_32 = V_AND_B32_e32 65535, %185, implicit $exec |
| %1290.sub0:vreg_128_align2 = V_LSHL_OR_B32_e64 %185, 16, %1314, implicit $exec |
| %1290.sub1:vreg_128_align2 = COPY %1290.sub0 |
| %1290.sub3:vreg_128_align2 = COPY %1290.sub2 |
| DS_WRITE_B128_gfx9 %1288, %1290, 0, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1290, 256, 0, implicit $exec |
| %1290.sub1:vreg_128_align2 = V_AND_B32_e32 65535, %185, implicit $exec |
| %1290.sub3:vreg_128_align2 = COPY %1290.sub2 |
| DS_WRITE_B128_gfx9 %1288, %1290, 128, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1290, 384, 0, implicit $exec |
| WAVE_BARRIER |
| %1315:vreg_128_align2 = DS_READ_B128_gfx9 %1294, 0, 0, implicit $exec |
| %1316:vgpr_32 = V_LSHRREV_B32_e32 16, %1315.sub0, implicit $exec |
| %1317:vgpr_32 = V_LSHRREV_B32_e32 16, %1315.sub1, implicit $exec |
| %1318:vreg_128_align2 = DS_READ_B128_gfx9 %1294, 1024, 0, implicit $exec |
| %1319:vgpr_32 = V_LSHRREV_B32_e32 16, %1318.sub0, implicit $exec |
| %1320:vgpr_32 = V_LSHRREV_B32_e32 16, %1318.sub1, implicit $exec |
| %1321:vreg_128_align2 = DS_READ_B128_gfx9 %1302, 0, 0, implicit $exec |
| %1322:vgpr_32 = V_LSHRREV_B32_e32 16, %1321.sub0, implicit $exec |
| %1323:vgpr_32 = V_LSHRREV_B32_e32 16, %1321.sub1, implicit $exec |
| %1324:vreg_128_align2 = DS_READ_B128_gfx9 %1302, 1024, 0, implicit $exec |
| %1325:vgpr_32 = V_LSHRREV_B32_e32 16, %1324.sub0, implicit $exec |
| %1326:vgpr_32 = V_LSHRREV_B32_e32 16, %1324.sub1, implicit $exec |
| WAVE_BARRIER |
| DS_WRITE_B128_gfx9 %1288, %1309, 0, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1309, 256, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1309, 128, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1309, 384, 0, implicit $exec |
| WAVE_BARRIER |
| WAVE_BARRIER |
| DS_WRITE_B128_gfx9 %1288, %1309, 0, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1309, 256, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1309, 128, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1309, 384, 0, implicit $exec |
| WAVE_BARRIER |
| WAVE_BARRIER |
| DS_WRITE_B128_gfx9 %1288, %1309, 0, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1309, 256, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1309, 128, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1309, 384, 0, implicit $exec |
| WAVE_BARRIER |
| WAVE_BARRIER |
| DS_WRITE_B128_gfx9 %1288, %1309, 0, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1309, 256, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1309, 128, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1309, 384, 0, implicit $exec |
| WAVE_BARRIER |
| WAVE_BARRIER |
| DS_WRITE_B128_gfx9 %1288, %1309, 0, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1309, 256, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1309, 128, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1309, 384, 0, implicit $exec |
| WAVE_BARRIER |
| WAVE_BARRIER |
| DS_WRITE_B128_gfx9 %1288, %1309, 0, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1309, 256, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1309, 128, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1309, 384, 0, implicit $exec |
| WAVE_BARRIER |
| WAVE_BARRIER |
| DS_WRITE_B128_gfx9 %1288, %1309, 0, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1309, 256, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1309, 128, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1309, 384, 0, implicit $exec |
| WAVE_BARRIER |
| %1327:vgpr_32 = V_AND_B32_e32 31, %22, implicit $exec |
| %1328:vgpr_32 = nuw nsw V_LSHLREV_B32_e32 6, %1327, implicit $exec |
| %1329:vgpr_32 = nuw V_ADD_U32_e32 %12, %1328, implicit $exec |
| %1330:vreg_128_align2 = DS_READ_B128_gfx9 %1329, 0, 0, implicit $exec |
| %1331:vgpr_32 = disjoint V_OR_B32_e32 16, %1328, implicit $exec |
| %1332:vgpr_32 = nuw V_ADD_U32_e32 %12, %1331, implicit $exec |
| %1333:vreg_128_align2 = DS_READ_B128_gfx9 %1332, 0, 0, implicit $exec |
| %1334:vgpr_32 = disjoint V_OR_B32_e32 32, %1328, implicit $exec |
| %1335:vgpr_32 = nuw V_ADD_U32_e32 %12, %1334, implicit $exec |
| %1336:vreg_128_align2 = DS_READ_B128_gfx9 %1335, 0, 0, implicit $exec |
| %1337:vgpr_32 = disjoint V_OR_B32_e32 48, %1328, implicit $exec |
| %1338:vgpr_32 = nuw V_ADD_U32_e32 %12, %1337, implicit $exec |
| %1339:vreg_128_align2 = DS_READ_B128_gfx9 %1338, 0, 0, implicit $exec |
| %1340:vgpr_32 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %1340:vgpr_32 = V_DOT4C_I32_I8_e32 %38.sub0, %1330.sub0, %1340, implicit $exec |
| %1340:vgpr_32 = V_DOT4C_I32_I8_e32 %38.sub1, %1330.sub1, %1340, implicit $exec |
| %1340:vgpr_32 = V_DOT4C_I32_I8_e32 %38.sub2, %1330.sub2, %1340, implicit $exec |
| %1340:vgpr_32 = V_DOT4C_I32_I8_e32 %38.sub3, %1330.sub3, %1340, implicit $exec |
| %1341:vgpr_32 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %1341:vgpr_32 = V_DOT4C_I32_I8_e32 %38.sub0, %1333.sub0, %1341, implicit $exec |
| %1341:vgpr_32 = V_DOT4C_I32_I8_e32 %38.sub1, %1333.sub1, %1341, implicit $exec |
| %1341:vgpr_32 = V_DOT4C_I32_I8_e32 %38.sub2, %1333.sub2, %1341, implicit $exec |
| %1341:vgpr_32 = V_DOT4C_I32_I8_e32 %38.sub3, %1333.sub3, %1341, implicit $exec |
| %1342:vgpr_32 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %1342:vgpr_32 = V_DOT4C_I32_I8_e32 %38.sub0, %1336.sub0, %1342, implicit $exec |
| %1342:vgpr_32 = V_DOT4C_I32_I8_e32 %38.sub1, %1336.sub1, %1342, implicit $exec |
| %1342:vgpr_32 = V_DOT4C_I32_I8_e32 %38.sub2, %1336.sub2, %1342, implicit $exec |
| %1342:vgpr_32 = V_DOT4C_I32_I8_e32 %38.sub3, %1336.sub3, %1342, implicit $exec |
| %1343:vgpr_32 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %1343:vgpr_32 = V_DOT4C_I32_I8_e32 %38.sub0, %1339.sub0, %1343, implicit $exec |
| %1343:vgpr_32 = V_DOT4C_I32_I8_e32 %38.sub1, %1339.sub1, %1343, implicit $exec |
| %1343:vgpr_32 = V_DOT4C_I32_I8_e32 %38.sub2, %1339.sub2, %1343, implicit $exec |
| %1343:vgpr_32 = V_DOT4C_I32_I8_e32 %38.sub3, %1339.sub3, %1343, implicit $exec |
| %1344:vgpr_32 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %1344:vgpr_32 = V_DOT4C_I32_I8_e32 %39.sub0, %1330.sub0, %1344, implicit $exec |
| %1344:vgpr_32 = V_DOT4C_I32_I8_e32 %39.sub1, %1330.sub1, %1344, implicit $exec |
| %1344:vgpr_32 = V_DOT4C_I32_I8_e32 %39.sub2, %1330.sub2, %1344, implicit $exec |
| %1344:vgpr_32 = V_DOT4C_I32_I8_e32 %39.sub3, %1330.sub3, %1344, implicit $exec |
| %1345:vgpr_32 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %1345:vgpr_32 = V_DOT4C_I32_I8_e32 %39.sub0, %1333.sub0, %1345, implicit $exec |
| %1345:vgpr_32 = V_DOT4C_I32_I8_e32 %39.sub1, %1333.sub1, %1345, implicit $exec |
| %1345:vgpr_32 = V_DOT4C_I32_I8_e32 %39.sub2, %1333.sub2, %1345, implicit $exec |
| %1345:vgpr_32 = V_DOT4C_I32_I8_e32 %39.sub3, %1333.sub3, %1345, implicit $exec |
| %1346:vgpr_32 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %1346:vgpr_32 = V_DOT4C_I32_I8_e32 %39.sub0, %1336.sub0, %1346, implicit $exec |
| %1346:vgpr_32 = V_DOT4C_I32_I8_e32 %39.sub1, %1336.sub1, %1346, implicit $exec |
| %1346:vgpr_32 = V_DOT4C_I32_I8_e32 %39.sub2, %1336.sub2, %1346, implicit $exec |
| %1346:vgpr_32 = V_DOT4C_I32_I8_e32 %39.sub3, %1336.sub3, %1346, implicit $exec |
| %1347:vgpr_32 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %1347:vgpr_32 = V_DOT4C_I32_I8_e32 %39.sub0, %1339.sub0, %1347, implicit $exec |
| %1347:vgpr_32 = V_DOT4C_I32_I8_e32 %39.sub1, %1339.sub1, %1347, implicit $exec |
| %1347:vgpr_32 = V_DOT4C_I32_I8_e32 %39.sub2, %1339.sub2, %1347, implicit $exec |
| %1347:vgpr_32 = V_DOT4C_I32_I8_e32 %39.sub3, %1339.sub3, %1347, implicit $exec |
| %1348:vgpr_32 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %1348:vgpr_32 = V_DOT4C_I32_I8_e32 %40.sub0, %1330.sub0, %1348, implicit $exec |
| %1348:vgpr_32 = V_DOT4C_I32_I8_e32 %40.sub1, %1330.sub1, %1348, implicit $exec |
| %1348:vgpr_32 = V_DOT4C_I32_I8_e32 %40.sub2, %1330.sub2, %1348, implicit $exec |
| %1348:vgpr_32 = V_DOT4C_I32_I8_e32 %40.sub3, %1330.sub3, %1348, implicit $exec |
| %1349:vgpr_32 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %1349:vgpr_32 = V_DOT4C_I32_I8_e32 %40.sub0, %1333.sub0, %1349, implicit $exec |
| %1349:vgpr_32 = V_DOT4C_I32_I8_e32 %40.sub1, %1333.sub1, %1349, implicit $exec |
| %1349:vgpr_32 = V_DOT4C_I32_I8_e32 %40.sub2, %1333.sub2, %1349, implicit $exec |
| %1349:vgpr_32 = V_DOT4C_I32_I8_e32 %40.sub3, %1333.sub3, %1349, implicit $exec |
| %1350:vgpr_32 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %1350:vgpr_32 = V_DOT4C_I32_I8_e32 %40.sub0, %1336.sub0, %1350, implicit $exec |
| %1350:vgpr_32 = V_DOT4C_I32_I8_e32 %40.sub1, %1336.sub1, %1350, implicit $exec |
| %1350:vgpr_32 = V_DOT4C_I32_I8_e32 %40.sub2, %1336.sub2, %1350, implicit $exec |
| %1350:vgpr_32 = V_DOT4C_I32_I8_e32 %40.sub3, %1336.sub3, %1350, implicit $exec |
| %1351:vgpr_32 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %1351:vgpr_32 = V_DOT4C_I32_I8_e32 %40.sub0, %1339.sub0, %1351, implicit $exec |
| %1351:vgpr_32 = V_DOT4C_I32_I8_e32 %40.sub1, %1339.sub1, %1351, implicit $exec |
| %1351:vgpr_32 = V_DOT4C_I32_I8_e32 %40.sub2, %1339.sub2, %1351, implicit $exec |
| %1351:vgpr_32 = V_DOT4C_I32_I8_e32 %40.sub3, %1339.sub3, %1351, implicit $exec |
| %1352:vgpr_32 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %1352:vgpr_32 = V_DOT4C_I32_I8_e32 %41.sub0, %1330.sub0, %1352, implicit $exec |
| %1352:vgpr_32 = V_DOT4C_I32_I8_e32 %41.sub1, %1330.sub1, %1352, implicit $exec |
| %1352:vgpr_32 = V_DOT4C_I32_I8_e32 %41.sub2, %1330.sub2, %1352, implicit $exec |
| %1352:vgpr_32 = V_DOT4C_I32_I8_e32 %41.sub3, %1330.sub3, %1352, implicit $exec |
| %1353:vgpr_32 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %1353:vgpr_32 = V_DOT4C_I32_I8_e32 %41.sub0, %1333.sub0, %1353, implicit $exec |
| %1353:vgpr_32 = V_DOT4C_I32_I8_e32 %41.sub1, %1333.sub1, %1353, implicit $exec |
| %1353:vgpr_32 = V_DOT4C_I32_I8_e32 %41.sub2, %1333.sub2, %1353, implicit $exec |
| %1353:vgpr_32 = V_DOT4C_I32_I8_e32 %41.sub3, %1333.sub3, %1353, implicit $exec |
| %1354:vgpr_32 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %1354:vgpr_32 = V_DOT4C_I32_I8_e32 %41.sub0, %1336.sub0, %1354, implicit $exec |
| %1354:vgpr_32 = V_DOT4C_I32_I8_e32 %41.sub1, %1336.sub1, %1354, implicit $exec |
| %1354:vgpr_32 = V_DOT4C_I32_I8_e32 %41.sub2, %1336.sub2, %1354, implicit $exec |
| %1354:vgpr_32 = V_DOT4C_I32_I8_e32 %41.sub3, %1336.sub3, %1354, implicit $exec |
| %1355:vgpr_32 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %1355:vgpr_32 = V_DOT4C_I32_I8_e32 %41.sub0, %1339.sub0, %1355, implicit $exec |
| %1355:vgpr_32 = V_DOT4C_I32_I8_e32 %41.sub1, %1339.sub1, %1355, implicit $exec |
| %1355:vgpr_32 = V_DOT4C_I32_I8_e32 %41.sub2, %1339.sub2, %1355, implicit $exec |
| %1355:vgpr_32 = V_DOT4C_I32_I8_e32 %41.sub3, %1339.sub3, %1355, implicit $exec |
| S_WAITCNT 49279 |
| WAVE_BARRIER |
| %1356:sreg_32 = S_LSHL_B32 %186, 8, implicit-def dead $scc |
| %1357:sreg_32 = S_AND_B32 %186, 255, implicit-def dead $scc |
| %1358:sreg_32 = S_OR_B32 %1357, %1356, implicit-def dead $scc |
| %1359:sreg_32 = S_LSHL_B32 %1358, 16, implicit-def dead $scc |
| %1360:sreg_32 = S_AND_B32 %1358, 65535, implicit-def dead $scc |
| undef %1361.sub0:sgpr_128 = S_OR_B32 %1360, %1359, implicit-def dead $scc |
| %1361.sub1:sgpr_128 = COPY %1282.sub0 |
| %1361.sub2:sgpr_128 = COPY %1282.sub0 |
| %1361.sub3:sgpr_128 = COPY %1282.sub0 |
| %1362:av_128_align2 = COPY %1361 |
| DS_WRITE_B128_gfx9 %1288, %1362, 0, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1362, 256, 0, implicit $exec |
| %1363:sreg_32 = S_LSHL_B32 %1357, 16, implicit-def dead $scc |
| undef %1364.sub0:sgpr_128 = S_OR_B32 %1360, %1363, implicit-def dead $scc |
| %1364.sub1:sgpr_128 = COPY %1282.sub0 |
| %1364.sub2:sgpr_128 = COPY %1282.sub0 |
| %1364.sub3:sgpr_128 = COPY %1282.sub0 |
| %1365:av_128_align2 = COPY %1364 |
| DS_WRITE_B128_gfx9 %1288, %1365, 128, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1365, 384, 0, implicit $exec |
| WAVE_BARRIER |
| %1366:vgpr_32 = DS_READ_I8_gfx9 %1294, 0, 0, implicit $exec |
| %1367:vgpr_32 = DS_READ_I8_gfx9 %1294, 1, 0, implicit $exec |
| %1368:vgpr_32 = DS_READ_I8_gfx9 %1294, 2, 0, implicit $exec |
| %1369:vgpr_32 = DS_READ_I8_gfx9 %1294, 3, 0, implicit $exec |
| WAVE_BARRIER |
| DS_WRITE_B128_gfx9 %1288, %1309, 0, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1309, 256, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1309, 128, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1309, 384, 0, implicit $exec |
| WAVE_BARRIER |
| WAVE_BARRIER |
| DS_WRITE_B128_gfx9 %1288, %1309, 0, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1309, 256, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1309, 128, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1309, 384, 0, implicit $exec |
| WAVE_BARRIER |
| WAVE_BARRIER |
| DS_WRITE_B128_gfx9 %1288, %1309, 0, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1309, 256, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1309, 128, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1309, 384, 0, implicit $exec |
| WAVE_BARRIER |
| %1370:vgpr_32 = V_SUB_U32_e32 %1340, %1366, implicit $exec |
| %1371:vgpr_32 = V_SUB_U32_e32 %1341, %1366, implicit $exec |
| %1372:vgpr_32 = V_SUB_U32_e32 %1342, %1366, implicit $exec |
| %1373:vgpr_32 = V_SUB_U32_e32 %1343, %1366, implicit $exec |
| %1374:vgpr_32 = V_SUB_U32_e32 %1344, %1367, implicit $exec |
| %1375:vgpr_32 = V_SUB_U32_e32 %1345, %1367, implicit $exec |
| %1376:vgpr_32 = V_SUB_U32_e32 %1346, %1367, implicit $exec |
| %1377:vgpr_32 = V_SUB_U32_e32 %1347, %1367, implicit $exec |
| %1378:vgpr_32 = V_SUB_U32_e32 %1348, %1368, implicit $exec |
| %1379:vgpr_32 = V_SUB_U32_e32 %1349, %1368, implicit $exec |
| %1380:vgpr_32 = V_SUB_U32_e32 %1350, %1368, implicit $exec |
| %1381:vgpr_32 = V_SUB_U32_e32 %1351, %1368, implicit $exec |
| %1382:vgpr_32 = V_SUB_U32_e32 %1352, %1369, implicit $exec |
| %1383:vgpr_32 = V_SUB_U32_e32 %1353, %1369, implicit $exec |
| %1384:vgpr_32 = V_SUB_U32_e32 %1354, %1369, implicit $exec |
| %1385:vgpr_32 = V_SUB_U32_e32 %1355, %1369, implicit $exec |
| %1386:vgpr_32 = V_CVT_F32_I32_e32 %1370, implicit $mode, implicit $exec |
| %1387:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 %1386, implicit $mode, implicit $exec |
| %1388:vgpr_32 = V_CVT_F32_I32_e32 %1371, implicit $mode, implicit $exec |
| %1389:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 %1388, implicit $mode, implicit $exec |
| %1390:vgpr_32 = V_CVT_F32_I32_e32 %1372, implicit $mode, implicit $exec |
| %1391:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 %1390, implicit $mode, implicit $exec |
| %1392:vgpr_32 = V_CVT_F32_I32_e32 %1373, implicit $mode, implicit $exec |
| %1393:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 %1392, implicit $mode, implicit $exec |
| %1394:vgpr_32 = V_CVT_F32_I32_e32 %1374, implicit $mode, implicit $exec |
| %1395:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 %1394, implicit $mode, implicit $exec |
| %1396:vgpr_32 = V_CVT_F32_I32_e32 %1375, implicit $mode, implicit $exec |
| %1397:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 %1396, implicit $mode, implicit $exec |
| %1398:vgpr_32 = V_CVT_F32_I32_e32 %1376, implicit $mode, implicit $exec |
| %1399:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 %1398, implicit $mode, implicit $exec |
| %1400:vgpr_32 = V_CVT_F32_I32_e32 %1377, implicit $mode, implicit $exec |
| %1401:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 %1400, implicit $mode, implicit $exec |
| %1402:vgpr_32 = V_CVT_F32_I32_e32 %1378, implicit $mode, implicit $exec |
| %1403:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 %1402, implicit $mode, implicit $exec |
| %1404:vgpr_32 = V_CVT_F32_I32_e32 %1379, implicit $mode, implicit $exec |
| %1405:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 %1404, implicit $mode, implicit $exec |
| %1406:vgpr_32 = V_CVT_F32_I32_e32 %1380, implicit $mode, implicit $exec |
| %1407:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 %1406, implicit $mode, implicit $exec |
| %1408:vgpr_32 = V_CVT_F32_I32_e32 %1381, implicit $mode, implicit $exec |
| %1409:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 %1408, implicit $mode, implicit $exec |
| %1410:vgpr_32 = V_CVT_F32_I32_e32 %1382, implicit $mode, implicit $exec |
| %1411:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 %1410, implicit $mode, implicit $exec |
| %1412:vgpr_32 = V_CVT_F32_I32_e32 %1383, implicit $mode, implicit $exec |
| %1413:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 %1412, implicit $mode, implicit $exec |
| %1414:vgpr_32 = V_CVT_F32_I32_e32 %1384, implicit $mode, implicit $exec |
| %1415:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 %1414, implicit $mode, implicit $exec |
| %1416:vgpr_32 = V_CVT_F32_I32_e32 %1385, implicit $mode, implicit $exec |
| %1417:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 %1416, implicit $mode, implicit $exec |
| %1418:vgpr_32 = nofpexcept V_MUL_F16_e32 %1315.sub0, %1387, implicit $mode, implicit $exec |
| %1419:vgpr_32 = nofpexcept V_MUL_F16_e32 %1318.sub0, %1389, implicit $mode, implicit $exec |
| %1420:vgpr_32 = nofpexcept V_MUL_F16_e32 %1321.sub0, %1391, implicit $mode, implicit $exec |
| %1421:vgpr_32 = nofpexcept V_MUL_F16_e32 %1324.sub0, %1393, implicit $mode, implicit $exec |
| %1422:vgpr_32 = nofpexcept V_MUL_F16_e32 %1316, %1395, implicit $mode, implicit $exec |
| %1423:vgpr_32 = nofpexcept V_MUL_F16_e32 %1319, %1397, implicit $mode, implicit $exec |
| %1424:vgpr_32 = nofpexcept V_MUL_F16_e32 %1322, %1399, implicit $mode, implicit $exec |
| %1425:vgpr_32 = nofpexcept V_MUL_F16_e32 %1325, %1401, implicit $mode, implicit $exec |
| %1426:vgpr_32 = nofpexcept V_MUL_F16_e32 %1315.sub1, %1403, implicit $mode, implicit $exec |
| %1427:vgpr_32 = nofpexcept V_MUL_F16_e32 %1318.sub1, %1405, implicit $mode, implicit $exec |
| %1428:vgpr_32 = nofpexcept V_MUL_F16_e32 %1321.sub1, %1407, implicit $mode, implicit $exec |
| %1429:vgpr_32 = nofpexcept V_MUL_F16_e32 %1324.sub1, %1409, implicit $mode, implicit $exec |
| %1430:vgpr_32 = nofpexcept V_MUL_F16_e32 %1317, %1411, implicit $mode, implicit $exec |
| %1431:vgpr_32 = nofpexcept V_MUL_F16_e32 %1320, %1413, implicit $mode, implicit $exec |
| %1432:vgpr_32 = nofpexcept V_MUL_F16_e32 %1323, %1415, implicit $mode, implicit $exec |
| %1433:vgpr_32 = nofpexcept V_MUL_F16_e32 %1326, %1417, implicit $mode, implicit $exec |
| %1434:sgpr_32 = S_MOV_B32 1069066811 |
| %1435:vgpr_32 = nofpexcept V_FMA_MIX_F32 8, %1418, 0, %1434, 1, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1436:vgpr_32 = nofpexcept V_FMA_MIX_F32 8, %1419, 0, %1434, 1, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1437:vgpr_32 = nofpexcept V_FMA_MIX_F32 8, %1420, 0, %1434, 1, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1438:vgpr_32 = nofpexcept V_FMA_MIX_F32 8, %1421, 0, %1434, 1, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1439:vgpr_32 = nofpexcept V_FMA_MIX_F32 8, %1422, 0, %1434, 1, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1440:vgpr_32 = nofpexcept V_FMA_MIX_F32 8, %1423, 0, %1434, 1, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1441:vgpr_32 = nofpexcept V_FMA_MIX_F32 8, %1424, 0, %1434, 1, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1442:vgpr_32 = nofpexcept V_FMA_MIX_F32 8, %1425, 0, %1434, 1, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1443:vgpr_32 = nofpexcept V_FMA_MIX_F32 8, %1426, 0, %1434, 1, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1444:vgpr_32 = nofpexcept V_FMA_MIX_F32 8, %1427, 0, %1434, 1, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1445:vgpr_32 = nofpexcept V_FMA_MIX_F32 8, %1428, 0, %1434, 1, 0, 0, 0, 0, implicit $mode, implicit $exec |
| undef %1446.sub0:vreg_64_align2 = nofpexcept V_FMA_MIX_F32 8, %1429, 0, %1434, 1, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1447:vgpr_32 = nofpexcept V_FMA_MIX_F32 8, %1430, 0, %1434, 1, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1448:vgpr_32 = nofpexcept V_FMA_MIX_F32 8, %1431, 0, %1434, 1, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1449:vgpr_32 = nofpexcept V_FMA_MIX_F32 8, %1432, 0, %1434, 1, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1450:vgpr_32 = nofpexcept V_FMA_MIX_F32 8, %1433, 0, %1434, 1, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1451:vgpr_32 = V_MOV_B32_e32 -8388608, implicit $exec |
| %1446.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %1451, 0, %1447, %1283, implicit $exec |
| %1452:vgpr_32 = V_CNDMASK_B32_e64 0, %1451, 0, %1448, %1283, implicit $exec |
| %1453:vgpr_32 = V_CNDMASK_B32_e64 0, %1451, 0, %1449, %1283, implicit $exec |
| %1454:vgpr_32 = V_CNDMASK_B32_e64 0, %1451, 0, %1450, %1283, implicit $exec |
| %1455:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, %1447, %1283, implicit $exec |
| %1456:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, %1448, %1283, implicit $exec |
| %1457:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, %1449, %1283, implicit $exec |
| %1458:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, %1450, %1283, implicit $exec |
| %1459:vgpr_32 = V_MAXIMUM3_F32_e64 0, %1435, 0, %1436, 0, %1436, 0, 0, implicit $exec |
| %1460:vgpr_32 = V_MAXIMUM3_F32_e64 0, %1459, 0, %1437, 0, %1438, 0, 0, implicit $exec |
| %1461:vgpr_32 = V_MAXIMUM3_F32_e64 0, %1439, 0, %1440, 0, %1440, 0, 0, implicit $exec |
| %1462:vgpr_32 = V_MAXIMUM3_F32_e64 0, %1461, 0, %1441, 0, %1442, 0, 0, implicit $exec |
| %1463:vgpr_32 = V_MAXIMUM3_F32_e64 0, %1443, 0, %1444, 0, %1444, 0, 0, implicit $exec |
| %1464:vgpr_32 = V_MAXIMUM3_F32_e64 0, %1463, 0, %1445, 0, %1446.sub0, 0, 0, implicit $exec |
| %1465:vgpr_32 = V_MAXIMUM3_F32_e64 0, %1455, 0, %1456, 0, %1456, 0, 0, implicit $exec |
| %1466:vgpr_32 = V_MAXIMUM3_F32_e64 0, %1465, 0, %1457, 0, %1458, 0, 0, implicit $exec |
| %1467:vgpr_32 = nuw nsw V_LSHLREV_B32_e32 2, %22, implicit $exec |
| %1468:vgpr_32 = V_XOR_B32_e32 64, %1467, implicit $exec |
| %1469:vgpr_32 = DS_BPERMUTE_B32 %1468, %1460, 0, implicit $exec |
| %1470:vgpr_32 = V_MAXIMUM3_F32_e64 0, %1460, 0, %1469, 0, %1469, 0, 0, implicit $exec |
| %1471:vgpr_32 = COPY %1470 |
| %1471:vgpr_32 = V_MOV_B32_dpp %1471, %1471, 296, 15, 15, 0, implicit $exec |
| %1472:vgpr_32 = V_MAXIMUM3_F32_e64 0, %1470, 0, %1471, 0, %1471, 0, 0, implicit $exec |
| %1473:vgpr_32 = COPY %1472 |
| %1473:vgpr_32 = V_MOV_B32_dpp %1473, %1473, 321, 15, 15, 0, implicit $exec |
| %1473:vgpr_32 = V_MOV_B32_dpp %1473, %1473, 27, 15, 15, 0, implicit $exec |
| %1474:vgpr_32 = V_MAXIMUM3_F32_e64 0, %1472, 0, %1473, 0, %1473, 0, 0, implicit $exec |
| %1475:vgpr_32 = COPY %1474 |
| %1475:vgpr_32 = V_MOV_B32_dpp %1475, %1475, 78, 15, 15, 0, implicit $exec |
| %1476:vgpr_32 = V_MAXIMUM3_F32_e64 0, %1474, 0, %1475, 0, %1475, 0, 0, implicit $exec |
| %1477:vgpr_32 = COPY %1476 |
| %1477:vgpr_32 = V_MOV_B32_dpp %1477, %1477, 177, 15, 15, 0, implicit $exec |
| %1478:vgpr_32 = V_MAXIMUM3_F32_e64 0, %1476, 0, %1477, 0, %1477, 0, 0, implicit $exec |
| %1479:vgpr_32 = DS_BPERMUTE_B32 %1468, %1462, 0, implicit $exec |
| %1480:vgpr_32 = V_MAXIMUM3_F32_e64 0, %1462, 0, %1479, 0, %1479, 0, 0, implicit $exec |
| %1481:vgpr_32 = COPY %1480 |
| %1481:vgpr_32 = V_MOV_B32_dpp %1481, %1481, 296, 15, 15, 0, implicit $exec |
| %1482:vgpr_32 = V_MAXIMUM3_F32_e64 0, %1480, 0, %1481, 0, %1481, 0, 0, implicit $exec |
| %1483:vgpr_32 = COPY %1482 |
| %1483:vgpr_32 = V_MOV_B32_dpp %1483, %1483, 321, 15, 15, 0, implicit $exec |
| %1483:vgpr_32 = V_MOV_B32_dpp %1483, %1483, 27, 15, 15, 0, implicit $exec |
| %1484:vgpr_32 = V_MAXIMUM3_F32_e64 0, %1482, 0, %1483, 0, %1483, 0, 0, implicit $exec |
| %1485:vgpr_32 = COPY %1484 |
| %1485:vgpr_32 = V_MOV_B32_dpp %1485, %1485, 78, 15, 15, 0, implicit $exec |
| %1486:vgpr_32 = V_MAXIMUM3_F32_e64 0, %1484, 0, %1485, 0, %1485, 0, 0, implicit $exec |
| %1487:vgpr_32 = COPY %1486 |
| %1487:vgpr_32 = V_MOV_B32_dpp %1487, %1487, 177, 15, 15, 0, implicit $exec |
| %1488:vgpr_32 = V_MAXIMUM3_F32_e64 0, %1486, 0, %1487, 0, %1487, 0, 0, implicit $exec |
| %1489:vgpr_32 = DS_BPERMUTE_B32 %1468, %1464, 0, implicit $exec |
| %1490:vgpr_32 = V_MAXIMUM3_F32_e64 0, %1464, 0, %1489, 0, %1489, 0, 0, implicit $exec |
| %1491:vgpr_32 = COPY %1490 |
| %1491:vgpr_32 = V_MOV_B32_dpp %1491, %1491, 296, 15, 15, 0, implicit $exec |
| %1492:vgpr_32 = V_MAXIMUM3_F32_e64 0, %1490, 0, %1491, 0, %1491, 0, 0, implicit $exec |
| %1493:vgpr_32 = COPY %1492 |
| %1493:vgpr_32 = V_MOV_B32_dpp %1493, %1493, 321, 15, 15, 0, implicit $exec |
| %1493:vgpr_32 = V_MOV_B32_dpp %1493, %1493, 27, 15, 15, 0, implicit $exec |
| %1494:vgpr_32 = V_MAXIMUM3_F32_e64 0, %1492, 0, %1493, 0, %1493, 0, 0, implicit $exec |
| %1495:vgpr_32 = COPY %1494 |
| %1495:vgpr_32 = V_MOV_B32_dpp %1495, %1495, 78, 15, 15, 0, implicit $exec |
| %1496:vgpr_32 = V_MAXIMUM3_F32_e64 0, %1494, 0, %1495, 0, %1495, 0, 0, implicit $exec |
| %1497:vgpr_32 = COPY %1496 |
| %1497:vgpr_32 = V_MOV_B32_dpp %1497, %1497, 177, 15, 15, 0, implicit $exec |
| %1498:vgpr_32 = V_MAXIMUM3_F32_e64 0, %1496, 0, %1497, 0, %1497, 0, 0, implicit $exec |
| %1499:vgpr_32 = DS_BPERMUTE_B32 %1468, %1466, 0, implicit $exec |
| %1500:vgpr_32 = V_MAXIMUM3_F32_e64 0, %1466, 0, %1499, 0, %1499, 0, 0, implicit $exec |
| %1501:vgpr_32 = COPY %1500 |
| %1501:vgpr_32 = V_MOV_B32_dpp %1501, %1501, 296, 15, 15, 0, implicit $exec |
| %1502:vgpr_32 = V_MAXIMUM3_F32_e64 0, %1500, 0, %1501, 0, %1501, 0, 0, implicit $exec |
| %1503:vgpr_32 = COPY %1502 |
| %1503:vgpr_32 = V_MOV_B32_dpp %1503, %1503, 321, 15, 15, 0, implicit $exec |
| %1503:vgpr_32 = V_MOV_B32_dpp %1503, %1503, 27, 15, 15, 0, implicit $exec |
| %1504:vgpr_32 = V_MAXIMUM3_F32_e64 0, %1502, 0, %1503, 0, %1503, 0, 0, implicit $exec |
| %1505:vgpr_32 = COPY %1504 |
| %1505:vgpr_32 = V_MOV_B32_dpp %1505, %1505, 78, 15, 15, 0, implicit $exec |
| %1506:vgpr_32 = V_MAXIMUM3_F32_e64 0, %1504, 0, %1505, 0, %1505, 0, 0, implicit $exec |
| %1507:vgpr_32 = COPY %1506 |
| %1507:vgpr_32 = V_MOV_B32_dpp %1507, %1507, 177, 15, 15, 0, implicit $exec |
| %1508:vgpr_32 = V_MAXIMUM3_F32_e64 0, %1506, 0, %1507, 0, %1507, 0, 0, implicit $exec |
| undef %1509.sub1:vreg_64_align2 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %1510:vgpr_32 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %1509.sub1:vreg_64_align2 = V_MOV_B32_dpp %1509.sub1, %1510, 296, 15, 15, 0, implicit $exec |
| %1511:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1478, 0, %251.sub0, 0, implicit $mode, implicit $exec |
| %1512:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1488, 0, %252.sub0, 0, implicit $mode, implicit $exec |
| %1513:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1498, 0, %249.sub0, 0, implicit $mode, implicit $exec |
| %1514:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1508, 0, %250.sub0, 0, implicit $mode, implicit $exec |
| %1515:sreg_64 = nofpexcept V_CMP_U_F32_e64 0, %1478, 0, %1478, 0, implicit $mode, implicit $exec |
| %1516:sreg_64 = nofpexcept V_CMP_U_F32_e64 0, %1488, 0, %1488, 0, implicit $mode, implicit $exec |
| %1517:sreg_64 = nofpexcept V_CMP_U_F32_e64 0, %1498, 0, %1498, 0, implicit $mode, implicit $exec |
| %1518:sreg_64 = nofpexcept V_CMP_U_F32_e64 0, %1508, 0, %1508, 0, implicit $mode, implicit $exec |
| %1519:sreg_64_xexec = S_OR_B64 %1515, %1511, implicit-def dead $scc |
| %1520:vgpr_32 = V_CNDMASK_B32_e64 0, %251.sub0, 0, %1478, %1519, implicit $exec |
| %1521:sreg_64_xexec = S_OR_B64 %1516, %1512, implicit-def dead $scc |
| %1522:vgpr_32 = V_CNDMASK_B32_e64 0, %252.sub0, 0, %1488, %1521, implicit $exec |
| %1523:vgpr_32 = nofpexcept V_SUB_F32_e32 %1435, %1520, implicit $mode, implicit $exec |
| %1524:vgpr_32 = nofpexcept V_SUB_F32_e32 %1436, %1520, implicit $mode, implicit $exec |
| %1525:vgpr_32 = nofpexcept V_SUB_F32_e32 %1437, %1520, implicit $mode, implicit $exec |
| %1526:vgpr_32 = nofpexcept V_SUB_F32_e32 %1438, %1520, implicit $mode, implicit $exec |
| %1527:vgpr_32 = nofpexcept V_SUB_F32_e32 %1439, %1522, implicit $mode, implicit $exec |
| %1528:vgpr_32 = nofpexcept V_SUB_F32_e32 %1440, %1522, implicit $mode, implicit $exec |
| %1529:vgpr_32 = nofpexcept V_SUB_F32_e32 %1441, %1522, implicit $mode, implicit $exec |
| %1530:vgpr_32 = nofpexcept V_SUB_F32_e32 %1442, %1522, implicit $mode, implicit $exec |
| %1531:sreg_64_xexec = S_OR_B64 %1518, %1514, implicit-def dead $scc |
| %1532:sreg_64_xexec = S_OR_B64 %1517, %1513, implicit-def dead $scc |
| undef %1533.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, %250.sub0, 0, %1508, %1531, implicit $exec |
| %1533.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, %249.sub0, 0, %1498, %1532, implicit $exec |
| %1534:vgpr_32 = nofpexcept V_SUB_F32_e32 %1443, %1533.sub0, implicit $mode, implicit $exec |
| %1535:vgpr_32 = nofpexcept V_SUB_F32_e32 %1444, %1533.sub0, implicit $mode, implicit $exec |
| %1536:vgpr_32 = nofpexcept V_SUB_F32_e32 %1445, %1533.sub0, implicit $mode, implicit $exec |
| %1537:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %1446, 11, %1533, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1538:vgpr_32 = nofpexcept V_SUB_F32_e32 %1452, %1533.sub1, implicit $mode, implicit $exec |
| %1539:vgpr_32 = nofpexcept V_SUB_F32_e32 %1453, %1533.sub1, implicit $mode, implicit $exec |
| %1540:vgpr_32 = nofpexcept V_SUB_F32_e32 %1454, %1533.sub1, implicit $mode, implicit $exec |
| undef %1541.sub0:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %1523, implicit $mode, implicit $exec |
| %1541.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %1524, implicit $mode, implicit $exec |
| undef %1542.sub0:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %1525, implicit $mode, implicit $exec |
| %1542.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %1526, implicit $mode, implicit $exec |
| undef %1543.sub0:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %1527, implicit $mode, implicit $exec |
| %1543.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %1528, implicit $mode, implicit $exec |
| undef %1544.sub0:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %1529, implicit $mode, implicit $exec |
| %1544.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %1530, implicit $mode, implicit $exec |
| undef %1545.sub0:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %1534, implicit $mode, implicit $exec |
| %1545.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %1535, implicit $mode, implicit $exec |
| undef %1546.sub0:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %1536, implicit $mode, implicit $exec |
| %1546.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %1537.sub0, implicit $mode, implicit $exec |
| %1547:vgpr_32 = nofpexcept V_EXP_F32_e32 %1537.sub1, implicit $mode, implicit $exec |
| %1548:vgpr_32 = nofpexcept V_EXP_F32_e32 %1538, implicit $mode, implicit $exec |
| %1549:vgpr_32 = nofpexcept V_EXP_F32_e32 %1539, implicit $mode, implicit $exec |
| %1550:vgpr_32 = nofpexcept V_EXP_F32_e32 %1540, implicit $mode, implicit $exec |
| undef %1551.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, 0, 0, %1547, %1283, implicit $exec |
| %1551.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, 0, 0, %1548, %1283, implicit $exec |
| undef %1552.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, 0, 0, %1549, %1283, implicit $exec |
| %1552.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, 0, 0, %1550, %1283, implicit $exec |
| %1553:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %1541, 8, %1542, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1554:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %1543, 8, %1544, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1555:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %1545, 8, %1546, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1556:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %1551, 8, %1552, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1557:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %1553, 4, %1553, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1558:vgpr_32 = nofpexcept V_ADD_F32_e32 %1555.sub0, %1555.sub1, implicit $mode, implicit $exec |
| %1559:vgpr_32 = nofpexcept V_ADD_F32_e32 %1556.sub0, %1556.sub1, implicit $mode, implicit $exec |
| undef %1560.sub0:vreg_64_align2 = DS_BPERMUTE_B32 %1468, %1557.sub0, 0, implicit $exec |
| %1557.sub1:vreg_64_align2 = COPY %1554.sub0 |
| %1560.sub1:vreg_64_align2 = COPY %1554.sub1 |
| %1561:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %1557, 8, %1560, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1509.sub0:vreg_64_align2 = COPY %1561.sub0 |
| %1509.sub0:vreg_64_align2 = V_MOV_B32_dpp %1509.sub0, %1509.sub0, 296, 15, 15, 0, implicit $exec |
| %1562:vgpr_32 = DS_BPERMUTE_B32 %1468, %1561.sub1, 0, implicit $exec |
| %1563:vgpr_32 = nofpexcept V_ADD_F32_e32 %1561.sub1, %1562, implicit $mode, implicit $exec |
| %1564:vgpr_32 = COPY %1563 |
| %1564:vgpr_32 = V_MOV_B32_dpp %1564, %1564, 296, 15, 15, 0, implicit $exec |
| %1565:vgpr_32 = nofpexcept V_ADD_F32_e32 %1563, %1564, implicit $mode, implicit $exec |
| %1566:vgpr_32 = COPY %1565 |
| %1566:vgpr_32 = V_MOV_B32_dpp %1566, %1566, 321, 15, 15, 0, implicit $exec |
| %1566:vgpr_32 = V_MOV_B32_dpp %1566, %1566, 27, 15, 15, 0, implicit $exec |
| %1567:vgpr_32 = nofpexcept V_ADD_F32_e32 %1565, %1566, implicit $mode, implicit $exec |
| %1568:vgpr_32 = COPY %1567 |
| %1568:vgpr_32 = V_MOV_B32_dpp %1568, %1568, 78, 15, 15, 0, implicit $exec |
| %1569:vgpr_32 = nofpexcept V_ADD_F32_e32 %1567, %1568, implicit $mode, implicit $exec |
| %1570:vgpr_32 = COPY %1569 |
| %1570:vgpr_32 = V_MOV_B32_dpp %1570, %1570, 177, 15, 15, 0, implicit $exec |
| undef %1571.sub0:vreg_64_align2 = nofpexcept V_ADD_F32_e32 %1569, %1570, implicit $mode, implicit $exec |
| %1572:vgpr_32 = DS_BPERMUTE_B32 %1468, %1558, 0, implicit $exec |
| %1573:vgpr_32 = nofpexcept V_ADD_F32_e32 %1558, %1572, implicit $mode, implicit $exec |
| %1574:vgpr_32 = COPY %1573 |
| %1574:vgpr_32 = V_MOV_B32_dpp %1574, %1574, 296, 15, 15, 0, implicit $exec |
| %1575:vgpr_32 = nofpexcept V_ADD_F32_e32 %1573, %1574, implicit $mode, implicit $exec |
| %1576:vgpr_32 = COPY %1575 |
| %1576:vgpr_32 = V_MOV_B32_dpp %1576, %1576, 321, 15, 15, 0, implicit $exec |
| %1576:vgpr_32 = V_MOV_B32_dpp %1576, %1576, 27, 15, 15, 0, implicit $exec |
| %1577:vgpr_32 = nofpexcept V_ADD_F32_e32 %1575, %1576, implicit $mode, implicit $exec |
| %1578:vgpr_32 = COPY %1577 |
| %1578:vgpr_32 = V_MOV_B32_dpp %1578, %1578, 78, 15, 15, 0, implicit $exec |
| %1579:vgpr_32 = nofpexcept V_ADD_F32_e32 %1577, %1578, implicit $mode, implicit $exec |
| %1580:vgpr_32 = COPY %1579 |
| %1580:vgpr_32 = V_MOV_B32_dpp %1580, %1580, 177, 15, 15, 0, implicit $exec |
| %1581:vgpr_32 = nofpexcept V_ADD_F32_e32 %1579, %1580, implicit $mode, implicit $exec |
| %1582:vgpr_32 = DS_BPERMUTE_B32 %1468, %1559, 0, implicit $exec |
| %1583:vgpr_32 = nofpexcept V_ADD_F32_e32 %1559, %1582, implicit $mode, implicit $exec |
| %1584:vgpr_32 = COPY %1583 |
| %1584:vgpr_32 = V_MOV_B32_dpp %1584, %1584, 296, 15, 15, 0, implicit $exec |
| %1585:vgpr_32 = nofpexcept V_ADD_F32_e32 %1583, %1584, implicit $mode, implicit $exec |
| %1586:vgpr_32 = COPY %1585 |
| %1586:vgpr_32 = V_MOV_B32_dpp %1586, %1586, 321, 15, 15, 0, implicit $exec |
| %1586:vgpr_32 = V_MOV_B32_dpp %1586, %1586, 27, 15, 15, 0, implicit $exec |
| %1587:vgpr_32 = nofpexcept V_ADD_F32_e32 %1585, %1586, implicit $mode, implicit $exec |
| %1588:vgpr_32 = COPY %1587 |
| %1588:vgpr_32 = V_MOV_B32_dpp %1588, %1588, 78, 15, 15, 0, implicit $exec |
| %1589:vgpr_32 = nofpexcept V_ADD_F32_e32 %1587, %1588, implicit $mode, implicit $exec |
| %1590:vgpr_32 = COPY %1589 |
| %1590:vgpr_32 = V_MOV_B32_dpp %1590, %1590, 177, 15, 15, 0, implicit $exec |
| %1591:vgpr_32 = nofpexcept V_ADD_F32_e32 %1589, %1590, implicit $mode, implicit $exec |
| %1592:vgpr_32 = nofpexcept V_SUB_F32_e32 %251.sub0, %1520, implicit $mode, implicit $exec |
| %1593:vgpr_32 = nofpexcept V_SUB_F32_e32 %252.sub0, %1522, implicit $mode, implicit $exec |
| %1594:vgpr_32 = nofpexcept V_SUB_F32_e32 %249.sub0, %1533.sub0, implicit $mode, implicit $exec |
| %1595:vgpr_32 = nofpexcept V_SUB_F32_e32 %250.sub0, %1533.sub1, implicit $mode, implicit $exec |
| undef %1596.sub0:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1592, implicit $mode, implicit $exec |
| undef %1597.sub0:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1593, implicit $mode, implicit $exec |
| undef %1598.sub0:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1594, implicit $mode, implicit $exec |
| undef %1599.sub0:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1595, implicit $mode, implicit $exec |
| %1600:vgpr_32 = nofpexcept V_MUL_F32_e32 %1598.sub0, %314.sub0, implicit $mode, implicit $exec |
| %1601:vgpr_32 = nofpexcept V_MUL_F32_e32 %1599.sub0, %314.sub1, implicit $mode, implicit $exec |
| %1602:vgpr_32 = nofpexcept V_ADD_F32_e32 %1600, %1581, implicit $mode, implicit $exec |
| %1603:vgpr_32 = nofpexcept V_ADD_F32_e32 %1601, %1591, implicit $mode, implicit $exec |
| undef %1604.sub0:vreg_64_align2 = V_CVT_PK_F16_F32_e64 0, %1541.sub0, 0, %1541.sub1, 0, 0, implicit $exec |
| %1604.sub1:vreg_64_align2 = V_CVT_PK_F16_F32_e64 0, %1542.sub0, 0, %1542.sub1, 0, 0, implicit $exec |
| undef %1605.sub0:vreg_64_align2 = V_CVT_PK_F16_F32_e64 0, %1543.sub0, 0, %1543.sub1, 0, 0, implicit $exec |
| %1605.sub1:vreg_64_align2 = V_CVT_PK_F16_F32_e64 0, %1544.sub0, 0, %1544.sub1, 0, 0, implicit $exec |
| undef %1606.sub0:vreg_64_align2 = V_CVT_PK_F16_F32_e64 0, %1545.sub0, 0, %1545.sub1, 0, 0, implicit $exec |
| %1606.sub1:vreg_64_align2 = V_CVT_PK_F16_F32_e64 0, %1546.sub0, 0, %1546.sub1, 0, 0, implicit $exec |
| %1607:vgpr_32 = V_CVT_PK_F16_F32_e64 0, %1547, 0, %1548, 0, 0, implicit $exec |
| %1608:vgpr_32 = V_LSHRREV_B32_e32 16, %1607, implicit $exec |
| %1609:vgpr_32 = V_CVT_PK_F16_F32_e64 0, %1549, 0, %1550, 0, 0, implicit $exec |
| %1610:vgpr_32 = V_LSHRREV_B32_e32 16, %1609, implicit $exec |
| %1611:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, %1607, %1283, implicit $exec |
| %1612:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, %1608, %1283, implicit $exec |
| %1613:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, %1609, %1283, implicit $exec |
| %1614:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, %1610, %1283, implicit $exec |
| %1615:vgpr_32 = nuw V_ADD_U32_e32 %13, %108, implicit $exec |
| undef %1616.sub0_sub1:av_128_align2 = DS_READ_B64_TR_B16 %1615, 0, 0, implicit $exec |
| %1617:vgpr_32 = disjoint V_OR_B32_e32 512, %108, implicit $exec |
| %1618:vgpr_32 = nuw V_ADD_U32_e32 %13, %1617, implicit $exec |
| %1616.sub2_sub3:av_128_align2 = DS_READ_B64_TR_B16 %1618, 0, 0, implicit $exec |
| %1619:vgpr_32 = nuw nsw V_ADD_U32_e32 1056, %108, implicit $exec |
| %1620:vgpr_32 = nuw V_ADD_U32_e32 %13, %1619, implicit $exec |
| undef %1621.sub0_sub1:av_128_align2 = DS_READ_B64_TR_B16 %1620, 0, 0, implicit $exec |
| %1622:vgpr_32 = nuw nsw V_ADD_U32_e32 1568, %108, implicit $exec |
| %1623:vgpr_32 = nuw V_ADD_U32_e32 %13, %1622, implicit $exec |
| %1621.sub2_sub3:av_128_align2 = DS_READ_B64_TR_B16 %1623, 0, 0, implicit $exec |
| %1624:vgpr_32 = nuw nsw V_ADD_U32_e32 2112, %108, implicit $exec |
| %1625:vgpr_32 = nuw V_ADD_U32_e32 %13, %1624, implicit $exec |
| undef %1626.sub0_sub1:av_128_align2 = DS_READ_B64_TR_B16 %1625, 0, 0, implicit $exec |
| %1627:vgpr_32 = nuw nsw V_ADD_U32_e32 2624, %108, implicit $exec |
| %1628:vgpr_32 = nuw V_ADD_U32_e32 %13, %1627, implicit $exec |
| %1626.sub2_sub3:av_128_align2 = DS_READ_B64_TR_B16 %1628, 0, 0, implicit $exec |
| %1629:vgpr_32 = nuw nsw V_ADD_U32_e32 3168, %108, implicit $exec |
| %1630:vgpr_32 = nuw V_ADD_U32_e32 %13, %1629, implicit $exec |
| undef %1631.sub0_sub1:av_128_align2 = DS_READ_B64_TR_B16 %1630, 0, 0, implicit $exec |
| %1632:vgpr_32 = nuw nsw V_ADD_U32_e32 3680, %108, implicit $exec |
| %1633:vgpr_32 = nuw V_ADD_U32_e32 %13, %1632, implicit $exec |
| %1631.sub2_sub3:av_128_align2 = DS_READ_B64_TR_B16 %1633, 0, 0, implicit $exec |
| S_WAITCNT 49279 |
| WAVE_BARRIER |
| %1634:vgpr_32 = nuw nsw V_LSHLREV_B32_e32 3, %1327, implicit $exec |
| %1635:vgpr_32 = V_MOV_B32_e32 1056, implicit $exec |
| %1636:vgpr_32 = V_CNDMASK_B32_e64 0, %1635, 0, 0, %1283, implicit $exec |
| %1637:vgpr_32 = V_XOR_B32_e32 %1636, %1634, implicit $exec |
| %1638:vgpr_32 = V_XOR_B32_e32 264, %1637, implicit $exec |
| %1639:vgpr_32 = V_XOR_B32_e32 528, %1637, implicit $exec |
| %1640:vgpr_32 = V_XOR_B32_e32 792, %1637, implicit $exec |
| %1641:sreg_32 = S_MOV_B32 84148480 |
| undef %1642.sub1:vreg_64_align2 = V_PERM_B32_e64 %1614, %1613, %1641, implicit $exec |
| %1642.sub0:vreg_64_align2 = V_PERM_B32_e64 %1612, %1611, %1641, implicit $exec |
| %1643:vgpr_32 = V_XOR_B32_e32 2112, %1637, implicit $exec |
| %1644:vgpr_32 = V_XOR_B32_e32 2376, %1637, implicit $exec |
| %1645:vgpr_32 = V_XOR_B32_e32 2640, %1637, implicit $exec |
| %1646:vgpr_32 = V_XOR_B32_e32 2904, %1637, implicit $exec |
| %1647:vgpr_32 = nuw V_ADD_U32_e32 %14, %1328, implicit $exec |
| %1648:vgpr_32 = nuw V_ADD_U32_e32 %14, %1331, implicit $exec |
| %1649:vgpr_32 = nuw V_ADD_U32_e32 %14, %1334, implicit $exec |
| %1650:vgpr_32 = nuw V_ADD_U32_e32 %14, %1337, implicit $exec |
| %1651:sreg_32 = S_LSHL_B32 %103, 8, implicit-def dead $scc |
| %1652:sreg_32 = S_AND_B32 %103, 255, implicit-def dead $scc |
| %1653:sreg_32 = S_OR_B32 %1652, %1651, implicit-def dead $scc |
| %1654:sreg_32 = S_LSHL_B32 %1653, 16, implicit-def dead $scc |
| %1655:sreg_32 = S_AND_B32 %1653, 65535, implicit-def dead $scc |
| undef %1656.sub0:sgpr_128 = S_OR_B32 %1655, %1654, implicit-def dead $scc |
| %1657:sreg_32 = S_LSHL_B32 %1652, 16, implicit-def dead $scc |
| undef %1658.sub0:sgpr_128 = S_OR_B32 %1655, %1657, implicit-def dead $scc |
| undef %1659.sub0:vreg_64_align2 = COPY %315.sub0 |
| %1659.sub1:vreg_64_align2 = COPY %311.sub0 |
| %1660:vgpr_32 = V_MAXIMUM3_F32_e64 0, %1509.sub1, 0, 0, 0, 0, 0, 0, implicit $exec |
| %1661:vgpr_32 = COPY %1660 |
| %1661:vgpr_32 = V_MOV_B32_dpp %1661, %1661, 321, 15, 15, 0, implicit $exec |
| %1661:vgpr_32 = V_MOV_B32_dpp %1661, %1661, 27, 15, 15, 0, implicit $exec |
| %1662:vgpr_32 = V_MAXIMUM3_F32_e64 0, %1660, 0, %1661, 0, %1661, 0, 0, implicit $exec |
| %1663:vgpr_32 = COPY %1662 |
| %1663:vgpr_32 = V_MOV_B32_dpp %1663, %1663, 78, 15, 15, 0, implicit $exec |
| %1664:vgpr_32 = V_MAXIMUM3_F32_e64 0, %1662, 0, %1663, 0, %1663, 0, 0, implicit $exec |
| %1665:vgpr_32 = COPY %1664 |
| %1665:vgpr_32 = V_MOV_B32_dpp %1665, %1665, 177, 15, 15, 0, implicit $exec |
| %1666:vgpr_32 = V_MAXIMUM3_F32_e64 0, %1664, 0, %1665, 0, %1665, 0, 0, implicit $exec |
| %1667:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %245.sub0, 0, implicit $mode, implicit $exec |
| %1668:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %245.sub1, 0, implicit $mode, implicit $exec |
| %1669:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %244.sub0, 0, implicit $mode, implicit $exec |
| %1670:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %244.sub1, 0, implicit $mode, implicit $exec |
| %1671:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %241.sub0, 0, implicit $mode, implicit $exec |
| %1672:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %241.sub1, 0, implicit $mode, implicit $exec |
| %1673:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %240.sub0, 0, implicit $mode, implicit $exec |
| %1674:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %240.sub1, 0, implicit $mode, implicit $exec |
| %1675:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %237.sub0, 0, implicit $mode, implicit $exec |
| %1676:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %237.sub1, 0, implicit $mode, implicit $exec |
| %1677:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %236.sub0, 0, implicit $mode, implicit $exec |
| %1678:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %236.sub1, 0, implicit $mode, implicit $exec |
| %1679:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %233.sub0, 0, implicit $mode, implicit $exec |
| %1680:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %233.sub1, 0, implicit $mode, implicit $exec |
| %1681:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %232.sub0, 0, implicit $mode, implicit $exec |
| %1682:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %232.sub1, 0, implicit $mode, implicit $exec |
| %1683:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %229.sub0, 0, implicit $mode, implicit $exec |
| %1684:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %229.sub1, 0, implicit $mode, implicit $exec |
| %1685:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %228.sub0, 0, implicit $mode, implicit $exec |
| %1686:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %228.sub1, 0, implicit $mode, implicit $exec |
| %1687:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %225.sub0, 0, implicit $mode, implicit $exec |
| %1688:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %225.sub1, 0, implicit $mode, implicit $exec |
| %1689:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %224.sub0, 0, implicit $mode, implicit $exec |
| %1690:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %224.sub1, 0, implicit $mode, implicit $exec |
| %1691:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %221.sub0, 0, implicit $mode, implicit $exec |
| %1692:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %221.sub1, 0, implicit $mode, implicit $exec |
| %1693:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %220.sub0, 0, implicit $mode, implicit $exec |
| %1694:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %220.sub1, 0, implicit $mode, implicit $exec |
| %1695:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %217.sub0, 0, implicit $mode, implicit $exec |
| %1696:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %217.sub1, 0, implicit $mode, implicit $exec |
| %1697:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %216.sub0, 0, implicit $mode, implicit $exec |
| %1698:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %216.sub1, 0, implicit $mode, implicit $exec |
| %1699:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %213.sub0, 0, implicit $mode, implicit $exec |
| %1700:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %213.sub1, 0, implicit $mode, implicit $exec |
| %1701:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %212.sub0, 0, implicit $mode, implicit $exec |
| %1702:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %212.sub1, 0, implicit $mode, implicit $exec |
| %1703:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %209.sub0, 0, implicit $mode, implicit $exec |
| %1704:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %209.sub1, 0, implicit $mode, implicit $exec |
| %1705:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %208.sub0, 0, implicit $mode, implicit $exec |
| %1706:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %208.sub1, 0, implicit $mode, implicit $exec |
| %1707:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %205.sub0, 0, implicit $mode, implicit $exec |
| %1708:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %205.sub1, 0, implicit $mode, implicit $exec |
| %1709:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %204.sub0, 0, implicit $mode, implicit $exec |
| %1710:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %204.sub1, 0, implicit $mode, implicit $exec |
| %1711:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %201.sub0, 0, implicit $mode, implicit $exec |
| %1712:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %201.sub1, 0, implicit $mode, implicit $exec |
| %1713:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %200.sub0, 0, implicit $mode, implicit $exec |
| %1714:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %200.sub1, 0, implicit $mode, implicit $exec |
| %1715:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %197.sub0, 0, implicit $mode, implicit $exec |
| %1716:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %197.sub1, 0, implicit $mode, implicit $exec |
| %1717:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %196.sub0, 0, implicit $mode, implicit $exec |
| %1718:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %196.sub1, 0, implicit $mode, implicit $exec |
| %1719:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %193.sub0, 0, implicit $mode, implicit $exec |
| %1720:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %193.sub1, 0, implicit $mode, implicit $exec |
| %1721:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %192.sub0, 0, implicit $mode, implicit $exec |
| %1722:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %192.sub1, 0, implicit $mode, implicit $exec |
| %1723:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %189.sub0, 0, implicit $mode, implicit $exec |
| %1724:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %189.sub1, 0, implicit $mode, implicit $exec |
| %1725:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %188.sub0, 0, implicit $mode, implicit $exec |
| %1726:sreg_64 = nofpexcept V_CMP_GE_F32_e64 0, %1666, 0, %188.sub1, 0, implicit $mode, implicit $exec |
| %1727:sreg_64 = nofpexcept V_CMP_U_F32_e64 0, %1666, 0, %1666, 0, implicit $mode, implicit $exec |
| %1728:sreg_64_xexec = S_OR_B64 %1727, %1667, implicit-def dead $scc |
| %1729:vgpr_32 = V_CNDMASK_B32_e64 0, %245.sub0, 0, %1666, %1728, implicit $exec |
| %1730:sreg_64_xexec = S_OR_B64 %1727, %1668, implicit-def dead $scc |
| %1731:vgpr_32 = V_CNDMASK_B32_e64 0, %245.sub1, 0, %1666, %1730, implicit $exec |
| %1732:sreg_64_xexec = S_OR_B64 %1727, %1669, implicit-def dead $scc |
| %1733:vgpr_32 = V_CNDMASK_B32_e64 0, %244.sub0, 0, %1666, %1732, implicit $exec |
| %1734:sreg_64_xexec = S_OR_B64 %1727, %1670, implicit-def dead $scc |
| %1735:vgpr_32 = V_CNDMASK_B32_e64 0, %244.sub1, 0, %1666, %1734, implicit $exec |
| %1736:sreg_64_xexec = S_OR_B64 %1727, %1671, implicit-def dead $scc |
| %1737:vgpr_32 = V_CNDMASK_B32_e64 0, %241.sub0, 0, %1666, %1736, implicit $exec |
| %1738:sreg_64_xexec = S_OR_B64 %1727, %1672, implicit-def dead $scc |
| %1739:vgpr_32 = V_CNDMASK_B32_e64 0, %241.sub1, 0, %1666, %1738, implicit $exec |
| %1740:sreg_64_xexec = S_OR_B64 %1727, %1673, implicit-def dead $scc |
| %1741:vgpr_32 = V_CNDMASK_B32_e64 0, %240.sub0, 0, %1666, %1740, implicit $exec |
| %1742:sreg_64_xexec = S_OR_B64 %1727, %1674, implicit-def dead $scc |
| %1743:vgpr_32 = V_CNDMASK_B32_e64 0, %240.sub1, 0, %1666, %1742, implicit $exec |
| %1744:sreg_64_xexec = S_OR_B64 %1727, %1675, implicit-def dead $scc |
| %1745:vgpr_32 = V_CNDMASK_B32_e64 0, %237.sub0, 0, %1666, %1744, implicit $exec |
| %1746:sreg_64_xexec = S_OR_B64 %1727, %1676, implicit-def dead $scc |
| %1747:vgpr_32 = V_CNDMASK_B32_e64 0, %237.sub1, 0, %1666, %1746, implicit $exec |
| %1748:sreg_64_xexec = S_OR_B64 %1727, %1677, implicit-def dead $scc |
| %1749:vgpr_32 = V_CNDMASK_B32_e64 0, %236.sub0, 0, %1666, %1748, implicit $exec |
| %1750:sreg_64_xexec = S_OR_B64 %1727, %1678, implicit-def dead $scc |
| %1751:vgpr_32 = V_CNDMASK_B32_e64 0, %236.sub1, 0, %1666, %1750, implicit $exec |
| %1752:sreg_64_xexec = S_OR_B64 %1727, %1679, implicit-def dead $scc |
| %1753:vgpr_32 = V_CNDMASK_B32_e64 0, %233.sub0, 0, %1666, %1752, implicit $exec |
| %1754:sreg_64_xexec = S_OR_B64 %1727, %1680, implicit-def dead $scc |
| %1755:vgpr_32 = V_CNDMASK_B32_e64 0, %233.sub1, 0, %1666, %1754, implicit $exec |
| %1756:sreg_64_xexec = S_OR_B64 %1727, %1681, implicit-def dead $scc |
| %1757:vgpr_32 = V_CNDMASK_B32_e64 0, %232.sub0, 0, %1666, %1756, implicit $exec |
| %1758:sreg_64_xexec = S_OR_B64 %1727, %1682, implicit-def dead $scc |
| %1759:vgpr_32 = V_CNDMASK_B32_e64 0, %232.sub1, 0, %1666, %1758, implicit $exec |
| %1760:sreg_64_xexec = S_OR_B64 %1727, %1683, implicit-def dead $scc |
| %1761:vgpr_32 = V_CNDMASK_B32_e64 0, %229.sub0, 0, %1666, %1760, implicit $exec |
| %1762:sreg_64_xexec = S_OR_B64 %1727, %1684, implicit-def dead $scc |
| %1763:vgpr_32 = V_CNDMASK_B32_e64 0, %229.sub1, 0, %1666, %1762, implicit $exec |
| %1764:sreg_64_xexec = S_OR_B64 %1727, %1685, implicit-def dead $scc |
| %1765:vgpr_32 = V_CNDMASK_B32_e64 0, %228.sub0, 0, %1666, %1764, implicit $exec |
| %1766:sreg_64_xexec = S_OR_B64 %1727, %1686, implicit-def dead $scc |
| %1767:vgpr_32 = V_CNDMASK_B32_e64 0, %228.sub1, 0, %1666, %1766, implicit $exec |
| %1768:sreg_64_xexec = S_OR_B64 %1727, %1687, implicit-def dead $scc |
| %1769:vgpr_32 = V_CNDMASK_B32_e64 0, %225.sub0, 0, %1666, %1768, implicit $exec |
| %1770:sreg_64_xexec = S_OR_B64 %1727, %1688, implicit-def dead $scc |
| %1771:vgpr_32 = V_CNDMASK_B32_e64 0, %225.sub1, 0, %1666, %1770, implicit $exec |
| %1772:sreg_64_xexec = S_OR_B64 %1727, %1689, implicit-def dead $scc |
| %1773:vgpr_32 = V_CNDMASK_B32_e64 0, %224.sub0, 0, %1666, %1772, implicit $exec |
| %1774:sreg_64_xexec = S_OR_B64 %1727, %1690, implicit-def dead $scc |
| %1775:vgpr_32 = V_CNDMASK_B32_e64 0, %224.sub1, 0, %1666, %1774, implicit $exec |
| %1776:sreg_64_xexec = S_OR_B64 %1727, %1691, implicit-def dead $scc |
| %1777:vgpr_32 = V_CNDMASK_B32_e64 0, %221.sub0, 0, %1666, %1776, implicit $exec |
| %1778:sreg_64_xexec = S_OR_B64 %1727, %1692, implicit-def dead $scc |
| %1779:vgpr_32 = V_CNDMASK_B32_e64 0, %221.sub1, 0, %1666, %1778, implicit $exec |
| %1780:sreg_64_xexec = S_OR_B64 %1727, %1693, implicit-def dead $scc |
| %1781:vgpr_32 = V_CNDMASK_B32_e64 0, %220.sub0, 0, %1666, %1780, implicit $exec |
| %1782:sreg_64_xexec = S_OR_B64 %1727, %1694, implicit-def dead $scc |
| %1783:vgpr_32 = V_CNDMASK_B32_e64 0, %220.sub1, 0, %1666, %1782, implicit $exec |
| %1784:sreg_64_xexec = S_OR_B64 %1727, %1695, implicit-def dead $scc |
| %1785:vgpr_32 = V_CNDMASK_B32_e64 0, %217.sub0, 0, %1666, %1784, implicit $exec |
| %1786:sreg_64_xexec = S_OR_B64 %1727, %1696, implicit-def dead $scc |
| %1787:vgpr_32 = V_CNDMASK_B32_e64 0, %217.sub1, 0, %1666, %1786, implicit $exec |
| %1788:sreg_64_xexec = S_OR_B64 %1727, %1697, implicit-def dead $scc |
| %1789:vgpr_32 = V_CNDMASK_B32_e64 0, %216.sub0, 0, %1666, %1788, implicit $exec |
| %1790:sreg_64_xexec = S_OR_B64 %1727, %1698, implicit-def dead $scc |
| %1791:vgpr_32 = V_CNDMASK_B32_e64 0, %216.sub1, 0, %1666, %1790, implicit $exec |
| %1792:sreg_64_xexec = S_OR_B64 %1727, %1699, implicit-def dead $scc |
| %1793:vgpr_32 = V_CNDMASK_B32_e64 0, %213.sub0, 0, %1666, %1792, implicit $exec |
| %1794:sreg_64_xexec = S_OR_B64 %1727, %1700, implicit-def dead $scc |
| %1795:vgpr_32 = V_CNDMASK_B32_e64 0, %213.sub1, 0, %1666, %1794, implicit $exec |
| %1796:sreg_64_xexec = S_OR_B64 %1727, %1701, implicit-def dead $scc |
| %1797:vgpr_32 = V_CNDMASK_B32_e64 0, %212.sub0, 0, %1666, %1796, implicit $exec |
| %1798:sreg_64_xexec = S_OR_B64 %1727, %1702, implicit-def dead $scc |
| %1799:vgpr_32 = V_CNDMASK_B32_e64 0, %212.sub1, 0, %1666, %1798, implicit $exec |
| %1800:sreg_64_xexec = S_OR_B64 %1727, %1703, implicit-def dead $scc |
| %1801:vgpr_32 = V_CNDMASK_B32_e64 0, %209.sub0, 0, %1666, %1800, implicit $exec |
| %1802:sreg_64_xexec = S_OR_B64 %1727, %1704, implicit-def dead $scc |
| %1803:vgpr_32 = V_CNDMASK_B32_e64 0, %209.sub1, 0, %1666, %1802, implicit $exec |
| %1804:sreg_64_xexec = S_OR_B64 %1727, %1705, implicit-def dead $scc |
| %1805:vgpr_32 = V_CNDMASK_B32_e64 0, %208.sub0, 0, %1666, %1804, implicit $exec |
| %1806:sreg_64_xexec = S_OR_B64 %1727, %1706, implicit-def dead $scc |
| %1807:vgpr_32 = V_CNDMASK_B32_e64 0, %208.sub1, 0, %1666, %1806, implicit $exec |
| %1808:sreg_64_xexec = S_OR_B64 %1727, %1707, implicit-def dead $scc |
| %1809:vgpr_32 = V_CNDMASK_B32_e64 0, %205.sub0, 0, %1666, %1808, implicit $exec |
| %1810:sreg_64_xexec = S_OR_B64 %1727, %1708, implicit-def dead $scc |
| %1811:vgpr_32 = V_CNDMASK_B32_e64 0, %205.sub1, 0, %1666, %1810, implicit $exec |
| %1812:sreg_64_xexec = S_OR_B64 %1727, %1709, implicit-def dead $scc |
| %1813:vgpr_32 = V_CNDMASK_B32_e64 0, %204.sub0, 0, %1666, %1812, implicit $exec |
| %1814:sreg_64_xexec = S_OR_B64 %1727, %1710, implicit-def dead $scc |
| %1815:vgpr_32 = V_CNDMASK_B32_e64 0, %204.sub1, 0, %1666, %1814, implicit $exec |
| %1816:sreg_64_xexec = S_OR_B64 %1727, %1711, implicit-def dead $scc |
| %1817:vgpr_32 = V_CNDMASK_B32_e64 0, %201.sub0, 0, %1666, %1816, implicit $exec |
| %1818:sreg_64_xexec = S_OR_B64 %1727, %1712, implicit-def dead $scc |
| %1819:vgpr_32 = V_CNDMASK_B32_e64 0, %201.sub1, 0, %1666, %1818, implicit $exec |
| %1820:sreg_64_xexec = S_OR_B64 %1727, %1713, implicit-def dead $scc |
| %1821:vgpr_32 = V_CNDMASK_B32_e64 0, %200.sub0, 0, %1666, %1820, implicit $exec |
| %1822:sreg_64_xexec = S_OR_B64 %1727, %1714, implicit-def dead $scc |
| %1823:vgpr_32 = V_CNDMASK_B32_e64 0, %200.sub1, 0, %1666, %1822, implicit $exec |
| %1824:sreg_64_xexec = S_OR_B64 %1727, %1715, implicit-def dead $scc |
| %1825:vgpr_32 = V_CNDMASK_B32_e64 0, %197.sub0, 0, %1666, %1824, implicit $exec |
| %1826:sreg_64_xexec = S_OR_B64 %1727, %1716, implicit-def dead $scc |
| %1827:vgpr_32 = V_CNDMASK_B32_e64 0, %197.sub1, 0, %1666, %1826, implicit $exec |
| %1828:sreg_64_xexec = S_OR_B64 %1727, %1717, implicit-def dead $scc |
| %1829:vgpr_32 = V_CNDMASK_B32_e64 0, %196.sub0, 0, %1666, %1828, implicit $exec |
| %1830:sreg_64_xexec = S_OR_B64 %1727, %1718, implicit-def dead $scc |
| %1831:vgpr_32 = V_CNDMASK_B32_e64 0, %196.sub1, 0, %1666, %1830, implicit $exec |
| %1832:sreg_64_xexec = S_OR_B64 %1727, %1719, implicit-def dead $scc |
| %1833:vgpr_32 = V_CNDMASK_B32_e64 0, %193.sub0, 0, %1666, %1832, implicit $exec |
| %1834:sreg_64_xexec = S_OR_B64 %1727, %1720, implicit-def dead $scc |
| %1835:vgpr_32 = V_CNDMASK_B32_e64 0, %193.sub1, 0, %1666, %1834, implicit $exec |
| %1836:sreg_64_xexec = S_OR_B64 %1727, %1721, implicit-def dead $scc |
| %1837:vgpr_32 = V_CNDMASK_B32_e64 0, %192.sub0, 0, %1666, %1836, implicit $exec |
| %1838:sreg_64_xexec = S_OR_B64 %1727, %1722, implicit-def dead $scc |
| %1839:vgpr_32 = V_CNDMASK_B32_e64 0, %192.sub1, 0, %1666, %1838, implicit $exec |
| %1840:sreg_64_xexec = S_OR_B64 %1727, %1723, implicit-def dead $scc |
| %1841:vgpr_32 = V_CNDMASK_B32_e64 0, %189.sub0, 0, %1666, %1840, implicit $exec |
| %1842:sreg_64_xexec = S_OR_B64 %1727, %1724, implicit-def dead $scc |
| %1843:vgpr_32 = V_CNDMASK_B32_e64 0, %189.sub1, 0, %1666, %1842, implicit $exec |
| %1844:sreg_64_xexec = S_OR_B64 %1727, %1725, implicit-def dead $scc |
| %1845:vgpr_32 = V_CNDMASK_B32_e64 0, %188.sub0, 0, %1666, %1844, implicit $exec |
| %1846:sreg_64_xexec = S_OR_B64 %1727, %1726, implicit-def dead $scc |
| %1847:vgpr_32 = V_CNDMASK_B32_e64 0, %188.sub1, 0, %1666, %1846, implicit $exec |
| %1561.sub1:vreg_64_align2 = COPY %1290.sub2 |
| %1848:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %1561, 8, %1509, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| undef %1849.sub0:vreg_64_align2 = COPY %1848.sub0 |
| undef %1849.sub0:vreg_64_align2 = V_MOV_B32_dpp %1849.sub0, %1849.sub0, 321, 15, 15, 0, implicit $exec |
| undef %1849.sub0:vreg_64_align2 = V_MOV_B32_dpp %1849.sub0, %1849.sub0, 27, 15, 15, 0, implicit $exec |
| %1850:vgpr_32 = nofpexcept V_SUB_F32_e32 %245.sub0, %1729, implicit $mode, implicit $exec |
| %1851:vgpr_32 = nofpexcept V_SUB_F32_e32 %245.sub1, %1731, implicit $mode, implicit $exec |
| %1852:vgpr_32 = nofpexcept V_SUB_F32_e32 %244.sub0, %1733, implicit $mode, implicit $exec |
| %1853:vgpr_32 = nofpexcept V_SUB_F32_e32 %244.sub1, %1735, implicit $mode, implicit $exec |
| %1854:vgpr_32 = nofpexcept V_SUB_F32_e32 %241.sub0, %1737, implicit $mode, implicit $exec |
| %1855:vgpr_32 = nofpexcept V_SUB_F32_e32 %241.sub1, %1739, implicit $mode, implicit $exec |
| %1856:vgpr_32 = nofpexcept V_SUB_F32_e32 %240.sub0, %1741, implicit $mode, implicit $exec |
| %1857:vgpr_32 = nofpexcept V_SUB_F32_e32 %240.sub1, %1743, implicit $mode, implicit $exec |
| %1858:vgpr_32 = nofpexcept V_SUB_F32_e32 %237.sub0, %1745, implicit $mode, implicit $exec |
| %1859:vgpr_32 = nofpexcept V_SUB_F32_e32 %237.sub1, %1747, implicit $mode, implicit $exec |
| %1860:vgpr_32 = nofpexcept V_SUB_F32_e32 %236.sub0, %1749, implicit $mode, implicit $exec |
| %1861:vgpr_32 = nofpexcept V_SUB_F32_e32 %236.sub1, %1751, implicit $mode, implicit $exec |
| %1862:vgpr_32 = nofpexcept V_SUB_F32_e32 %233.sub0, %1753, implicit $mode, implicit $exec |
| %1863:vgpr_32 = nofpexcept V_SUB_F32_e32 %233.sub1, %1755, implicit $mode, implicit $exec |
| %1864:vgpr_32 = nofpexcept V_SUB_F32_e32 %232.sub0, %1757, implicit $mode, implicit $exec |
| %1865:vgpr_32 = nofpexcept V_SUB_F32_e32 %232.sub1, %1759, implicit $mode, implicit $exec |
| %1866:vgpr_32 = nofpexcept V_SUB_F32_e32 %229.sub0, %1761, implicit $mode, implicit $exec |
| %1867:vgpr_32 = nofpexcept V_SUB_F32_e32 %229.sub1, %1763, implicit $mode, implicit $exec |
| %1868:vgpr_32 = nofpexcept V_SUB_F32_e32 %228.sub0, %1765, implicit $mode, implicit $exec |
| %1869:vgpr_32 = nofpexcept V_SUB_F32_e32 %228.sub1, %1767, implicit $mode, implicit $exec |
| %1870:vgpr_32 = nofpexcept V_SUB_F32_e32 %225.sub0, %1769, implicit $mode, implicit $exec |
| %1871:vgpr_32 = nofpexcept V_SUB_F32_e32 %225.sub1, %1771, implicit $mode, implicit $exec |
| %1872:vgpr_32 = nofpexcept V_SUB_F32_e32 %224.sub0, %1773, implicit $mode, implicit $exec |
| %1873:vgpr_32 = nofpexcept V_SUB_F32_e32 %224.sub1, %1775, implicit $mode, implicit $exec |
| %1874:vgpr_32 = nofpexcept V_SUB_F32_e32 %221.sub0, %1777, implicit $mode, implicit $exec |
| %1875:vgpr_32 = nofpexcept V_SUB_F32_e32 %221.sub1, %1779, implicit $mode, implicit $exec |
| %1876:vgpr_32 = nofpexcept V_SUB_F32_e32 %220.sub0, %1781, implicit $mode, implicit $exec |
| %1877:vgpr_32 = nofpexcept V_SUB_F32_e32 %220.sub1, %1783, implicit $mode, implicit $exec |
| %1878:vgpr_32 = nofpexcept V_SUB_F32_e32 %217.sub0, %1785, implicit $mode, implicit $exec |
| %1879:vgpr_32 = nofpexcept V_SUB_F32_e32 %217.sub1, %1787, implicit $mode, implicit $exec |
| %1880:vgpr_32 = nofpexcept V_SUB_F32_e32 %216.sub0, %1789, implicit $mode, implicit $exec |
| %1881:vgpr_32 = nofpexcept V_SUB_F32_e32 %216.sub1, %1791, implicit $mode, implicit $exec |
| %1882:vgpr_32 = nofpexcept V_SUB_F32_e32 %213.sub0, %1793, implicit $mode, implicit $exec |
| %1883:vgpr_32 = nofpexcept V_SUB_F32_e32 %213.sub1, %1795, implicit $mode, implicit $exec |
| %1884:vgpr_32 = nofpexcept V_SUB_F32_e32 %212.sub0, %1797, implicit $mode, implicit $exec |
| %1885:vgpr_32 = nofpexcept V_SUB_F32_e32 %212.sub1, %1799, implicit $mode, implicit $exec |
| %1886:vgpr_32 = nofpexcept V_SUB_F32_e32 %209.sub0, %1801, implicit $mode, implicit $exec |
| %1887:vgpr_32 = nofpexcept V_SUB_F32_e32 %209.sub1, %1803, implicit $mode, implicit $exec |
| %1888:vgpr_32 = nofpexcept V_SUB_F32_e32 %208.sub0, %1805, implicit $mode, implicit $exec |
| %1889:vgpr_32 = nofpexcept V_SUB_F32_e32 %208.sub1, %1807, implicit $mode, implicit $exec |
| %1890:vgpr_32 = nofpexcept V_SUB_F32_e32 %205.sub0, %1809, implicit $mode, implicit $exec |
| %1891:vgpr_32 = nofpexcept V_SUB_F32_e32 %205.sub1, %1811, implicit $mode, implicit $exec |
| %1892:vgpr_32 = nofpexcept V_SUB_F32_e32 %204.sub0, %1813, implicit $mode, implicit $exec |
| %1893:vgpr_32 = nofpexcept V_SUB_F32_e32 %204.sub1, %1815, implicit $mode, implicit $exec |
| %1894:vgpr_32 = nofpexcept V_SUB_F32_e32 %201.sub0, %1817, implicit $mode, implicit $exec |
| %1895:vgpr_32 = nofpexcept V_SUB_F32_e32 %201.sub1, %1819, implicit $mode, implicit $exec |
| %1896:vgpr_32 = nofpexcept V_SUB_F32_e32 %200.sub0, %1821, implicit $mode, implicit $exec |
| %1897:vgpr_32 = nofpexcept V_SUB_F32_e32 %200.sub1, %1823, implicit $mode, implicit $exec |
| %1898:vgpr_32 = nofpexcept V_SUB_F32_e32 %197.sub0, %1825, implicit $mode, implicit $exec |
| %1899:vgpr_32 = nofpexcept V_SUB_F32_e32 %197.sub1, %1827, implicit $mode, implicit $exec |
| %1900:vgpr_32 = nofpexcept V_SUB_F32_e32 %196.sub0, %1829, implicit $mode, implicit $exec |
| %1901:vgpr_32 = nofpexcept V_SUB_F32_e32 %196.sub1, %1831, implicit $mode, implicit $exec |
| %1902:vgpr_32 = nofpexcept V_SUB_F32_e32 %193.sub0, %1833, implicit $mode, implicit $exec |
| %1903:vgpr_32 = nofpexcept V_SUB_F32_e32 %193.sub1, %1835, implicit $mode, implicit $exec |
| %1904:vgpr_32 = nofpexcept V_SUB_F32_e32 %192.sub0, %1837, implicit $mode, implicit $exec |
| %1905:vgpr_32 = nofpexcept V_SUB_F32_e32 %192.sub1, %1839, implicit $mode, implicit $exec |
| %1906:vgpr_32 = nofpexcept V_SUB_F32_e32 %189.sub0, %1841, implicit $mode, implicit $exec |
| %1907:vgpr_32 = nofpexcept V_SUB_F32_e32 %189.sub1, %1843, implicit $mode, implicit $exec |
| %1908:vgpr_32 = nofpexcept V_SUB_F32_e32 %188.sub0, %1845, implicit $mode, implicit $exec |
| %1909:vgpr_32 = nofpexcept V_SUB_F32_e32 %188.sub1, %1847, implicit $mode, implicit $exec |
| undef %1910.sub0:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1850, implicit $mode, implicit $exec |
| undef %1911.sub0:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1851, implicit $mode, implicit $exec |
| undef %1912.sub0:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1852, implicit $mode, implicit $exec |
| undef %1913.sub0:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1853, implicit $mode, implicit $exec |
| %1596.sub1:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1854, implicit $mode, implicit $exec |
| %1597.sub1:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1855, implicit $mode, implicit $exec |
| %1598.sub1:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1856, implicit $mode, implicit $exec |
| %1599.sub1:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1857, implicit $mode, implicit $exec |
| %1910.sub1:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1858, implicit $mode, implicit $exec |
| %1911.sub1:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1859, implicit $mode, implicit $exec |
| %1912.sub1:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1860, implicit $mode, implicit $exec |
| %1913.sub1:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1861, implicit $mode, implicit $exec |
| %1596.sub2:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1862, implicit $mode, implicit $exec |
| %1597.sub2:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1863, implicit $mode, implicit $exec |
| %1598.sub2:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1864, implicit $mode, implicit $exec |
| %1599.sub2:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1865, implicit $mode, implicit $exec |
| %1910.sub2:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1866, implicit $mode, implicit $exec |
| %1911.sub2:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1867, implicit $mode, implicit $exec |
| %1912.sub2:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1868, implicit $mode, implicit $exec |
| %1913.sub2:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1869, implicit $mode, implicit $exec |
| %1596.sub3:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1870, implicit $mode, implicit $exec |
| %1597.sub3:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1871, implicit $mode, implicit $exec |
| %1598.sub3:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1872, implicit $mode, implicit $exec |
| %1599.sub3:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1873, implicit $mode, implicit $exec |
| %1910.sub3:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1874, implicit $mode, implicit $exec |
| %1911.sub3:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1875, implicit $mode, implicit $exec |
| %1912.sub3:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1876, implicit $mode, implicit $exec |
| %1913.sub3:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1877, implicit $mode, implicit $exec |
| undef %1914.sub0:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1878, implicit $mode, implicit $exec |
| undef %1915.sub0:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1879, implicit $mode, implicit $exec |
| undef %1916.sub0:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1880, implicit $mode, implicit $exec |
| undef %1917.sub0:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1881, implicit $mode, implicit $exec |
| undef %1918.sub0:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1882, implicit $mode, implicit $exec |
| undef %1919.sub0:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1883, implicit $mode, implicit $exec |
| undef %1920.sub0:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1884, implicit $mode, implicit $exec |
| undef %1921.sub0:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1885, implicit $mode, implicit $exec |
| %1914.sub1:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1886, implicit $mode, implicit $exec |
| %1915.sub1:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1887, implicit $mode, implicit $exec |
| %1916.sub1:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1888, implicit $mode, implicit $exec |
| %1917.sub1:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1889, implicit $mode, implicit $exec |
| %1918.sub1:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1890, implicit $mode, implicit $exec |
| %1919.sub1:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1891, implicit $mode, implicit $exec |
| %1920.sub1:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1892, implicit $mode, implicit $exec |
| %1921.sub1:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1893, implicit $mode, implicit $exec |
| %1914.sub2:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1894, implicit $mode, implicit $exec |
| %1915.sub2:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1895, implicit $mode, implicit $exec |
| %1916.sub2:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1896, implicit $mode, implicit $exec |
| %1917.sub2:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1897, implicit $mode, implicit $exec |
| %1918.sub2:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1898, implicit $mode, implicit $exec |
| %1919.sub2:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1899, implicit $mode, implicit $exec |
| %1920.sub2:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1900, implicit $mode, implicit $exec |
| %1921.sub2:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1901, implicit $mode, implicit $exec |
| %1914.sub3:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1902, implicit $mode, implicit $exec |
| %1915.sub3:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1903, implicit $mode, implicit $exec |
| %1916.sub3:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1904, implicit $mode, implicit $exec |
| %1917.sub3:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1905, implicit $mode, implicit $exec |
| %1918.sub3:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1906, implicit $mode, implicit $exec |
| %1919.sub3:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1907, implicit $mode, implicit $exec |
| %1920.sub3:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1908, implicit $mode, implicit $exec |
| %1921.sub3:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %1909, implicit $mode, implicit $exec |
| DS_WRITE_B128_gfx9 %37, %1596, 0, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %37, %1597, 16, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %37, %1598, 32, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %37, %1599, 48, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %37, %1910, 128, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %37, %1911, 144, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %37, %1912, 160, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %37, %1913, 176, 0, implicit $exec |
| WAVE_BARRIER |
| %1922:vreg_128_align2 = DS_READ_B128_gfx9 %150, 0, 0, implicit $exec |
| WAVE_BARRIER |
| DS_WRITE_B128_gfx9 %37, %1914, 0, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %37, %1915, 16, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %37, %1916, 32, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %37, %1917, 48, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %37, %1918, 128, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %37, %1919, 144, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %37, %1920, 160, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %37, %1921, 176, 0, implicit $exec |
| WAVE_BARRIER |
| %1923:vreg_128_align2 = DS_READ_B128_gfx9 %150, 0, 0, implicit $exec |
| S_WAITCNT 49279 |
| WAVE_BARRIER |
| %1282.sub1:sgpr_128 = COPY %1282.sub0 |
| %1924:vreg_64_align2 = COPY %1282.sub0_sub1 |
| DS_WRITE2ST64_B64_gfx9 %1637, %1604, %1924, 0, 8, 0, implicit $exec |
| DS_WRITE2ST64_B64_gfx9 %1637, %1924, %1924, 16, 24, 0, implicit $exec |
| DS_WRITE2ST64_B64_gfx9 %1637, %1924, %1924, 32, 40, 0, implicit $exec |
| DS_WRITE2ST64_B64_gfx9 %1637, %1924, %1924, 48, 56, 0, implicit $exec |
| DS_WRITE2ST64_B64_gfx9 %1638, %1605, %1924, 0, 8, 0, implicit $exec |
| DS_WRITE2ST64_B64_gfx9 %1638, %1924, %1924, 16, 24, 0, implicit $exec |
| DS_WRITE2ST64_B64_gfx9 %1638, %1924, %1924, 32, 40, 0, implicit $exec |
| DS_WRITE2ST64_B64_gfx9 %1638, %1924, %1924, 48, 56, 0, implicit $exec |
| DS_WRITE2ST64_B64_gfx9 %1639, %1606, %1924, 0, 8, 0, implicit $exec |
| DS_WRITE2ST64_B64_gfx9 %1639, %1924, %1924, 16, 24, 0, implicit $exec |
| DS_WRITE2ST64_B64_gfx9 %1639, %1924, %1924, 32, 40, 0, implicit $exec |
| DS_WRITE2ST64_B64_gfx9 %1639, %1924, %1924, 48, 56, 0, implicit $exec |
| DS_WRITE2ST64_B64_gfx9 %1640, %1642, %1924, 0, 8, 0, implicit $exec |
| DS_WRITE2ST64_B64_gfx9 %1640, %1924, %1924, 16, 24, 0, implicit $exec |
| DS_WRITE2ST64_B64_gfx9 %1640, %1924, %1924, 32, 40, 0, implicit $exec |
| DS_WRITE2ST64_B64_gfx9 %1640, %1924, %1924, 48, 56, 0, implicit $exec |
| DS_WRITE2ST64_B64_gfx9 %1643, %1924, %1924, 0, 8, 0, implicit $exec |
| DS_WRITE2ST64_B64_gfx9 %1643, %1924, %1924, 16, 24, 0, implicit $exec |
| DS_WRITE2ST64_B64_gfx9 %1643, %1924, %1924, 32, 40, 0, implicit $exec |
| DS_WRITE2ST64_B64_gfx9 %1643, %1924, %1924, 48, 56, 0, implicit $exec |
| DS_WRITE2ST64_B64_gfx9 %1644, %1924, %1924, 0, 8, 0, implicit $exec |
| DS_WRITE2ST64_B64_gfx9 %1644, %1924, %1924, 16, 24, 0, implicit $exec |
| DS_WRITE2ST64_B64_gfx9 %1644, %1924, %1924, 32, 40, 0, implicit $exec |
| DS_WRITE2ST64_B64_gfx9 %1644, %1924, %1924, 48, 56, 0, implicit $exec |
| DS_WRITE2ST64_B64_gfx9 %1645, %1924, %1924, 0, 8, 0, implicit $exec |
| DS_WRITE2ST64_B64_gfx9 %1645, %1924, %1924, 16, 24, 0, implicit $exec |
| DS_WRITE2ST64_B64_gfx9 %1645, %1924, %1924, 32, 40, 0, implicit $exec |
| DS_WRITE2ST64_B64_gfx9 %1645, %1924, %1924, 48, 56, 0, implicit $exec |
| DS_WRITE2ST64_B64_gfx9 %1646, %1924, %1924, 0, 8, 0, implicit $exec |
| DS_WRITE2ST64_B64_gfx9 %1646, %1924, %1924, 16, 24, 0, implicit $exec |
| DS_WRITE2ST64_B64_gfx9 %1646, %1924, %1924, 32, 40, 0, implicit $exec |
| DS_WRITE2ST64_B64_gfx9 %1646, %1924, %1924, 48, 56, 0, implicit $exec |
| S_WAITCNT 49279 |
| WAVE_BARRIER |
| undef %1925.sub0_sub1_sub2_sub3:av_192_align2 = DS_READ2_B64_gfx9 %169, 0, 16, 0, implicit $exec |
| %1926:vgpr_32 = V_ADD_U32_e32 4096, %169, implicit $exec |
| undef %1927.sub0_sub1_sub2_sub3:av_192_align2 = DS_READ2_B64_gfx9 %1926, 0, 16, 0, implicit $exec |
| %1928:vgpr_32 = V_ADD_U32_e32 8192, %169, implicit $exec |
| undef %1929.sub0_sub1_sub2_sub3:av_192_align2 = DS_READ2_B64_gfx9 %1928, 0, 16, 0, implicit $exec |
| %1930:vgpr_32 = V_ADD_U32_e32 12288, %169, implicit $exec |
| undef %1931.sub0_sub1_sub2_sub3:av_192_align2 = DS_READ2_B64_gfx9 %1930, 0, 16, 0, implicit $exec |
| %1932:vgpr_32 = V_ADD_U32_e32 16384, %169, implicit $exec |
| undef %1933.sub0_sub1_sub2_sub3:av_192_align2 = DS_READ2_B64_gfx9 %1932, 0, 16, 0, implicit $exec |
| %1934:vgpr_32 = V_ADD_U32_e32 20480, %169, implicit $exec |
| undef %1935.sub0_sub1_sub2_sub3:av_192_align2 = DS_READ2_B64_gfx9 %1934, 0, 16, 0, implicit $exec |
| %1936:vgpr_32 = V_ADD_U32_e32 24576, %169, implicit $exec |
| undef %1937.sub0_sub1_sub2_sub3:av_192_align2 = DS_READ2_B64_gfx9 %1936, 0, 16, 0, implicit $exec |
| %1938:vgpr_32 = V_ADD_U32_e32 28672, %169, implicit $exec |
| undef %1939.sub0_sub1_sub2_sub3:av_192_align2 = DS_READ2_B64_gfx9 %1938, 0, 16, 0, implicit $exec |
| undef %1940.sub2_sub3_sub4_sub5:av_192_align2 = DS_READ2_B64_gfx9 %170, 0, 16, 0, implicit $exec |
| %1941:vgpr_32 = V_ADD_U32_e32 4096, %170, implicit $exec |
| undef %1942.sub2_sub3_sub4_sub5:av_192_align2 = DS_READ2_B64_gfx9 %1941, 0, 16, 0, implicit $exec |
| %1943:vgpr_32 = V_ADD_U32_e32 8192, %170, implicit $exec |
| undef %1944.sub2_sub3_sub4_sub5:av_192_align2 = DS_READ2_B64_gfx9 %1943, 0, 16, 0, implicit $exec |
| %1945:vgpr_32 = V_ADD_U32_e32 12288, %170, implicit $exec |
| undef %1946.sub2_sub3_sub4_sub5:av_192_align2 = DS_READ2_B64_gfx9 %1945, 0, 16, 0, implicit $exec |
| %1947:vgpr_32 = V_ADD_U32_e32 16384, %170, implicit $exec |
| undef %1948.sub2_sub3_sub4_sub5:av_192_align2 = DS_READ2_B64_gfx9 %1947, 0, 16, 0, implicit $exec |
| %1949:vgpr_32 = V_ADD_U32_e32 20480, %170, implicit $exec |
| undef %1950.sub2_sub3_sub4_sub5:av_192_align2 = DS_READ2_B64_gfx9 %1949, 0, 16, 0, implicit $exec |
| %1951:vgpr_32 = V_ADD_U32_e32 24576, %170, implicit $exec |
| undef %1952.sub2_sub3_sub4_sub5:av_192_align2 = DS_READ2_B64_gfx9 %1951, 0, 16, 0, implicit $exec |
| %1953:vgpr_32 = V_ADD_U32_e32 28672, %170, implicit $exec |
| undef %1954.sub2_sub3_sub4_sub5:av_192_align2 = DS_READ2_B64_gfx9 %1953, 0, 16, 0, implicit $exec |
| undef %1955.sub0_sub1_sub2_sub3:av_192_align2 = DS_READ2_B64_gfx9 %171, 0, 16, 0, implicit $exec |
| %1956:vgpr_32 = V_ADD_U32_e32 4096, %171, implicit $exec |
| undef %1957.sub0_sub1_sub2_sub3:av_192_align2 = DS_READ2_B64_gfx9 %1956, 0, 16, 0, implicit $exec |
| %1958:vgpr_32 = V_ADD_U32_e32 8192, %171, implicit $exec |
| undef %1959.sub0_sub1_sub2_sub3:av_192_align2 = DS_READ2_B64_gfx9 %1958, 0, 16, 0, implicit $exec |
| %1960:vgpr_32 = V_ADD_U32_e32 12288, %171, implicit $exec |
| undef %1961.sub0_sub1_sub2_sub3:av_192_align2 = DS_READ2_B64_gfx9 %1960, 0, 16, 0, implicit $exec |
| %1962:vgpr_32 = V_ADD_U32_e32 16384, %171, implicit $exec |
| undef %1963.sub0_sub1_sub2_sub3:av_192_align2 = DS_READ2_B64_gfx9 %1962, 0, 16, 0, implicit $exec |
| %1964:vgpr_32 = V_ADD_U32_e32 20480, %171, implicit $exec |
| undef %1965.sub0_sub1_sub2_sub3:av_192_align2 = DS_READ2_B64_gfx9 %1964, 0, 16, 0, implicit $exec |
| %1966:vgpr_32 = V_ADD_U32_e32 24576, %171, implicit $exec |
| undef %1967.sub0_sub1_sub2_sub3:av_192_align2 = DS_READ2_B64_gfx9 %1966, 0, 16, 0, implicit $exec |
| %1968:vgpr_32 = V_ADD_U32_e32 28672, %171, implicit $exec |
| undef %1969.sub0_sub1_sub2_sub3:av_192_align2 = DS_READ2_B64_gfx9 %1968, 0, 16, 0, implicit $exec |
| undef %1970.sub2_sub3_sub4_sub5:av_192_align2 = DS_READ2_B64_gfx9 %172, 0, 16, 0, implicit $exec |
| %1971:vgpr_32 = V_ADD_U32_e32 4096, %172, implicit $exec |
| undef %1972.sub2_sub3_sub4_sub5:av_192_align2 = DS_READ2_B64_gfx9 %1971, 0, 16, 0, implicit $exec |
| %1973:vgpr_32 = V_ADD_U32_e32 8192, %172, implicit $exec |
| undef %1974.sub2_sub3_sub4_sub5:av_192_align2 = DS_READ2_B64_gfx9 %1973, 0, 16, 0, implicit $exec |
| %1975:vgpr_32 = V_ADD_U32_e32 12288, %172, implicit $exec |
| undef %1976.sub2_sub3_sub4_sub5:av_192_align2 = DS_READ2_B64_gfx9 %1975, 0, 16, 0, implicit $exec |
| %1977:vgpr_32 = V_ADD_U32_e32 16384, %172, implicit $exec |
| undef %1978.sub2_sub3_sub4_sub5:av_192_align2 = DS_READ2_B64_gfx9 %1977, 0, 16, 0, implicit $exec |
| %1979:vgpr_32 = V_ADD_U32_e32 20480, %172, implicit $exec |
| undef %1980.sub2_sub3_sub4_sub5:av_192_align2 = DS_READ2_B64_gfx9 %1979, 0, 16, 0, implicit $exec |
| %1981:vgpr_32 = V_ADD_U32_e32 24576, %172, implicit $exec |
| undef %1982.sub2_sub3_sub4_sub5:av_192_align2 = DS_READ2_B64_gfx9 %1981, 0, 16, 0, implicit $exec |
| %1983:vgpr_32 = V_ADD_U32_e32 28672, %172, implicit $exec |
| undef %1984.sub2_sub3_sub4_sub5:av_192_align2 = DS_READ2_B64_gfx9 %1983, 0, 16, 0, implicit $exec |
| S_WAITCNT 49279 |
| WAVE_BARRIER |
| %1985:vreg_128_align2 = DS_READ_B128_gfx9 %1647, 0, 0, implicit $exec |
| %1986:vreg_128_align2 = DS_READ_B128_gfx9 %1648, 0, 0, implicit $exec |
| %1987:vreg_128_align2 = DS_READ_B128_gfx9 %1649, 0, 0, implicit $exec |
| %1988:vreg_128_align2 = DS_READ_B128_gfx9 %1650, 0, 0, implicit $exec |
| %1989:vgpr_32 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %1989:vgpr_32 = V_DOT4C_I32_I8_e32 %38.sub0, %1985.sub0, %1989, implicit $exec |
| %1989:vgpr_32 = V_DOT4C_I32_I8_e32 %38.sub1, %1985.sub1, %1989, implicit $exec |
| %1989:vgpr_32 = V_DOT4C_I32_I8_e32 %38.sub2, %1985.sub2, %1989, implicit $exec |
| %1989:vgpr_32 = V_DOT4C_I32_I8_e32 %38.sub3, %1985.sub3, %1989, implicit $exec |
| %1990:vgpr_32 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %1990:vgpr_32 = V_DOT4C_I32_I8_e32 %38.sub0, %1986.sub0, %1990, implicit $exec |
| %1990:vgpr_32 = V_DOT4C_I32_I8_e32 %38.sub1, %1986.sub1, %1990, implicit $exec |
| %1990:vgpr_32 = V_DOT4C_I32_I8_e32 %38.sub2, %1986.sub2, %1990, implicit $exec |
| %1990:vgpr_32 = V_DOT4C_I32_I8_e32 %38.sub3, %1986.sub3, %1990, implicit $exec |
| %1991:vgpr_32 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %1991:vgpr_32 = V_DOT4C_I32_I8_e32 %38.sub0, %1987.sub0, %1991, implicit $exec |
| %1991:vgpr_32 = V_DOT4C_I32_I8_e32 %38.sub1, %1987.sub1, %1991, implicit $exec |
| %1991:vgpr_32 = V_DOT4C_I32_I8_e32 %38.sub2, %1987.sub2, %1991, implicit $exec |
| %1991:vgpr_32 = V_DOT4C_I32_I8_e32 %38.sub3, %1987.sub3, %1991, implicit $exec |
| %1992:vgpr_32 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %1992:vgpr_32 = V_DOT4C_I32_I8_e32 %38.sub0, %1988.sub0, %1992, implicit $exec |
| %1992:vgpr_32 = V_DOT4C_I32_I8_e32 %38.sub1, %1988.sub1, %1992, implicit $exec |
| %1992:vgpr_32 = V_DOT4C_I32_I8_e32 %38.sub2, %1988.sub2, %1992, implicit $exec |
| %1992:vgpr_32 = V_DOT4C_I32_I8_e32 %38.sub3, %1988.sub3, %1992, implicit $exec |
| %1656.sub1:sgpr_128 = COPY %1282.sub0 |
| %1656.sub2:sgpr_128 = COPY %1282.sub0 |
| %1656.sub3:sgpr_128 = COPY %1282.sub0 |
| %1993:av_128_align2 = COPY %1656 |
| DS_WRITE_B128_gfx9 %1288, %1993, 0, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1993, 256, 0, implicit $exec |
| %1658.sub1:sgpr_128 = COPY %1282.sub0 |
| %1658.sub2:sgpr_128 = COPY %1282.sub0 |
| %1658.sub3:sgpr_128 = COPY %1282.sub0 |
| %1994:av_128_align2 = COPY %1658 |
| DS_WRITE_B128_gfx9 %1288, %1994, 128, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1994, 384, 0, implicit $exec |
| WAVE_BARRIER |
| %1995:vgpr_32 = DS_READ_I8_gfx9 %1294, 0, 0, implicit $exec |
| %1996:vgpr_32 = DS_READ_I8_gfx9 %1294, 1, 0, implicit $exec |
| %1997:vgpr_32 = DS_READ_I8_gfx9 %1294, 2, 0, implicit $exec |
| %1998:vgpr_32 = DS_READ_I8_gfx9 %1294, 3, 0, implicit $exec |
| %1999:vgpr_32 = V_SUB_U32_e32 %1989, %1995, implicit $exec |
| %2000:vgpr_32 = V_SUB_U32_e32 %1990, %1995, implicit $exec |
| %2001:vgpr_32 = V_SUB_U32_e32 %1991, %1995, implicit $exec |
| %2002:vgpr_32 = V_SUB_U32_e32 %1992, %1995, implicit $exec |
| %2003:vgpr_32 = V_CVT_F32_I32_e32 %1999, implicit $mode, implicit $exec |
| %2004:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 %2003, implicit $mode, implicit $exec |
| %2005:vgpr_32 = V_CVT_F32_I32_e32 %2000, implicit $mode, implicit $exec |
| %2006:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 %2005, implicit $mode, implicit $exec |
| %2007:vgpr_32 = V_CVT_F32_I32_e32 %2001, implicit $mode, implicit $exec |
| %2008:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 %2007, implicit $mode, implicit $exec |
| %2009:vgpr_32 = V_CVT_F32_I32_e32 %2002, implicit $mode, implicit $exec |
| %2010:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 %2009, implicit $mode, implicit $exec |
| %2011:vgpr_32 = nofpexcept V_MUL_F16_e32 %1295.sub0, %2004, implicit $mode, implicit $exec |
| %2012:vgpr_32 = nofpexcept V_MUL_F16_e32 %1298.sub0, %2006, implicit $mode, implicit $exec |
| %2013:vgpr_32 = nofpexcept V_MUL_F16_e32 %1303.sub0, %2008, implicit $mode, implicit $exec |
| %2014:vgpr_32 = nofpexcept V_MUL_F16_e32 %1306.sub0, %2010, implicit $mode, implicit $exec |
| %2015:vgpr_32 = nofpexcept V_FMA_MIX_F32 8, %2011, 0, %1434, 1, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2016:vgpr_32 = nofpexcept V_FMA_MIX_F32 8, %2012, 0, %1434, 1, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2017:vgpr_32 = nofpexcept V_FMA_MIX_F32 8, %2013, 0, %1434, 1, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2018:vgpr_32 = nofpexcept V_FMA_MIX_F32 8, %2014, 0, %1434, 1, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2019:vgpr_32 = V_MAXIMUM3_F32_e64 0, %2015, 0, %2016, 0, %2016, 0, 0, implicit $exec |
| %2020:vgpr_32 = V_MAXIMUM3_F32_e64 0, %2019, 0, %2017, 0, %2018, 0, 0, implicit $exec |
| %2021:vgpr_32 = DS_BPERMUTE_B32 %1468, %2020, 0, implicit $exec |
| %2022:vgpr_32 = V_MAXIMUM3_F32_e64 0, %2020, 0, %2021, 0, %2021, 0, 0, implicit $exec |
| %2023:vgpr_32 = COPY %2022 |
| %2023:vgpr_32 = V_MOV_B32_dpp %2023, %2023, 296, 15, 15, 0, implicit $exec |
| %2024:vgpr_32 = V_MAXIMUM3_F32_e64 0, %2022, 0, %2023, 0, %2023, 0, 0, implicit $exec |
| %2025:vgpr_32 = COPY %2024 |
| %2025:vgpr_32 = V_MOV_B32_dpp %2025, %2025, 321, 15, 15, 0, implicit $exec |
| %2025:vgpr_32 = V_MOV_B32_dpp %2025, %2025, 27, 15, 15, 0, implicit $exec |
| %2026:vgpr_32 = V_MAXIMUM3_F32_e64 0, %2024, 0, %2025, 0, %2025, 0, 0, implicit $exec |
| %2027:vgpr_32 = COPY %2026 |
| %2027:vgpr_32 = V_MOV_B32_dpp %2027, %2027, 78, 15, 15, 0, implicit $exec |
| %2028:vgpr_32 = V_MAXIMUM3_F32_e64 0, %2026, 0, %2027, 0, %2027, 0, 0, implicit $exec |
| %2029:vgpr_32 = COPY %2028 |
| %2029:vgpr_32 = V_MOV_B32_dpp %2029, %2029, 177, 15, 15, 0, implicit $exec |
| %2030:vgpr_32 = V_MAXIMUM3_F32_e64 0, %2028, 0, %2029, 0, %2029, 0, 0, implicit $exec |
| %2031:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1520, 0, %2030, 0, implicit $mode, implicit $exec |
| %2032:sreg_64 = nofpexcept V_CMP_U_F32_e64 0, %2030, 0, %2030, 0, implicit $mode, implicit $exec |
| %2033:sreg_64_xexec = S_OR_B64 %2032, %2031, implicit-def dead $scc |
| %2034:vgpr_32 = V_CNDMASK_B32_e64 0, %1520, 0, %2030, %2033, implicit $exec |
| %2035:vgpr_32 = nofpexcept V_SUB_F32_e32 %2015, %2034, implicit $mode, implicit $exec |
| %2036:vgpr_32 = nofpexcept V_SUB_F32_e32 %2016, %2034, implicit $mode, implicit $exec |
| %2037:vgpr_32 = nofpexcept V_SUB_F32_e32 %2017, %2034, implicit $mode, implicit $exec |
| %2038:vgpr_32 = nofpexcept V_SUB_F32_e32 %2018, %2034, implicit $mode, implicit $exec |
| undef %2039.sub0:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %2035, implicit $mode, implicit $exec |
| %2039.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %2036, implicit $mode, implicit $exec |
| undef %2040.sub0:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %2037, implicit $mode, implicit $exec |
| %2040.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %2038, implicit $mode, implicit $exec |
| %2041:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %2039, 8, %2040, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2042:vgpr_32 = nofpexcept V_ADD_F32_e32 %2041.sub0, %2041.sub1, implicit $mode, implicit $exec |
| %2043:vgpr_32 = DS_BPERMUTE_B32 %1468, %2042, 0, implicit $exec |
| undef %2044.sub0:vreg_64_align2 = nofpexcept V_ADD_F32_e32 %2042, %2043, implicit $mode, implicit $exec |
| %2044.sub1:vreg_64_align2 = COPY %1282.sub0 |
| %1509.sub0:vreg_64_align2 = COPY %2044.sub0 |
| %1509.sub0:vreg_64_align2 = V_MOV_B32_dpp %1509.sub0, %1509.sub0, 296, 15, 15, 0, implicit $exec |
| %2045:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %2044, 8, %1509, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1849.sub1:vreg_64_align2 = COPY %1848.sub1 |
| %1849.sub1:vreg_64_align2 = V_MOV_B32_dpp %1849.sub1, %1849.sub1, 321, 15, 15, 0, implicit $exec |
| %1849.sub1:vreg_64_align2 = V_MOV_B32_dpp %1849.sub1, %1849.sub1, 27, 15, 15, 0, implicit $exec |
| %2046:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %1848, 8, %1849, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1849.sub0:vreg_64_align2 = COPY %2045.sub0 |
| %1849.sub0:vreg_64_align2 = V_MOV_B32_dpp %1849.sub0, %1849.sub0, 321, 15, 15, 0, implicit $exec |
| %1849.sub0:vreg_64_align2 = V_MOV_B32_dpp %1849.sub0, %1849.sub0, 27, 15, 15, 0, implicit $exec |
| undef %2047.sub0:vreg_64_align2 = COPY %2046.sub0 |
| %2047.sub0:vreg_64_align2 = V_MOV_B32_dpp %2047.sub0, %2047.sub0, 78, 15, 15, 0, implicit $exec |
| %2048:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %2045, 8, %1849, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2049:vreg_64_align2 = V_PK_MOV_B32 12, %2046, 8, %2048, 0, 0, 0, 0, 0, implicit $exec |
| %2049.sub0:vreg_64_align2 = V_MOV_B32_dpp %2049.sub0, %2049.sub0, 78, 15, 15, 0, implicit $exec |
| %2047.sub1:vreg_64_align2 = COPY %2049.sub0 |
| %2049.sub1:vreg_64_align2 = V_MOV_B32_dpp %2049.sub1, %2049.sub1, 78, 15, 15, 0, implicit $exec |
| undef %2050.sub0:vreg_64_align2 = COPY %2049.sub1 |
| %2050.sub1:vreg_64_align2 = COPY %2049.sub0 |
| %2051:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %2046, 8, %2047, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2052:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %2048, 8, %2050, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| undef %2053.sub0:vreg_64_align2 = COPY %2051.sub0 |
| undef %2053.sub0:vreg_64_align2 = V_MOV_B32_dpp %2053.sub0, %2053.sub0, 177, 15, 15, 0, implicit $exec |
| %2053.sub1:vreg_64_align2 = COPY %2051.sub1 |
| %2053.sub1:vreg_64_align2 = V_MOV_B32_dpp %2053.sub1, %2053.sub1, 177, 15, 15, 0, implicit $exec |
| undef %2054.sub0:vreg_64_align2 = COPY %2052.sub0 |
| %2054.sub0:vreg_64_align2 = V_MOV_B32_dpp %2054.sub0, %2054.sub0, 177, 15, 15, 0, implicit $exec |
| %2054.sub1:vreg_64_align2 = COPY %2053.sub1 |
| %2055:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %2051, 8, %2053, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2056:vgpr_32 = nofpexcept V_MUL_F32_e32 %1910.sub0, %313.sub0, implicit $mode, implicit $exec |
| %2057:vgpr_32 = nofpexcept V_MUL_F32_e32 %1911.sub0, %313.sub1, implicit $mode, implicit $exec |
| %2058:vgpr_32 = nofpexcept V_MUL_F32_e32 %1912.sub0, %312.sub0, implicit $mode, implicit $exec |
| %2059:vgpr_32 = nofpexcept V_MUL_F32_e32 %1913.sub0, %312.sub1, implicit $mode, implicit $exec |
| %2060:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %1596.sub0_sub1, 8, %1659, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2061:vgpr_32 = nofpexcept V_MUL_F32_e32 %1912.sub1, %308.sub0, implicit $mode, implicit $exec |
| %2062:vgpr_32 = nofpexcept V_MUL_F32_e32 %1913.sub1, %308.sub1, implicit $mode, implicit $exec |
| undef %2063.sub0:vreg_64_align2 = COPY %1598.sub1 |
| %2063.sub1:vreg_64_align2 = COPY %1598.sub2 |
| %2064:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %2063, 8, %1311, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| undef %2065.sub0:vreg_64_align2 = COPY %1599.sub1 |
| %2065.sub1:vreg_64_align2 = COPY %1599.sub2 |
| %2066:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %2065, 8, %306, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| undef %2067.sub0:vreg_64_align2 = COPY %1910.sub1 |
| %2067.sub1:vreg_64_align2 = COPY %1910.sub2 |
| %2068:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %2067, 8, %1312, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| undef %2069.sub0:vreg_64_align2 = COPY %1911.sub1 |
| %2069.sub1:vreg_64_align2 = COPY %1911.sub2 |
| %2070:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %2069, 8, %305, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2071:vgpr_32 = nofpexcept V_MUL_F32_e32 %1912.sub2, %304.sub0, implicit $mode, implicit $exec |
| %2072:vgpr_32 = nofpexcept V_MUL_F32_e32 %1913.sub2, %304.sub1, implicit $mode, implicit $exec |
| %2073:vgpr_32 = nofpexcept V_MUL_F32_e32 %1598.sub3, %302.sub0, implicit $mode, implicit $exec |
| %2074:vgpr_32 = nofpexcept V_MUL_F32_e32 %1599.sub3, %302.sub1, implicit $mode, implicit $exec |
| %2075:vgpr_32 = nofpexcept V_MUL_F32_e32 %1910.sub3, %301.sub0, implicit $mode, implicit $exec |
| %2076:vgpr_32 = nofpexcept V_MUL_F32_e32 %1911.sub3, %301.sub1, implicit $mode, implicit $exec |
| %2077:vgpr_32 = nofpexcept V_MUL_F32_e32 %1912.sub3, %300.sub0, implicit $mode, implicit $exec |
| %2078:vgpr_32 = nofpexcept V_MUL_F32_e32 %1913.sub3, %300.sub1, implicit $mode, implicit $exec |
| %2079:vgpr_32 = nofpexcept V_MUL_F32_e32 %1918.sub0, %297.sub0, implicit $mode, implicit $exec |
| %2080:vgpr_32 = nofpexcept V_MUL_F32_e32 %1919.sub0, %297.sub1, implicit $mode, implicit $exec |
| %2081:vgpr_32 = nofpexcept V_MUL_F32_e32 %1920.sub0, %296.sub0, implicit $mode, implicit $exec |
| %2082:vgpr_32 = nofpexcept V_MUL_F32_e32 %1921.sub0, %296.sub1, implicit $mode, implicit $exec |
| %2083:vgpr_32 = nofpexcept V_MUL_F32_e32 %1918.sub1, %293.sub0, implicit $mode, implicit $exec |
| %2084:vgpr_32 = nofpexcept V_MUL_F32_e32 %1918.sub2, %1310, implicit $mode, implicit $exec |
| undef %2085.sub0:vreg_64_align2 = COPY %1919.sub1 |
| %2085.sub1:vreg_64_align2 = COPY %1919.sub2 |
| %2086:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %2085, 8, %289, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| undef %2087.sub0:vreg_64_align2 = COPY %1920.sub1 |
| %2087.sub1:vreg_64_align2 = COPY %1920.sub2 |
| %2088:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %2087, 8, %1313, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| undef %2089.sub0:vreg_64_align2 = COPY %1921.sub1 |
| %2089.sub1:vreg_64_align2 = COPY %1921.sub2 |
| %2090:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %2089, 8, %288, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2091:vgpr_32 = nofpexcept V_MUL_F32_e32 %1918.sub3, %285.sub0, implicit $mode, implicit $exec |
| %2092:vgpr_32 = nofpexcept V_MUL_F32_e32 %1919.sub3, %285.sub1, implicit $mode, implicit $exec |
| %2093:vgpr_32 = nofpexcept V_MUL_F32_e32 %1920.sub3, %284.sub0, implicit $mode, implicit $exec |
| %2094:vgpr_32 = nofpexcept V_MUL_F32_e32 %1921.sub3, %284.sub1, implicit $mode, implicit $exec |
| %2095:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %2052, 8, %2054, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2096:vgpr_32 = nofpexcept V_ADD_F32_e32 %2056, %2055.sub1, implicit $mode, implicit $exec |
| %2097:vgpr_32 = nofpexcept V_ADD_F32_e32 %2057, %2055.sub1, implicit $mode, implicit $exec |
| %2098:vgpr_32 = nofpexcept V_ADD_F32_e32 %2058, %2055.sub1, implicit $mode, implicit $exec |
| %2099:vgpr_32 = nofpexcept V_ADD_F32_e32 %2059, %2055.sub1, implicit $mode, implicit $exec |
| %2100:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %2060, 8, %2055, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2101:vgpr_32 = nofpexcept V_ADD_F32_e32 %2061, %2055.sub1, implicit $mode, implicit $exec |
| %2102:vgpr_32 = nofpexcept V_ADD_F32_e32 %2062, %2055.sub1, implicit $mode, implicit $exec |
| %2103:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %2064, 12, %2055, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2104:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %2066, 12, %2055, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2105:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %2068, 12, %2055, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2106:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %2070, 12, %2055, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2107:vgpr_32 = nofpexcept V_ADD_F32_e32 %2071, %2055.sub1, implicit $mode, implicit $exec |
| %2108:vgpr_32 = nofpexcept V_ADD_F32_e32 %2072, %2055.sub1, implicit $mode, implicit $exec |
| %2109:vgpr_32 = nofpexcept V_ADD_F32_e32 %2073, %2055.sub1, implicit $mode, implicit $exec |
| %2110:vgpr_32 = nofpexcept V_ADD_F32_e32 %2074, %2055.sub1, implicit $mode, implicit $exec |
| %2111:vgpr_32 = nofpexcept V_ADD_F32_e32 %2075, %2055.sub1, implicit $mode, implicit $exec |
| %2112:vgpr_32 = nofpexcept V_ADD_F32_e32 %2076, %2055.sub1, implicit $mode, implicit $exec |
| %2113:vgpr_32 = nofpexcept V_ADD_F32_e32 %2077, %2055.sub1, implicit $mode, implicit $exec |
| %2114:vgpr_32 = nofpexcept V_ADD_F32_e32 %2078, %2055.sub1, implicit $mode, implicit $exec |
| %2115:vgpr_32 = nofpexcept V_ADD_F32_e32 %2079, %2055.sub1, implicit $mode, implicit $exec |
| %2116:vgpr_32 = nofpexcept V_ADD_F32_e32 %2080, %2055.sub1, implicit $mode, implicit $exec |
| %2117:vgpr_32 = nofpexcept V_ADD_F32_e32 %2081, %2055.sub1, implicit $mode, implicit $exec |
| %2118:vgpr_32 = nofpexcept V_ADD_F32_e32 %2082, %2055.sub1, implicit $mode, implicit $exec |
| %2119:vgpr_32 = nofpexcept V_ADD_F32_e32 %2083, %2055.sub1, implicit $mode, implicit $exec |
| %2120:vgpr_32 = nofpexcept V_ADD_F32_e32 %2084, %2055.sub1, implicit $mode, implicit $exec |
| %2121:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %2086, 12, %2055, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2122:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %2088, 12, %2055, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2123:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %2090, 12, %2055, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2124:vgpr_32 = nofpexcept V_ADD_F32_e32 %2091, %2055.sub1, implicit $mode, implicit $exec |
| %2125:vgpr_32 = nofpexcept V_ADD_F32_e32 %2092, %2055.sub1, implicit $mode, implicit $exec |
| %2126:vgpr_32 = nofpexcept V_ADD_F32_e32 %2093, %2055.sub1, implicit $mode, implicit $exec |
| %2127:vgpr_32 = nofpexcept V_ADD_F32_e32 %2094, %2055.sub1, implicit $mode, implicit $exec |
| %1940.sub0:av_192_align2 = COPY %1925.sub0 |
| %1940.sub1:av_192_align2 = COPY %1925.sub1 |
| %1970.sub0:av_192_align2 = COPY %1955.sub0 |
| %1970.sub1:av_192_align2 = COPY %1955.sub1 |
| %1925.sub4:av_192_align2 = COPY %1940.sub4 |
| %1925.sub5:av_192_align2 = COPY %1940.sub5 |
| %1955.sub4:av_192_align2 = COPY %1970.sub4 |
| %1955.sub5:av_192_align2 = COPY %1970.sub5 |
| %1942.sub0:av_192_align2 = COPY %1927.sub0 |
| %1942.sub1:av_192_align2 = COPY %1927.sub1 |
| %1972.sub0:av_192_align2 = COPY %1957.sub0 |
| %1972.sub1:av_192_align2 = COPY %1957.sub1 |
| %1927.sub4:av_192_align2 = COPY %1942.sub4 |
| %1927.sub5:av_192_align2 = COPY %1942.sub5 |
| %1957.sub4:av_192_align2 = COPY %1972.sub4 |
| %1957.sub5:av_192_align2 = COPY %1972.sub5 |
| %1944.sub0:av_192_align2 = COPY %1929.sub0 |
| %1944.sub1:av_192_align2 = COPY %1929.sub1 |
| %1974.sub0:av_192_align2 = COPY %1959.sub0 |
| %1954.sub0:av_192_align2 = COPY %1939.sub0 |
| %1954.sub1:av_192_align2 = COPY %1939.sub1 |
| %1984.sub0:av_192_align2 = COPY %1969.sub0 |
| %1984.sub1:av_192_align2 = COPY %1969.sub1 |
| %1939.sub4:av_192_align2 = COPY %1954.sub4 |
| %1939.sub5:av_192_align2 = COPY %1954.sub5 |
| %1969.sub4:av_192_align2 = COPY %1984.sub4 |
| %1969.sub5:av_192_align2 = COPY %1984.sub5 |
| undef %2128.sub2_sub3:vreg_128_align2 = nofpexcept V_PK_MUL_F32 8, %175.sub2_sub3, 0, %1922.sub0_sub1, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2128.sub0_sub1:vreg_128_align2 = nofpexcept V_PK_MUL_F32 8, %175.sub0_sub1, 0, %1922.sub0_sub1, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2129:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1616, %1940.sub0_sub1_sub2_sub3, %2128, 0, 0, 0, implicit $mode, implicit $exec |
| %2130:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1621, %1970.sub0_sub1_sub2_sub3, %2129, 0, 0, 0, implicit $mode, implicit $exec |
| %2131:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1626, %1925.sub2_sub3_sub4_sub5, %2130, 0, 0, 0, implicit $mode, implicit $exec |
| %2132:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1631, %1955.sub2_sub3_sub4_sub5, %2131, 0, 0, 0, implicit $mode, implicit $exec |
| undef %2133.sub2_sub3:vreg_128_align2 = nofpexcept V_PK_MUL_F32 8, %176.sub2_sub3, 12, %1922.sub0_sub1, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2133.sub0_sub1:vreg_128_align2 = nofpexcept V_PK_MUL_F32 8, %176.sub0_sub1, 12, %1922.sub0_sub1, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2134:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1616, %1942.sub0_sub1_sub2_sub3, %2133, 0, 0, 0, implicit $mode, implicit $exec |
| %2135:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1621, %1972.sub0_sub1_sub2_sub3, %2134, 0, 0, 0, implicit $mode, implicit $exec |
| %2136:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1626, %1927.sub2_sub3_sub4_sub5, %2135, 0, 0, 0, implicit $mode, implicit $exec |
| %2137:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1631, %1957.sub2_sub3_sub4_sub5, %2136, 0, 0, 0, implicit $mode, implicit $exec |
| undef %2138.sub2_sub3:vreg_128_align2 = nofpexcept V_PK_MUL_F32 8, %177.sub2_sub3, 0, %1922.sub2_sub3, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2138.sub0_sub1:vreg_128_align2 = nofpexcept V_PK_MUL_F32 8, %177.sub0_sub1, 0, %1922.sub2_sub3, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2139:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1616, %1944.sub0_sub1_sub2_sub3, %2138, 0, 0, 0, implicit $mode, implicit $exec |
| %2140:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1621, %1974.sub0_sub1_sub2_sub3, %2139, 0, 0, 0, implicit $mode, implicit $exec |
| %2141:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1626, %1929.sub2_sub3_sub4_sub5, %2140, 0, 0, 0, implicit $mode, implicit $exec |
| %2142:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1631, %1959.sub2_sub3_sub4_sub5, %2141, 0, 0, 0, implicit $mode, implicit $exec |
| undef %2143.sub0:vreg_64_align2 = COPY %1922.sub3 |
| undef %2144.sub2_sub3:vreg_128_align2 = nofpexcept V_PK_MUL_F32 8, %178.sub2_sub3, 0, %2143, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2144.sub0_sub1:vreg_128_align2 = nofpexcept V_PK_MUL_F32 8, %178.sub0_sub1, 0, %2143, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2145:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1616, %1946.sub0_sub1_sub2_sub3, %2144, 0, 0, 0, implicit $mode, implicit $exec |
| %2146:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1621, %1976.sub0_sub1_sub2_sub3, %2145, 0, 0, 0, implicit $mode, implicit $exec |
| %2147:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1626, %1931.sub2_sub3_sub4_sub5, %2146, 0, 0, 0, implicit $mode, implicit $exec |
| %2148:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1631, %1961.sub2_sub3_sub4_sub5, %2147, 0, 0, 0, implicit $mode, implicit $exec |
| undef %2149.sub2_sub3:vreg_128_align2 = nofpexcept V_PK_MUL_F32 8, %179.sub2_sub3, 0, %1923.sub0_sub1, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2149.sub0_sub1:vreg_128_align2 = nofpexcept V_PK_MUL_F32 8, %179.sub0_sub1, 0, %1923.sub0_sub1, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2150:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1616, %1948.sub0_sub1_sub2_sub3, %2149, 0, 0, 0, implicit $mode, implicit $exec |
| %2151:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1621, %1978.sub0_sub1_sub2_sub3, %2150, 0, 0, 0, implicit $mode, implicit $exec |
| %2152:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1626, %1933.sub2_sub3_sub4_sub5, %2151, 0, 0, 0, implicit $mode, implicit $exec |
| %2153:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1631, %1963.sub2_sub3_sub4_sub5, %2152, 0, 0, 0, implicit $mode, implicit $exec |
| undef %2154.sub2_sub3:vreg_128_align2 = nofpexcept V_PK_MUL_F32 8, %180.sub2_sub3, 12, %1923.sub0_sub1, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2154.sub0_sub1:vreg_128_align2 = nofpexcept V_PK_MUL_F32 8, %180.sub0_sub1, 12, %1923.sub0_sub1, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2155:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1616, %1950.sub0_sub1_sub2_sub3, %2154, 0, 0, 0, implicit $mode, implicit $exec |
| %2156:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1621, %1980.sub0_sub1_sub2_sub3, %2155, 0, 0, 0, implicit $mode, implicit $exec |
| %2157:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1626, %1935.sub2_sub3_sub4_sub5, %2156, 0, 0, 0, implicit $mode, implicit $exec |
| %2158:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1631, %1965.sub2_sub3_sub4_sub5, %2157, 0, 0, 0, implicit $mode, implicit $exec |
| undef %2159.sub2_sub3:vreg_128_align2 = nofpexcept V_PK_MUL_F32 8, %181.sub2_sub3, 0, %1923.sub2_sub3, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2159.sub0_sub1:vreg_128_align2 = nofpexcept V_PK_MUL_F32 8, %181.sub0_sub1, 0, %1923.sub2_sub3, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2160:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1616, %1952.sub0_sub1_sub2_sub3, %2159, 0, 0, 0, implicit $mode, implicit $exec |
| %2161:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1621, %1982.sub0_sub1_sub2_sub3, %2160, 0, 0, 0, implicit $mode, implicit $exec |
| %2162:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1626, %1937.sub2_sub3_sub4_sub5, %2161, 0, 0, 0, implicit $mode, implicit $exec |
| %2163:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1631, %1967.sub2_sub3_sub4_sub5, %2162, 0, 0, 0, implicit $mode, implicit $exec |
| undef %2164.sub0:vreg_64_align2 = COPY %1923.sub3 |
| undef %2165.sub2_sub3:vreg_128_align2 = nofpexcept V_PK_MUL_F32 8, %182.sub2_sub3, 0, %2164, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2165.sub0_sub1:vreg_128_align2 = nofpexcept V_PK_MUL_F32 8, %182.sub0_sub1, 0, %2164, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2166:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1616, %1954.sub0_sub1_sub2_sub3, %2165, 0, 0, 0, implicit $mode, implicit $exec |
| %2167:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1621, %1984.sub0_sub1_sub2_sub3, %2166, 0, 0, 0, implicit $mode, implicit $exec |
| %2168:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1626, %1939.sub2_sub3_sub4_sub5, %2167, 0, 0, 0, implicit $mode, implicit $exec |
| %2169:vreg_128_align2 = V_MFMA_F32_16X16X32_F16_vgprcd_e64 %1631, %1969.sub2_sub3_sub4_sub5, %2168, 0, 0, 0, implicit $mode, implicit $exec |
| %2170:vgpr_32 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %2170:vgpr_32 = V_DOT4C_I32_I8_e32 %39.sub0, %1985.sub0, %2170, implicit $exec |
| %2170:vgpr_32 = V_DOT4C_I32_I8_e32 %39.sub1, %1985.sub1, %2170, implicit $exec |
| %2170:vgpr_32 = V_DOT4C_I32_I8_e32 %39.sub2, %1985.sub2, %2170, implicit $exec |
| %2170:vgpr_32 = V_DOT4C_I32_I8_e32 %39.sub3, %1985.sub3, %2170, implicit $exec |
| %2171:vgpr_32 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %2171:vgpr_32 = V_DOT4C_I32_I8_e32 %39.sub0, %1986.sub0, %2171, implicit $exec |
| %2171:vgpr_32 = V_DOT4C_I32_I8_e32 %39.sub1, %1986.sub1, %2171, implicit $exec |
| %2171:vgpr_32 = V_DOT4C_I32_I8_e32 %39.sub2, %1986.sub2, %2171, implicit $exec |
| %2171:vgpr_32 = V_DOT4C_I32_I8_e32 %39.sub3, %1986.sub3, %2171, implicit $exec |
| %2172:vgpr_32 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %2172:vgpr_32 = V_DOT4C_I32_I8_e32 %39.sub0, %1987.sub0, %2172, implicit $exec |
| %2172:vgpr_32 = V_DOT4C_I32_I8_e32 %39.sub1, %1987.sub1, %2172, implicit $exec |
| %2172:vgpr_32 = V_DOT4C_I32_I8_e32 %39.sub2, %1987.sub2, %2172, implicit $exec |
| %2172:vgpr_32 = V_DOT4C_I32_I8_e32 %39.sub3, %1987.sub3, %2172, implicit $exec |
| %2173:vgpr_32 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %2173:vgpr_32 = V_DOT4C_I32_I8_e32 %39.sub0, %1988.sub0, %2173, implicit $exec |
| %2173:vgpr_32 = V_DOT4C_I32_I8_e32 %39.sub1, %1988.sub1, %2173, implicit $exec |
| %2173:vgpr_32 = V_DOT4C_I32_I8_e32 %39.sub2, %1988.sub2, %2173, implicit $exec |
| %2173:vgpr_32 = V_DOT4C_I32_I8_e32 %39.sub3, %1988.sub3, %2173, implicit $exec |
| %2174:vgpr_32 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %2174:vgpr_32 = V_DOT4C_I32_I8_e32 %40.sub0, %1985.sub0, %2174, implicit $exec |
| %2174:vgpr_32 = V_DOT4C_I32_I8_e32 %40.sub1, %1985.sub1, %2174, implicit $exec |
| %2174:vgpr_32 = V_DOT4C_I32_I8_e32 %40.sub2, %1985.sub2, %2174, implicit $exec |
| %2174:vgpr_32 = V_DOT4C_I32_I8_e32 %40.sub3, %1985.sub3, %2174, implicit $exec |
| %2175:vgpr_32 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %2175:vgpr_32 = V_DOT4C_I32_I8_e32 %40.sub0, %1986.sub0, %2175, implicit $exec |
| %2175:vgpr_32 = V_DOT4C_I32_I8_e32 %40.sub1, %1986.sub1, %2175, implicit $exec |
| %2175:vgpr_32 = V_DOT4C_I32_I8_e32 %40.sub2, %1986.sub2, %2175, implicit $exec |
| %2175:vgpr_32 = V_DOT4C_I32_I8_e32 %40.sub3, %1986.sub3, %2175, implicit $exec |
| %2176:vgpr_32 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %2176:vgpr_32 = V_DOT4C_I32_I8_e32 %40.sub0, %1987.sub0, %2176, implicit $exec |
| %2176:vgpr_32 = V_DOT4C_I32_I8_e32 %40.sub1, %1987.sub1, %2176, implicit $exec |
| %2176:vgpr_32 = V_DOT4C_I32_I8_e32 %40.sub2, %1987.sub2, %2176, implicit $exec |
| %2176:vgpr_32 = V_DOT4C_I32_I8_e32 %40.sub3, %1987.sub3, %2176, implicit $exec |
| %2177:vgpr_32 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %2177:vgpr_32 = V_DOT4C_I32_I8_e32 %40.sub0, %1988.sub0, %2177, implicit $exec |
| %2177:vgpr_32 = V_DOT4C_I32_I8_e32 %40.sub1, %1988.sub1, %2177, implicit $exec |
| %2177:vgpr_32 = V_DOT4C_I32_I8_e32 %40.sub2, %1988.sub2, %2177, implicit $exec |
| %2177:vgpr_32 = V_DOT4C_I32_I8_e32 %40.sub3, %1988.sub3, %2177, implicit $exec |
| %2178:vgpr_32 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %2178:vgpr_32 = V_DOT4C_I32_I8_e32 %41.sub0, %1985.sub0, %2178, implicit $exec |
| %2178:vgpr_32 = V_DOT4C_I32_I8_e32 %41.sub1, %1985.sub1, %2178, implicit $exec |
| %2178:vgpr_32 = V_DOT4C_I32_I8_e32 %41.sub2, %1985.sub2, %2178, implicit $exec |
| %2178:vgpr_32 = V_DOT4C_I32_I8_e32 %41.sub3, %1985.sub3, %2178, implicit $exec |
| %2179:vgpr_32 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %2179:vgpr_32 = V_DOT4C_I32_I8_e32 %41.sub0, %1986.sub0, %2179, implicit $exec |
| %2179:vgpr_32 = V_DOT4C_I32_I8_e32 %41.sub1, %1986.sub1, %2179, implicit $exec |
| %2179:vgpr_32 = V_DOT4C_I32_I8_e32 %41.sub2, %1986.sub2, %2179, implicit $exec |
| %2179:vgpr_32 = V_DOT4C_I32_I8_e32 %41.sub3, %1986.sub3, %2179, implicit $exec |
| %2180:vgpr_32 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %2180:vgpr_32 = V_DOT4C_I32_I8_e32 %41.sub0, %1987.sub0, %2180, implicit $exec |
| %2180:vgpr_32 = V_DOT4C_I32_I8_e32 %41.sub1, %1987.sub1, %2180, implicit $exec |
| %2180:vgpr_32 = V_DOT4C_I32_I8_e32 %41.sub2, %1987.sub2, %2180, implicit $exec |
| %2180:vgpr_32 = V_DOT4C_I32_I8_e32 %41.sub3, %1987.sub3, %2180, implicit $exec |
| %2181:vgpr_32 = AV_MOV_B32_IMM_PSEUDO 0, implicit $exec |
| %2181:vgpr_32 = V_DOT4C_I32_I8_e32 %41.sub0, %1988.sub0, %2181, implicit $exec |
| %2181:vgpr_32 = V_DOT4C_I32_I8_e32 %41.sub1, %1988.sub1, %2181, implicit $exec |
| %2181:vgpr_32 = V_DOT4C_I32_I8_e32 %41.sub2, %1988.sub2, %2181, implicit $exec |
| %2181:vgpr_32 = V_DOT4C_I32_I8_e32 %41.sub3, %1988.sub3, %2181, implicit $exec |
| WAVE_BARRIER |
| DS_WRITE_B128_gfx9 %1288, %1309, 0, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1309, 256, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1309, 128, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1309, 384, 0, implicit $exec |
| WAVE_BARRIER |
| WAVE_BARRIER |
| DS_WRITE_B128_gfx9 %1288, %1309, 0, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1309, 256, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1309, 128, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1309, 384, 0, implicit $exec |
| WAVE_BARRIER |
| WAVE_BARRIER |
| DS_WRITE_B128_gfx9 %1288, %1309, 0, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1309, 256, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1309, 128, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %1288, %1309, 384, 0, implicit $exec |
| WAVE_BARRIER |
| %2182:vgpr_32 = V_SUB_U32_e32 %2170, %1996, implicit $exec |
| %2183:vgpr_32 = V_SUB_U32_e32 %2171, %1996, implicit $exec |
| %2184:vgpr_32 = V_SUB_U32_e32 %2172, %1996, implicit $exec |
| %2185:vgpr_32 = V_SUB_U32_e32 %2173, %1996, implicit $exec |
| %2186:vgpr_32 = V_SUB_U32_e32 %2174, %1997, implicit $exec |
| %2187:vgpr_32 = V_SUB_U32_e32 %2175, %1997, implicit $exec |
| %2188:vgpr_32 = V_SUB_U32_e32 %2176, %1997, implicit $exec |
| %2189:vgpr_32 = V_SUB_U32_e32 %2177, %1997, implicit $exec |
| %2190:vgpr_32 = V_SUB_U32_e32 %2178, %1998, implicit $exec |
| %2191:vgpr_32 = V_SUB_U32_e32 %2179, %1998, implicit $exec |
| %2192:vgpr_32 = V_SUB_U32_e32 %2180, %1998, implicit $exec |
| %2193:vgpr_32 = V_SUB_U32_e32 %2181, %1998, implicit $exec |
| %2194:vgpr_32 = V_CVT_F32_I32_e32 %2182, implicit $mode, implicit $exec |
| %2195:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 %2194, implicit $mode, implicit $exec |
| %2196:vgpr_32 = V_CVT_F32_I32_e32 %2183, implicit $mode, implicit $exec |
| %2197:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 %2196, implicit $mode, implicit $exec |
| %2198:vgpr_32 = V_CVT_F32_I32_e32 %2184, implicit $mode, implicit $exec |
| %2199:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 %2198, implicit $mode, implicit $exec |
| %2200:vgpr_32 = V_CVT_F32_I32_e32 %2185, implicit $mode, implicit $exec |
| %2201:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 %2200, implicit $mode, implicit $exec |
| %2202:vgpr_32 = V_CVT_F32_I32_e32 %2186, implicit $mode, implicit $exec |
| %2203:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 %2202, implicit $mode, implicit $exec |
| %2204:vgpr_32 = V_CVT_F32_I32_e32 %2187, implicit $mode, implicit $exec |
| %2205:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 %2204, implicit $mode, implicit $exec |
| %2206:vgpr_32 = V_CVT_F32_I32_e32 %2188, implicit $mode, implicit $exec |
| %2207:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 %2206, implicit $mode, implicit $exec |
| %2208:vgpr_32 = V_CVT_F32_I32_e32 %2189, implicit $mode, implicit $exec |
| %2209:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 %2208, implicit $mode, implicit $exec |
| %2210:vgpr_32 = V_CVT_F32_I32_e32 %2190, implicit $mode, implicit $exec |
| %2211:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 %2210, implicit $mode, implicit $exec |
| %2212:vgpr_32 = V_CVT_F32_I32_e32 %2191, implicit $mode, implicit $exec |
| %2213:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 %2212, implicit $mode, implicit $exec |
| %2214:vgpr_32 = V_CVT_F32_I32_e32 %2192, implicit $mode, implicit $exec |
| %2215:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 %2214, implicit $mode, implicit $exec |
| %2216:vgpr_32 = V_CVT_F32_I32_e32 %2193, implicit $mode, implicit $exec |
| %2217:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 %2216, implicit $mode, implicit $exec |
| %2218:vgpr_32 = nofpexcept V_MUL_F16_e32 %1296, %2195, implicit $mode, implicit $exec |
| %2219:vgpr_32 = nofpexcept V_MUL_F16_e32 %1299, %2197, implicit $mode, implicit $exec |
| %2220:vgpr_32 = nofpexcept V_MUL_F16_e32 %1304, %2199, implicit $mode, implicit $exec |
| %2221:vgpr_32 = nofpexcept V_MUL_F16_e32 %1307, %2201, implicit $mode, implicit $exec |
| %2222:vgpr_32 = nofpexcept V_MUL_F16_e32 %1295.sub1, %2203, implicit $mode, implicit $exec |
| %2223:vgpr_32 = nofpexcept V_MUL_F16_e32 %1298.sub1, %2205, implicit $mode, implicit $exec |
| %2224:vgpr_32 = nofpexcept V_MUL_F16_e32 %1303.sub1, %2207, implicit $mode, implicit $exec |
| %2225:vgpr_32 = nofpexcept V_MUL_F16_e32 %1306.sub1, %2209, implicit $mode, implicit $exec |
| %2226:vgpr_32 = nofpexcept V_MUL_F16_e32 %1297, %2211, implicit $mode, implicit $exec |
| %2227:vgpr_32 = nofpexcept V_MUL_F16_e32 %1300, %2213, implicit $mode, implicit $exec |
| %2228:vgpr_32 = nofpexcept V_MUL_F16_e32 %1305, %2215, implicit $mode, implicit $exec |
| %2229:vgpr_32 = nofpexcept V_MUL_F16_e32 %1308, %2217, implicit $mode, implicit $exec |
| %2230:vgpr_32 = nofpexcept V_FMA_MIX_F32 8, %2218, 0, %1434, 1, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2231:vgpr_32 = nofpexcept V_FMA_MIX_F32 8, %2219, 0, %1434, 1, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2232:vgpr_32 = nofpexcept V_FMA_MIX_F32 8, %2220, 0, %1434, 1, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2233:vgpr_32 = nofpexcept V_FMA_MIX_F32 8, %2221, 0, %1434, 1, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2234:vgpr_32 = nofpexcept V_FMA_MIX_F32 8, %2222, 0, %1434, 1, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2235:vgpr_32 = nofpexcept V_FMA_MIX_F32 8, %2223, 0, %1434, 1, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2236:vgpr_32 = nofpexcept V_FMA_MIX_F32 8, %2224, 0, %1434, 1, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2237:vgpr_32 = nofpexcept V_FMA_MIX_F32 8, %2225, 0, %1434, 1, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2238:vgpr_32 = nofpexcept V_FMA_MIX_F32 8, %2226, 0, %1434, 1, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2239:vgpr_32 = nofpexcept V_FMA_MIX_F32 8, %2227, 0, %1434, 1, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2240:vgpr_32 = nofpexcept V_FMA_MIX_F32 8, %2228, 0, %1434, 1, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2241:vgpr_32 = nofpexcept V_FMA_MIX_F32 8, %2229, 0, %1434, 1, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2242:vgpr_32 = V_CNDMASK_B32_e64 0, %1451, 0, %2238, %1283, implicit $exec |
| %2243:vgpr_32 = V_CNDMASK_B32_e64 0, %1451, 0, %2239, %1283, implicit $exec |
| %2244:vgpr_32 = V_CNDMASK_B32_e64 0, %1451, 0, %2240, %1283, implicit $exec |
| %2245:vgpr_32 = V_CNDMASK_B32_e64 0, %1451, 0, %2241, %1283, implicit $exec |
| %2246:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, %2238, %1283, implicit $exec |
| %2247:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, %2239, %1283, implicit $exec |
| %2248:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, %2240, %1283, implicit $exec |
| %2249:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, %2241, %1283, implicit $exec |
| %2250:vgpr_32 = V_MAXIMUM3_F32_e64 0, %2230, 0, %2231, 0, %2231, 0, 0, implicit $exec |
| %2251:vgpr_32 = V_MAXIMUM3_F32_e64 0, %2250, 0, %2232, 0, %2233, 0, 0, implicit $exec |
| %2252:vgpr_32 = V_MAXIMUM3_F32_e64 0, %2234, 0, %2235, 0, %2235, 0, 0, implicit $exec |
| %2253:vgpr_32 = V_MAXIMUM3_F32_e64 0, %2252, 0, %2236, 0, %2237, 0, 0, implicit $exec |
| %2254:vgpr_32 = V_MAXIMUM3_F32_e64 0, %2246, 0, %2247, 0, %2247, 0, 0, implicit $exec |
| %2255:vgpr_32 = V_MAXIMUM3_F32_e64 0, %2254, 0, %2248, 0, %2249, 0, 0, implicit $exec |
| %2256:vgpr_32 = DS_BPERMUTE_B32 %1468, %2251, 0, implicit $exec |
| %2257:vgpr_32 = V_MAXIMUM3_F32_e64 0, %2251, 0, %2256, 0, %2256, 0, 0, implicit $exec |
| %2258:vgpr_32 = COPY %2257 |
| %2258:vgpr_32 = V_MOV_B32_dpp %2258, %2258, 296, 15, 15, 0, implicit $exec |
| %2259:vgpr_32 = V_MAXIMUM3_F32_e64 0, %2257, 0, %2258, 0, %2258, 0, 0, implicit $exec |
| %2260:vgpr_32 = COPY %2259 |
| %2260:vgpr_32 = V_MOV_B32_dpp %2260, %2260, 321, 15, 15, 0, implicit $exec |
| %2260:vgpr_32 = V_MOV_B32_dpp %2260, %2260, 27, 15, 15, 0, implicit $exec |
| %2261:vgpr_32 = V_MAXIMUM3_F32_e64 0, %2259, 0, %2260, 0, %2260, 0, 0, implicit $exec |
| %2262:vgpr_32 = COPY %2261 |
| %2262:vgpr_32 = V_MOV_B32_dpp %2262, %2262, 78, 15, 15, 0, implicit $exec |
| %2263:vgpr_32 = V_MAXIMUM3_F32_e64 0, %2261, 0, %2262, 0, %2262, 0, 0, implicit $exec |
| %2264:vgpr_32 = COPY %2263 |
| %2264:vgpr_32 = V_MOV_B32_dpp %2264, %2264, 177, 15, 15, 0, implicit $exec |
| %2265:vgpr_32 = V_MAXIMUM3_F32_e64 0, %2263, 0, %2264, 0, %2264, 0, 0, implicit $exec |
| %2266:vgpr_32 = DS_BPERMUTE_B32 %1468, %2253, 0, implicit $exec |
| %2267:vgpr_32 = V_MAXIMUM3_F32_e64 0, %2253, 0, %2266, 0, %2266, 0, 0, implicit $exec |
| %2268:vgpr_32 = COPY %2267 |
| %2268:vgpr_32 = V_MOV_B32_dpp %2268, %2268, 296, 15, 15, 0, implicit $exec |
| %2269:vgpr_32 = V_MAXIMUM3_F32_e64 0, %2267, 0, %2268, 0, %2268, 0, 0, implicit $exec |
| %2270:vgpr_32 = COPY %2269 |
| %2270:vgpr_32 = V_MOV_B32_dpp %2270, %2270, 321, 15, 15, 0, implicit $exec |
| %2270:vgpr_32 = V_MOV_B32_dpp %2270, %2270, 27, 15, 15, 0, implicit $exec |
| %2271:vgpr_32 = V_MAXIMUM3_F32_e64 0, %2269, 0, %2270, 0, %2270, 0, 0, implicit $exec |
| %2272:vgpr_32 = COPY %2271 |
| %2272:vgpr_32 = V_MOV_B32_dpp %2272, %2272, 78, 15, 15, 0, implicit $exec |
| %2273:vgpr_32 = V_MAXIMUM3_F32_e64 0, %2271, 0, %2272, 0, %2272, 0, 0, implicit $exec |
| %2274:vgpr_32 = COPY %2273 |
| %2274:vgpr_32 = V_MOV_B32_dpp %2274, %2274, 177, 15, 15, 0, implicit $exec |
| %2275:vgpr_32 = V_MAXIMUM3_F32_e64 0, %2273, 0, %2274, 0, %2274, 0, 0, implicit $exec |
| %2276:vgpr_32 = DS_BPERMUTE_B32 %1468, %2255, 0, implicit $exec |
| %2277:vgpr_32 = V_MAXIMUM3_F32_e64 0, %2255, 0, %2276, 0, %2276, 0, 0, implicit $exec |
| %2278:vgpr_32 = COPY %2277 |
| %2278:vgpr_32 = V_MOV_B32_dpp %2278, %2278, 296, 15, 15, 0, implicit $exec |
| %2279:vgpr_32 = V_MAXIMUM3_F32_e64 0, %2277, 0, %2278, 0, %2278, 0, 0, implicit $exec |
| %2280:vgpr_32 = COPY %2279 |
| %2280:vgpr_32 = V_MOV_B32_dpp %2280, %2280, 321, 15, 15, 0, implicit $exec |
| %2280:vgpr_32 = V_MOV_B32_dpp %2280, %2280, 27, 15, 15, 0, implicit $exec |
| %2281:vgpr_32 = V_MAXIMUM3_F32_e64 0, %2279, 0, %2280, 0, %2280, 0, 0, implicit $exec |
| %2282:vgpr_32 = COPY %2281 |
| %2282:vgpr_32 = V_MOV_B32_dpp %2282, %2282, 78, 15, 15, 0, implicit $exec |
| %2283:vgpr_32 = V_MAXIMUM3_F32_e64 0, %2281, 0, %2282, 0, %2282, 0, 0, implicit $exec |
| %2284:vgpr_32 = COPY %2283 |
| %2284:vgpr_32 = V_MOV_B32_dpp %2284, %2284, 177, 15, 15, 0, implicit $exec |
| %2285:vgpr_32 = V_MAXIMUM3_F32_e64 0, %2283, 0, %2284, 0, %2284, 0, 0, implicit $exec |
| %2286:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1522, 0, %2265, 0, implicit $mode, implicit $exec |
| %2287:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1533.sub0, 0, %2275, 0, implicit $mode, implicit $exec |
| %2288:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1533.sub1, 0, %2285, 0, implicit $mode, implicit $exec |
| %2289:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1729, 0, %1666, 0, implicit $mode, implicit $exec |
| %2290:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1731, 0, %1666, 0, implicit $mode, implicit $exec |
| %2291:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1733, 0, %1666, 0, implicit $mode, implicit $exec |
| %2292:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1735, 0, %1666, 0, implicit $mode, implicit $exec |
| %2293:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1737, 0, %1666, 0, implicit $mode, implicit $exec |
| %2294:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1739, 0, %1666, 0, implicit $mode, implicit $exec |
| %2295:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1741, 0, %1666, 0, implicit $mode, implicit $exec |
| %2296:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1743, 0, %1666, 0, implicit $mode, implicit $exec |
| %2297:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1745, 0, %1666, 0, implicit $mode, implicit $exec |
| %2298:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1747, 0, %1666, 0, implicit $mode, implicit $exec |
| %2299:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1749, 0, %1666, 0, implicit $mode, implicit $exec |
| %2300:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1751, 0, %1666, 0, implicit $mode, implicit $exec |
| %2301:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1753, 0, %1666, 0, implicit $mode, implicit $exec |
| %2302:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1755, 0, %1666, 0, implicit $mode, implicit $exec |
| %2303:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1757, 0, %1666, 0, implicit $mode, implicit $exec |
| %2304:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1759, 0, %1666, 0, implicit $mode, implicit $exec |
| %2305:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1761, 0, %1666, 0, implicit $mode, implicit $exec |
| %2306:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1763, 0, %1666, 0, implicit $mode, implicit $exec |
| %2307:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1765, 0, %1666, 0, implicit $mode, implicit $exec |
| %2308:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1767, 0, %1666, 0, implicit $mode, implicit $exec |
| %2309:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1769, 0, %1666, 0, implicit $mode, implicit $exec |
| %2310:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1771, 0, %1666, 0, implicit $mode, implicit $exec |
| %2311:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1773, 0, %1666, 0, implicit $mode, implicit $exec |
| %2312:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1775, 0, %1666, 0, implicit $mode, implicit $exec |
| %2313:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1777, 0, %1666, 0, implicit $mode, implicit $exec |
| %2314:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1779, 0, %1666, 0, implicit $mode, implicit $exec |
| %2315:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1781, 0, %1666, 0, implicit $mode, implicit $exec |
| %2316:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1783, 0, %1666, 0, implicit $mode, implicit $exec |
| %2317:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1785, 0, %1666, 0, implicit $mode, implicit $exec |
| %2318:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1787, 0, %1666, 0, implicit $mode, implicit $exec |
| %2319:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1789, 0, %1666, 0, implicit $mode, implicit $exec |
| %2320:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1791, 0, %1666, 0, implicit $mode, implicit $exec |
| %2321:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1793, 0, %1666, 0, implicit $mode, implicit $exec |
| %2322:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1795, 0, %1666, 0, implicit $mode, implicit $exec |
| %2323:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1797, 0, %1666, 0, implicit $mode, implicit $exec |
| %2324:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1799, 0, %1666, 0, implicit $mode, implicit $exec |
| %2325:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1801, 0, %1666, 0, implicit $mode, implicit $exec |
| %2326:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1803, 0, %1666, 0, implicit $mode, implicit $exec |
| %2327:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1805, 0, %1666, 0, implicit $mode, implicit $exec |
| %2328:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1807, 0, %1666, 0, implicit $mode, implicit $exec |
| %2329:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1809, 0, %1666, 0, implicit $mode, implicit $exec |
| %2330:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1811, 0, %1666, 0, implicit $mode, implicit $exec |
| %2331:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1813, 0, %1666, 0, implicit $mode, implicit $exec |
| %2332:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1815, 0, %1666, 0, implicit $mode, implicit $exec |
| %2333:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1817, 0, %1666, 0, implicit $mode, implicit $exec |
| %2334:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1819, 0, %1666, 0, implicit $mode, implicit $exec |
| %2335:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1821, 0, %1666, 0, implicit $mode, implicit $exec |
| %2336:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1823, 0, %1666, 0, implicit $mode, implicit $exec |
| %2337:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1825, 0, %1666, 0, implicit $mode, implicit $exec |
| %2338:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1827, 0, %1666, 0, implicit $mode, implicit $exec |
| %2339:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1829, 0, %1666, 0, implicit $mode, implicit $exec |
| %2340:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1831, 0, %1666, 0, implicit $mode, implicit $exec |
| %2341:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1833, 0, %1666, 0, implicit $mode, implicit $exec |
| %2342:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1835, 0, %1666, 0, implicit $mode, implicit $exec |
| %2343:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1837, 0, %1666, 0, implicit $mode, implicit $exec |
| %2344:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1839, 0, %1666, 0, implicit $mode, implicit $exec |
| %2345:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1841, 0, %1666, 0, implicit $mode, implicit $exec |
| %2346:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1843, 0, %1666, 0, implicit $mode, implicit $exec |
| %2347:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1845, 0, %1666, 0, implicit $mode, implicit $exec |
| %2348:sreg_64 = nofpexcept V_CMP_LE_F32_e64 0, %1847, 0, %1666, 0, implicit $mode, implicit $exec |
| %2349:sreg_64 = nofpexcept V_CMP_U_F32_e64 0, %2265, 0, %2265, 0, implicit $mode, implicit $exec |
| %2350:sreg_64 = nofpexcept V_CMP_U_F32_e64 0, %2275, 0, %2275, 0, implicit $mode, implicit $exec |
| %2351:sreg_64 = nofpexcept V_CMP_U_F32_e64 0, %2285, 0, %2285, 0, implicit $mode, implicit $exec |
| %2352:sreg_64_xexec = S_OR_B64 %2349, %2286, implicit-def dead $scc |
| %2353:vgpr_32 = V_CNDMASK_B32_e64 0, %1522, 0, %2265, %2352, implicit $exec |
| %2354:sreg_64_xexec = S_OR_B64 %2350, %2287, implicit-def dead $scc |
| %2355:vgpr_32 = V_CNDMASK_B32_e64 0, %1533.sub0, 0, %2275, %2354, implicit $exec |
| %2356:sreg_64_xexec = S_OR_B64 %2351, %2288, implicit-def dead $scc |
| %2357:vgpr_32 = V_CNDMASK_B32_e64 0, %1533.sub1, 0, %2285, %2356, implicit $exec |
| %2358:sreg_64_xexec = S_OR_B64 %1727, %2289, implicit-def dead $scc |
| %2359:vgpr_32 = V_CNDMASK_B32_e64 0, %1729, 0, %1666, %2358, implicit $exec |
| %2360:sreg_64_xexec = S_OR_B64 %1727, %2290, implicit-def dead $scc |
| %2361:vgpr_32 = V_CNDMASK_B32_e64 0, %1731, 0, %1666, %2360, implicit $exec |
| %2362:sreg_64_xexec = S_OR_B64 %1727, %2291, implicit-def dead $scc |
| %2363:vgpr_32 = V_CNDMASK_B32_e64 0, %1733, 0, %1666, %2362, implicit $exec |
| %2364:sreg_64_xexec = S_OR_B64 %1727, %2292, implicit-def dead $scc |
| %2365:vgpr_32 = V_CNDMASK_B32_e64 0, %1735, 0, %1666, %2364, implicit $exec |
| %2366:sreg_64_xexec = S_OR_B64 %1727, %2293, implicit-def dead $scc |
| %2367:vgpr_32 = V_CNDMASK_B32_e64 0, %1737, 0, %1666, %2366, implicit $exec |
| %2368:sreg_64_xexec = S_OR_B64 %1727, %2294, implicit-def dead $scc |
| %2369:vgpr_32 = V_CNDMASK_B32_e64 0, %1739, 0, %1666, %2368, implicit $exec |
| %2370:sreg_64_xexec = S_OR_B64 %1727, %2295, implicit-def dead $scc |
| %2371:vgpr_32 = V_CNDMASK_B32_e64 0, %1741, 0, %1666, %2370, implicit $exec |
| %2372:sreg_64_xexec = S_OR_B64 %1727, %2296, implicit-def dead $scc |
| %2373:vgpr_32 = V_CNDMASK_B32_e64 0, %1743, 0, %1666, %2372, implicit $exec |
| %2374:sreg_64_xexec = S_OR_B64 %1727, %2297, implicit-def dead $scc |
| %2375:vgpr_32 = V_CNDMASK_B32_e64 0, %1745, 0, %1666, %2374, implicit $exec |
| %2376:sreg_64_xexec = S_OR_B64 %1727, %2298, implicit-def dead $scc |
| %2377:vgpr_32 = V_CNDMASK_B32_e64 0, %1747, 0, %1666, %2376, implicit $exec |
| %2378:sreg_64_xexec = S_OR_B64 %1727, %2299, implicit-def dead $scc |
| %2379:vgpr_32 = V_CNDMASK_B32_e64 0, %1749, 0, %1666, %2378, implicit $exec |
| %2380:sreg_64_xexec = S_OR_B64 %1727, %2300, implicit-def dead $scc |
| %2381:vgpr_32 = V_CNDMASK_B32_e64 0, %1751, 0, %1666, %2380, implicit $exec |
| %2382:sreg_64_xexec = S_OR_B64 %1727, %2301, implicit-def dead $scc |
| %2383:vgpr_32 = V_CNDMASK_B32_e64 0, %1753, 0, %1666, %2382, implicit $exec |
| %2384:sreg_64_xexec = S_OR_B64 %1727, %2302, implicit-def dead $scc |
| %2385:vgpr_32 = V_CNDMASK_B32_e64 0, %1755, 0, %1666, %2384, implicit $exec |
| %2386:sreg_64_xexec = S_OR_B64 %1727, %2303, implicit-def dead $scc |
| %2387:vgpr_32 = V_CNDMASK_B32_e64 0, %1757, 0, %1666, %2386, implicit $exec |
| %2388:sreg_64_xexec = S_OR_B64 %1727, %2304, implicit-def dead $scc |
| %2389:vgpr_32 = V_CNDMASK_B32_e64 0, %1759, 0, %1666, %2388, implicit $exec |
| %2390:sreg_64_xexec = S_OR_B64 %1727, %2305, implicit-def dead $scc |
| %2391:vgpr_32 = V_CNDMASK_B32_e64 0, %1761, 0, %1666, %2390, implicit $exec |
| %2392:sreg_64_xexec = S_OR_B64 %1727, %2306, implicit-def dead $scc |
| %2393:vgpr_32 = V_CNDMASK_B32_e64 0, %1763, 0, %1666, %2392, implicit $exec |
| %2394:sreg_64_xexec = S_OR_B64 %1727, %2307, implicit-def dead $scc |
| %2395:vgpr_32 = V_CNDMASK_B32_e64 0, %1765, 0, %1666, %2394, implicit $exec |
| %2396:sreg_64_xexec = S_OR_B64 %1727, %2308, implicit-def dead $scc |
| %2397:vgpr_32 = V_CNDMASK_B32_e64 0, %1767, 0, %1666, %2396, implicit $exec |
| %2398:sreg_64_xexec = S_OR_B64 %1727, %2309, implicit-def dead $scc |
| %2399:vgpr_32 = V_CNDMASK_B32_e64 0, %1769, 0, %1666, %2398, implicit $exec |
| %2400:sreg_64_xexec = S_OR_B64 %1727, %2310, implicit-def dead $scc |
| %2401:vgpr_32 = V_CNDMASK_B32_e64 0, %1771, 0, %1666, %2400, implicit $exec |
| %2402:sreg_64_xexec = S_OR_B64 %1727, %2311, implicit-def dead $scc |
| %2403:vgpr_32 = V_CNDMASK_B32_e64 0, %1773, 0, %1666, %2402, implicit $exec |
| %2404:sreg_64_xexec = S_OR_B64 %1727, %2312, implicit-def dead $scc |
| %2405:vgpr_32 = V_CNDMASK_B32_e64 0, %1775, 0, %1666, %2404, implicit $exec |
| %2406:sreg_64_xexec = S_OR_B64 %1727, %2313, implicit-def dead $scc |
| %2407:vgpr_32 = V_CNDMASK_B32_e64 0, %1777, 0, %1666, %2406, implicit $exec |
| %2408:sreg_64_xexec = S_OR_B64 %1727, %2314, implicit-def dead $scc |
| %2409:vgpr_32 = V_CNDMASK_B32_e64 0, %1779, 0, %1666, %2408, implicit $exec |
| %2410:sreg_64_xexec = S_OR_B64 %1727, %2315, implicit-def dead $scc |
| %2411:vgpr_32 = V_CNDMASK_B32_e64 0, %1781, 0, %1666, %2410, implicit $exec |
| %2412:sreg_64_xexec = S_OR_B64 %1727, %2316, implicit-def dead $scc |
| %2413:vgpr_32 = V_CNDMASK_B32_e64 0, %1783, 0, %1666, %2412, implicit $exec |
| %2414:sreg_64_xexec = S_OR_B64 %1727, %2317, implicit-def dead $scc |
| %2415:vgpr_32 = V_CNDMASK_B32_e64 0, %1785, 0, %1666, %2414, implicit $exec |
| %2416:sreg_64_xexec = S_OR_B64 %1727, %2318, implicit-def dead $scc |
| %2417:vgpr_32 = V_CNDMASK_B32_e64 0, %1787, 0, %1666, %2416, implicit $exec |
| %2418:sreg_64_xexec = S_OR_B64 %1727, %2319, implicit-def dead $scc |
| %2419:vgpr_32 = V_CNDMASK_B32_e64 0, %1789, 0, %1666, %2418, implicit $exec |
| %2420:sreg_64_xexec = S_OR_B64 %1727, %2320, implicit-def dead $scc |
| %2421:vgpr_32 = V_CNDMASK_B32_e64 0, %1791, 0, %1666, %2420, implicit $exec |
| %2422:sreg_64_xexec = S_OR_B64 %1727, %2321, implicit-def dead $scc |
| %2423:vgpr_32 = V_CNDMASK_B32_e64 0, %1793, 0, %1666, %2422, implicit $exec |
| %2424:sreg_64_xexec = S_OR_B64 %1727, %2322, implicit-def dead $scc |
| %2425:vgpr_32 = V_CNDMASK_B32_e64 0, %1795, 0, %1666, %2424, implicit $exec |
| %2426:sreg_64_xexec = S_OR_B64 %1727, %2323, implicit-def dead $scc |
| %2427:vgpr_32 = V_CNDMASK_B32_e64 0, %1797, 0, %1666, %2426, implicit $exec |
| %2428:sreg_64_xexec = S_OR_B64 %1727, %2324, implicit-def dead $scc |
| %2429:vgpr_32 = V_CNDMASK_B32_e64 0, %1799, 0, %1666, %2428, implicit $exec |
| %2430:sreg_64_xexec = S_OR_B64 %1727, %2325, implicit-def dead $scc |
| %2431:vgpr_32 = V_CNDMASK_B32_e64 0, %1801, 0, %1666, %2430, implicit $exec |
| %2432:sreg_64_xexec = S_OR_B64 %1727, %2326, implicit-def dead $scc |
| %2433:vgpr_32 = V_CNDMASK_B32_e64 0, %1803, 0, %1666, %2432, implicit $exec |
| %2434:sreg_64_xexec = S_OR_B64 %1727, %2327, implicit-def dead $scc |
| %2435:vgpr_32 = V_CNDMASK_B32_e64 0, %1805, 0, %1666, %2434, implicit $exec |
| %2436:sreg_64_xexec = S_OR_B64 %1727, %2328, implicit-def dead $scc |
| %2437:vgpr_32 = V_CNDMASK_B32_e64 0, %1807, 0, %1666, %2436, implicit $exec |
| %2438:sreg_64_xexec = S_OR_B64 %1727, %2329, implicit-def dead $scc |
| %2439:vgpr_32 = V_CNDMASK_B32_e64 0, %1809, 0, %1666, %2438, implicit $exec |
| %2440:sreg_64_xexec = S_OR_B64 %1727, %2330, implicit-def dead $scc |
| %2441:vgpr_32 = V_CNDMASK_B32_e64 0, %1811, 0, %1666, %2440, implicit $exec |
| %2442:sreg_64_xexec = S_OR_B64 %1727, %2331, implicit-def dead $scc |
| %2443:vgpr_32 = V_CNDMASK_B32_e64 0, %1813, 0, %1666, %2442, implicit $exec |
| %2444:sreg_64_xexec = S_OR_B64 %1727, %2332, implicit-def dead $scc |
| %2445:vgpr_32 = V_CNDMASK_B32_e64 0, %1815, 0, %1666, %2444, implicit $exec |
| %2446:sreg_64_xexec = S_OR_B64 %1727, %2333, implicit-def dead $scc |
| %2447:vgpr_32 = V_CNDMASK_B32_e64 0, %1817, 0, %1666, %2446, implicit $exec |
| %2448:sreg_64_xexec = S_OR_B64 %1727, %2334, implicit-def dead $scc |
| %2449:vgpr_32 = V_CNDMASK_B32_e64 0, %1819, 0, %1666, %2448, implicit $exec |
| %2450:sreg_64_xexec = S_OR_B64 %1727, %2335, implicit-def dead $scc |
| %2451:vgpr_32 = V_CNDMASK_B32_e64 0, %1821, 0, %1666, %2450, implicit $exec |
| %2452:sreg_64_xexec = S_OR_B64 %1727, %2336, implicit-def dead $scc |
| %2453:vgpr_32 = V_CNDMASK_B32_e64 0, %1823, 0, %1666, %2452, implicit $exec |
| %2454:sreg_64_xexec = S_OR_B64 %1727, %2337, implicit-def dead $scc |
| %2455:vgpr_32 = V_CNDMASK_B32_e64 0, %1825, 0, %1666, %2454, implicit $exec |
| %2456:sreg_64_xexec = S_OR_B64 %1727, %2338, implicit-def dead $scc |
| %2457:vgpr_32 = V_CNDMASK_B32_e64 0, %1827, 0, %1666, %2456, implicit $exec |
| %2458:sreg_64_xexec = S_OR_B64 %1727, %2339, implicit-def dead $scc |
| %2459:vgpr_32 = V_CNDMASK_B32_e64 0, %1829, 0, %1666, %2458, implicit $exec |
| %2460:sreg_64_xexec = S_OR_B64 %1727, %2340, implicit-def dead $scc |
| %2461:vgpr_32 = V_CNDMASK_B32_e64 0, %1831, 0, %1666, %2460, implicit $exec |
| %2462:sreg_64_xexec = S_OR_B64 %1727, %2341, implicit-def dead $scc |
| %2463:vgpr_32 = V_CNDMASK_B32_e64 0, %1833, 0, %1666, %2462, implicit $exec |
| %2464:sreg_64_xexec = S_OR_B64 %1727, %2342, implicit-def dead $scc |
| %2465:vgpr_32 = V_CNDMASK_B32_e64 0, %1835, 0, %1666, %2464, implicit $exec |
| %2466:sreg_64_xexec = S_OR_B64 %1727, %2343, implicit-def dead $scc |
| %2467:vgpr_32 = V_CNDMASK_B32_e64 0, %1837, 0, %1666, %2466, implicit $exec |
| %2468:sreg_64_xexec = S_OR_B64 %1727, %2344, implicit-def dead $scc |
| %2469:vgpr_32 = V_CNDMASK_B32_e64 0, %1839, 0, %1666, %2468, implicit $exec |
| %2470:sreg_64_xexec = S_OR_B64 %1727, %2345, implicit-def dead $scc |
| %2471:vgpr_32 = V_CNDMASK_B32_e64 0, %1841, 0, %1666, %2470, implicit $exec |
| %2472:sreg_64_xexec = S_OR_B64 %1727, %2346, implicit-def dead $scc |
| %2473:vgpr_32 = V_CNDMASK_B32_e64 0, %1843, 0, %1666, %2472, implicit $exec |
| %2474:sreg_64_xexec = S_OR_B64 %1727, %2347, implicit-def dead $scc |
| %2475:vgpr_32 = V_CNDMASK_B32_e64 0, %1845, 0, %1666, %2474, implicit $exec |
| %2476:sreg_64_xexec = S_OR_B64 %1727, %2348, implicit-def dead $scc |
| %2477:vgpr_32 = V_CNDMASK_B32_e64 0, %1847, 0, %1666, %2476, implicit $exec |
| %2478:vgpr_32 = nofpexcept V_SUB_F32_e32 %2230, %2353, implicit $mode, implicit $exec |
| %2479:vgpr_32 = nofpexcept V_SUB_F32_e32 %2231, %2353, implicit $mode, implicit $exec |
| %2480:vgpr_32 = nofpexcept V_SUB_F32_e32 %2232, %2353, implicit $mode, implicit $exec |
| %2481:vgpr_32 = nofpexcept V_SUB_F32_e32 %2233, %2353, implicit $mode, implicit $exec |
| %2482:vgpr_32 = nofpexcept V_SUB_F32_e32 %2234, %2355, implicit $mode, implicit $exec |
| %2483:vgpr_32 = nofpexcept V_SUB_F32_e32 %2235, %2355, implicit $mode, implicit $exec |
| %2484:vgpr_32 = nofpexcept V_SUB_F32_e32 %2236, %2355, implicit $mode, implicit $exec |
| %2485:vgpr_32 = nofpexcept V_SUB_F32_e32 %2237, %2355, implicit $mode, implicit $exec |
| %2486:vgpr_32 = nofpexcept V_SUB_F32_e32 %2242, %2357, implicit $mode, implicit $exec |
| %2487:vgpr_32 = nofpexcept V_SUB_F32_e32 %2243, %2357, implicit $mode, implicit $exec |
| %2488:vgpr_32 = nofpexcept V_SUB_F32_e32 %2244, %2357, implicit $mode, implicit $exec |
| %2489:vgpr_32 = nofpexcept V_SUB_F32_e32 %2245, %2357, implicit $mode, implicit $exec |
| undef %2490.sub0:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %2478, implicit $mode, implicit $exec |
| %2490.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %2479, implicit $mode, implicit $exec |
| undef %2491.sub0:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %2480, implicit $mode, implicit $exec |
| %2491.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %2481, implicit $mode, implicit $exec |
| undef %2492.sub0:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %2482, implicit $mode, implicit $exec |
| %2492.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %2483, implicit $mode, implicit $exec |
| undef %2493.sub0:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %2484, implicit $mode, implicit $exec |
| %2493.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %2485, implicit $mode, implicit $exec |
| %2494:vgpr_32 = nofpexcept V_EXP_F32_e32 %2486, implicit $mode, implicit $exec |
| %2495:vgpr_32 = nofpexcept V_EXP_F32_e32 %2487, implicit $mode, implicit $exec |
| %2496:vgpr_32 = nofpexcept V_EXP_F32_e32 %2488, implicit $mode, implicit $exec |
| %2497:vgpr_32 = nofpexcept V_EXP_F32_e32 %2489, implicit $mode, implicit $exec |
| undef %2498.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, 0, 0, %2494, %1283, implicit $exec |
| %2498.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, 0, 0, %2495, %1283, implicit $exec |
| undef %2499.sub0:vreg_64_align2 = V_CNDMASK_B32_e64 0, 0, 0, %2496, %1283, implicit $exec |
| %2499.sub1:vreg_64_align2 = V_CNDMASK_B32_e64 0, 0, 0, %2497, %1283, implicit $exec |
| %2500:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %2490, 8, %2491, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2501:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %2492, 8, %2493, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2502:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %2498, 8, %2499, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2503:vgpr_32 = nofpexcept V_ADD_F32_e32 %2500.sub0, %2500.sub1, implicit $mode, implicit $exec |
| %2504:vgpr_32 = nofpexcept V_ADD_F32_e32 %2501.sub0, %2501.sub1, implicit $mode, implicit $exec |
| %2505:vgpr_32 = nofpexcept V_ADD_F32_e32 %2502.sub0, %2502.sub1, implicit $mode, implicit $exec |
| %2506:vgpr_32 = DS_BPERMUTE_B32 %1468, %2503, 0, implicit $exec |
| %2507:vgpr_32 = nofpexcept V_ADD_F32_e32 %2503, %2506, implicit $mode, implicit $exec |
| %2508:vgpr_32 = COPY %2507 |
| %2508:vgpr_32 = V_MOV_B32_dpp %2508, %2508, 296, 15, 15, 0, implicit $exec |
| %2509:vgpr_32 = nofpexcept V_ADD_F32_e32 %2507, %2508, implicit $mode, implicit $exec |
| %2510:vgpr_32 = COPY %2509 |
| %2510:vgpr_32 = V_MOV_B32_dpp %2510, %2510, 321, 15, 15, 0, implicit $exec |
| %2510:vgpr_32 = V_MOV_B32_dpp %2510, %2510, 27, 15, 15, 0, implicit $exec |
| %2511:vgpr_32 = nofpexcept V_ADD_F32_e32 %2509, %2510, implicit $mode, implicit $exec |
| %2512:vgpr_32 = COPY %2511 |
| %2512:vgpr_32 = V_MOV_B32_dpp %2512, %2512, 78, 15, 15, 0, implicit $exec |
| %2513:vgpr_32 = nofpexcept V_ADD_F32_e32 %2511, %2512, implicit $mode, implicit $exec |
| %2514:vgpr_32 = COPY %2513 |
| %2514:vgpr_32 = V_MOV_B32_dpp %2514, %2514, 177, 15, 15, 0, implicit $exec |
| undef %2515.sub0:vreg_64_align2 = nofpexcept V_ADD_F32_e32 %2513, %2514, implicit $mode, implicit $exec |
| %2516:vgpr_32 = DS_BPERMUTE_B32 %1468, %2504, 0, implicit $exec |
| %2517:vgpr_32 = nofpexcept V_ADD_F32_e32 %2504, %2516, implicit $mode, implicit $exec |
| %2518:vgpr_32 = COPY %2517 |
| %2518:vgpr_32 = V_MOV_B32_dpp %2518, %2518, 296, 15, 15, 0, implicit $exec |
| %2519:vgpr_32 = nofpexcept V_ADD_F32_e32 %2517, %2518, implicit $mode, implicit $exec |
| %2520:vgpr_32 = COPY %2519 |
| %2520:vgpr_32 = V_MOV_B32_dpp %2520, %2520, 321, 15, 15, 0, implicit $exec |
| %2520:vgpr_32 = V_MOV_B32_dpp %2520, %2520, 27, 15, 15, 0, implicit $exec |
| %2521:vgpr_32 = nofpexcept V_ADD_F32_e32 %2519, %2520, implicit $mode, implicit $exec |
| %2522:vgpr_32 = COPY %2521 |
| %2522:vgpr_32 = V_MOV_B32_dpp %2522, %2522, 78, 15, 15, 0, implicit $exec |
| %2523:vgpr_32 = nofpexcept V_ADD_F32_e32 %2521, %2522, implicit $mode, implicit $exec |
| %2524:vgpr_32 = COPY %2523 |
| %2524:vgpr_32 = V_MOV_B32_dpp %2524, %2524, 177, 15, 15, 0, implicit $exec |
| %2525:vgpr_32 = nofpexcept V_ADD_F32_e32 %2523, %2524, implicit $mode, implicit $exec |
| %2526:vgpr_32 = DS_BPERMUTE_B32 %1468, %2505, 0, implicit $exec |
| %2527:vgpr_32 = nofpexcept V_ADD_F32_e32 %2505, %2526, implicit $mode, implicit $exec |
| %2528:vgpr_32 = COPY %2527 |
| %2528:vgpr_32 = V_MOV_B32_dpp %2528, %2528, 296, 15, 15, 0, implicit $exec |
| %2529:vgpr_32 = nofpexcept V_ADD_F32_e32 %2527, %2528, implicit $mode, implicit $exec |
| %2530:vgpr_32 = COPY %2529 |
| %2530:vgpr_32 = V_MOV_B32_dpp %2530, %2530, 321, 15, 15, 0, implicit $exec |
| %2530:vgpr_32 = V_MOV_B32_dpp %2530, %2530, 27, 15, 15, 0, implicit $exec |
| %2531:vgpr_32 = nofpexcept V_ADD_F32_e32 %2529, %2530, implicit $mode, implicit $exec |
| %2532:vgpr_32 = COPY %2531 |
| %2532:vgpr_32 = V_MOV_B32_dpp %2532, %2532, 78, 15, 15, 0, implicit $exec |
| %2533:vgpr_32 = nofpexcept V_ADD_F32_e32 %2531, %2532, implicit $mode, implicit $exec |
| %2534:vgpr_32 = COPY %2533 |
| %2534:vgpr_32 = V_MOV_B32_dpp %2534, %2534, 177, 15, 15, 0, implicit $exec |
| %2535:vgpr_32 = nofpexcept V_ADD_F32_e32 %2533, %2534, implicit $mode, implicit $exec |
| %2536:vgpr_32 = nofpexcept V_SUB_F32_e32 %1520, %2034, implicit $mode, implicit $exec |
| %2537:vgpr_32 = nofpexcept V_SUB_F32_e32 %1522, %2353, implicit $mode, implicit $exec |
| %2538:vgpr_32 = nofpexcept V_SUB_F32_e32 %1533.sub0, %2355, implicit $mode, implicit $exec |
| %2539:vgpr_32 = nofpexcept V_SUB_F32_e32 %1533.sub1, %2357, implicit $mode, implicit $exec |
| %2540:vgpr_32 = nofpexcept V_SUB_F32_e32 %1729, %2359, implicit $mode, implicit $exec |
| %2541:vgpr_32 = nofpexcept V_SUB_F32_e32 %1731, %2361, implicit $mode, implicit $exec |
| %2542:vgpr_32 = nofpexcept V_SUB_F32_e32 %1733, %2363, implicit $mode, implicit $exec |
| %2543:vgpr_32 = nofpexcept V_SUB_F32_e32 %1735, %2365, implicit $mode, implicit $exec |
| %2544:vgpr_32 = nofpexcept V_SUB_F32_e32 %1737, %2367, implicit $mode, implicit $exec |
| %2545:vgpr_32 = nofpexcept V_SUB_F32_e32 %1739, %2369, implicit $mode, implicit $exec |
| %2546:vgpr_32 = nofpexcept V_SUB_F32_e32 %1741, %2371, implicit $mode, implicit $exec |
| %2547:vgpr_32 = nofpexcept V_SUB_F32_e32 %1743, %2373, implicit $mode, implicit $exec |
| %2548:vgpr_32 = nofpexcept V_SUB_F32_e32 %1745, %2375, implicit $mode, implicit $exec |
| %2549:vgpr_32 = nofpexcept V_SUB_F32_e32 %1747, %2377, implicit $mode, implicit $exec |
| %2550:vgpr_32 = nofpexcept V_SUB_F32_e32 %1749, %2379, implicit $mode, implicit $exec |
| %2551:vgpr_32 = nofpexcept V_SUB_F32_e32 %1751, %2381, implicit $mode, implicit $exec |
| %2552:vgpr_32 = nofpexcept V_SUB_F32_e32 %1753, %2383, implicit $mode, implicit $exec |
| %2553:vgpr_32 = nofpexcept V_SUB_F32_e32 %1755, %2385, implicit $mode, implicit $exec |
| %2554:vgpr_32 = nofpexcept V_SUB_F32_e32 %1757, %2387, implicit $mode, implicit $exec |
| %2555:vgpr_32 = nofpexcept V_SUB_F32_e32 %1759, %2389, implicit $mode, implicit $exec |
| %2556:vgpr_32 = nofpexcept V_SUB_F32_e32 %1761, %2391, implicit $mode, implicit $exec |
| %2557:vgpr_32 = nofpexcept V_SUB_F32_e32 %1763, %2393, implicit $mode, implicit $exec |
| %2558:vgpr_32 = nofpexcept V_SUB_F32_e32 %1765, %2395, implicit $mode, implicit $exec |
| %2559:vgpr_32 = nofpexcept V_SUB_F32_e32 %1767, %2397, implicit $mode, implicit $exec |
| %2560:vgpr_32 = nofpexcept V_SUB_F32_e32 %1769, %2399, implicit $mode, implicit $exec |
| %2561:vgpr_32 = nofpexcept V_SUB_F32_e32 %1771, %2401, implicit $mode, implicit $exec |
| %2562:vgpr_32 = nofpexcept V_SUB_F32_e32 %1773, %2403, implicit $mode, implicit $exec |
| %2563:vgpr_32 = nofpexcept V_SUB_F32_e32 %1775, %2405, implicit $mode, implicit $exec |
| %2564:vgpr_32 = nofpexcept V_SUB_F32_e32 %1777, %2407, implicit $mode, implicit $exec |
| %2565:vgpr_32 = nofpexcept V_SUB_F32_e32 %1779, %2409, implicit $mode, implicit $exec |
| %2566:vgpr_32 = nofpexcept V_SUB_F32_e32 %1781, %2411, implicit $mode, implicit $exec |
| %2567:vgpr_32 = nofpexcept V_SUB_F32_e32 %1783, %2413, implicit $mode, implicit $exec |
| %2568:vgpr_32 = nofpexcept V_SUB_F32_e32 %1785, %2415, implicit $mode, implicit $exec |
| %2569:vgpr_32 = nofpexcept V_SUB_F32_e32 %1787, %2417, implicit $mode, implicit $exec |
| %2570:vgpr_32 = nofpexcept V_SUB_F32_e32 %1789, %2419, implicit $mode, implicit $exec |
| %2571:vgpr_32 = nofpexcept V_SUB_F32_e32 %1791, %2421, implicit $mode, implicit $exec |
| %2572:vgpr_32 = nofpexcept V_SUB_F32_e32 %1793, %2423, implicit $mode, implicit $exec |
| %2573:vgpr_32 = nofpexcept V_SUB_F32_e32 %1795, %2425, implicit $mode, implicit $exec |
| %2574:vgpr_32 = nofpexcept V_SUB_F32_e32 %1797, %2427, implicit $mode, implicit $exec |
| %2575:vgpr_32 = nofpexcept V_SUB_F32_e32 %1799, %2429, implicit $mode, implicit $exec |
| %2576:vgpr_32 = nofpexcept V_SUB_F32_e32 %1801, %2431, implicit $mode, implicit $exec |
| %2577:vgpr_32 = nofpexcept V_SUB_F32_e32 %1803, %2433, implicit $mode, implicit $exec |
| %2578:vgpr_32 = nofpexcept V_SUB_F32_e32 %1805, %2435, implicit $mode, implicit $exec |
| %2579:vgpr_32 = nofpexcept V_SUB_F32_e32 %1807, %2437, implicit $mode, implicit $exec |
| %2580:vgpr_32 = nofpexcept V_SUB_F32_e32 %1809, %2439, implicit $mode, implicit $exec |
| %2581:vgpr_32 = nofpexcept V_SUB_F32_e32 %1811, %2441, implicit $mode, implicit $exec |
| %2582:vgpr_32 = nofpexcept V_SUB_F32_e32 %1813, %2443, implicit $mode, implicit $exec |
| %2583:vgpr_32 = nofpexcept V_SUB_F32_e32 %1815, %2445, implicit $mode, implicit $exec |
| %2584:vgpr_32 = nofpexcept V_SUB_F32_e32 %1817, %2447, implicit $mode, implicit $exec |
| %2585:vgpr_32 = nofpexcept V_SUB_F32_e32 %1819, %2449, implicit $mode, implicit $exec |
| %2586:vgpr_32 = nofpexcept V_SUB_F32_e32 %1821, %2451, implicit $mode, implicit $exec |
| %2587:vgpr_32 = nofpexcept V_SUB_F32_e32 %1823, %2453, implicit $mode, implicit $exec |
| %2588:vgpr_32 = nofpexcept V_SUB_F32_e32 %1825, %2455, implicit $mode, implicit $exec |
| %2589:vgpr_32 = nofpexcept V_SUB_F32_e32 %1827, %2457, implicit $mode, implicit $exec |
| %2590:vgpr_32 = nofpexcept V_SUB_F32_e32 %1829, %2459, implicit $mode, implicit $exec |
| %2591:vgpr_32 = nofpexcept V_SUB_F32_e32 %1831, %2461, implicit $mode, implicit $exec |
| %2592:vgpr_32 = nofpexcept V_SUB_F32_e32 %1833, %2463, implicit $mode, implicit $exec |
| %2593:vgpr_32 = nofpexcept V_SUB_F32_e32 %1835, %2465, implicit $mode, implicit $exec |
| %2594:vgpr_32 = nofpexcept V_SUB_F32_e32 %1837, %2467, implicit $mode, implicit $exec |
| %2595:vgpr_32 = nofpexcept V_SUB_F32_e32 %1839, %2469, implicit $mode, implicit $exec |
| %2596:vgpr_32 = nofpexcept V_SUB_F32_e32 %1841, %2471, implicit $mode, implicit $exec |
| %2597:vgpr_32 = nofpexcept V_SUB_F32_e32 %1843, %2473, implicit $mode, implicit $exec |
| %2598:vgpr_32 = nofpexcept V_SUB_F32_e32 %1845, %2475, implicit $mode, implicit $exec |
| %2599:vgpr_32 = nofpexcept V_SUB_F32_e32 %1847, %2477, implicit $mode, implicit $exec |
| undef %2600.sub0:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %2536, implicit $mode, implicit $exec |
| undef %2601.sub0:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %2537, implicit $mode, implicit $exec |
| undef %2602.sub0:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %2538, implicit $mode, implicit $exec |
| undef %2603.sub0:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %2539, implicit $mode, implicit $exec |
| undef %2604.sub0:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %2540, implicit $mode, implicit $exec |
| undef %2605.sub0:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %2541, implicit $mode, implicit $exec |
| undef %2606.sub0:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %2542, implicit $mode, implicit $exec |
| undef %2607.sub0:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %2543, implicit $mode, implicit $exec |
| %2600.sub1:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %2544, implicit $mode, implicit $exec |
| %2601.sub1:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %2545, implicit $mode, implicit $exec |
| undef %2608.sub0:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %2546, implicit $mode, implicit $exec |
| undef %2609.sub0:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %2547, implicit $mode, implicit $exec |
| undef %2610.sub0:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %2548, implicit $mode, implicit $exec |
| undef %2611.sub0:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %2549, implicit $mode, implicit $exec |
| %2606.sub1:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %2550, implicit $mode, implicit $exec |
| %2607.sub1:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %2551, implicit $mode, implicit $exec |
| %2600.sub2:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %2552, implicit $mode, implicit $exec |
| %2601.sub2:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %2553, implicit $mode, implicit $exec |
| %2608.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %2554, implicit $mode, implicit $exec |
| %2609.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %2555, implicit $mode, implicit $exec |
| %2610.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %2556, implicit $mode, implicit $exec |
| %2611.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %2557, implicit $mode, implicit $exec |
| %2606.sub2:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %2558, implicit $mode, implicit $exec |
| %2607.sub2:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %2559, implicit $mode, implicit $exec |
| %2600.sub3:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %2560, implicit $mode, implicit $exec |
| %2601.sub3:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %2561, implicit $mode, implicit $exec |
| %2602.sub3:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %2562, implicit $mode, implicit $exec |
| %2603.sub3:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %2563, implicit $mode, implicit $exec |
| %2604.sub3:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %2564, implicit $mode, implicit $exec |
| %2605.sub3:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %2565, implicit $mode, implicit $exec |
| %2606.sub3:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %2566, implicit $mode, implicit $exec |
| %2607.sub3:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %2567, implicit $mode, implicit $exec |
| undef %2612.sub0:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %2568, implicit $mode, implicit $exec |
| undef %2613.sub0:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %2569, implicit $mode, implicit $exec |
| undef %2614.sub0:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %2570, implicit $mode, implicit $exec |
| undef %2615.sub0:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %2571, implicit $mode, implicit $exec |
| undef %2616.sub0:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %2572, implicit $mode, implicit $exec |
| undef %2617.sub0:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %2573, implicit $mode, implicit $exec |
| undef %2618.sub0:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %2574, implicit $mode, implicit $exec |
| undef %2619.sub0:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %2575, implicit $mode, implicit $exec |
| %2612.sub1:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %2576, implicit $mode, implicit $exec |
| %2613.sub1:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %2577, implicit $mode, implicit $exec |
| %2614.sub1:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %2578, implicit $mode, implicit $exec |
| %2615.sub1:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %2579, implicit $mode, implicit $exec |
| %2616.sub1:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %2580, implicit $mode, implicit $exec |
| undef %2620.sub0:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %2581, implicit $mode, implicit $exec |
| undef %2621.sub0:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %2582, implicit $mode, implicit $exec |
| undef %2622.sub0:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %2583, implicit $mode, implicit $exec |
| %2612.sub2:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %2584, implicit $mode, implicit $exec |
| %2613.sub2:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %2585, implicit $mode, implicit $exec |
| %2614.sub2:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %2586, implicit $mode, implicit $exec |
| %2615.sub2:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %2587, implicit $mode, implicit $exec |
| %2616.sub2:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %2588, implicit $mode, implicit $exec |
| %2620.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %2589, implicit $mode, implicit $exec |
| %2621.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %2590, implicit $mode, implicit $exec |
| %2622.sub1:vreg_64_align2 = nofpexcept V_EXP_F32_e32 %2591, implicit $mode, implicit $exec |
| %2612.sub3:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %2592, implicit $mode, implicit $exec |
| %2613.sub3:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %2593, implicit $mode, implicit $exec |
| %2614.sub3:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %2594, implicit $mode, implicit $exec |
| %2615.sub3:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %2595, implicit $mode, implicit $exec |
| %2616.sub3:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %2596, implicit $mode, implicit $exec |
| %2617.sub3:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %2597, implicit $mode, implicit $exec |
| %2618.sub3:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %2598, implicit $mode, implicit $exec |
| %2619.sub3:vreg_128_align2 = nofpexcept V_EXP_F32_e32 %2599, implicit $mode, implicit $exec |
| %2623:vgpr_32 = nofpexcept V_MUL_F32_e32 %1602, %2602.sub0, implicit $mode, implicit $exec |
| %2624:vgpr_32 = nofpexcept V_MUL_F32_e32 %1603, %2603.sub0, implicit $mode, implicit $exec |
| %2625:vgpr_32 = nofpexcept V_MUL_F32_e32 %2604.sub0, %2096, implicit $mode, implicit $exec |
| %2626:vgpr_32 = nofpexcept V_MUL_F32_e32 %2605.sub0, %2097, implicit $mode, implicit $exec |
| %2627:vgpr_32 = nofpexcept V_MUL_F32_e32 %2606.sub0, %2098, implicit $mode, implicit $exec |
| %2628:vgpr_32 = nofpexcept V_MUL_F32_e32 %2607.sub0, %2099, implicit $mode, implicit $exec |
| %2629:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %2100, 8, %2600.sub0_sub1, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| undef %2630.sub0:vreg_64_align2 = nofpexcept V_MUL_F32_e32 %2606.sub1, %2101, implicit $mode, implicit $exec |
| %2631:vgpr_32 = nofpexcept V_MUL_F32_e32 %2607.sub1, %2102, implicit $mode, implicit $exec |
| %2632:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %2608, 8, %2103, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2633:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %2609, 8, %2104, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2634:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %2610, 8, %2105, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2635:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %2611, 8, %2106, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2630.sub1:vreg_64_align2 = nofpexcept V_MUL_F32_e32 %2606.sub2, %2107, implicit $mode, implicit $exec |
| %2636:vgpr_32 = nofpexcept V_MUL_F32_e32 %2607.sub2, %2108, implicit $mode, implicit $exec |
| %2637:vgpr_32 = nofpexcept V_MUL_F32_e32 %2602.sub3, %2109, implicit $mode, implicit $exec |
| %2638:vgpr_32 = nofpexcept V_MUL_F32_e32 %2603.sub3, %2110, implicit $mode, implicit $exec |
| %2639:vgpr_32 = nofpexcept V_MUL_F32_e32 %2604.sub3, %2111, implicit $mode, implicit $exec |
| %2640:vgpr_32 = nofpexcept V_MUL_F32_e32 %2605.sub3, %2112, implicit $mode, implicit $exec |
| %2641:vgpr_32 = nofpexcept V_MUL_F32_e32 %2606.sub3, %2113, implicit $mode, implicit $exec |
| %2642:vgpr_32 = nofpexcept V_MUL_F32_e32 %2607.sub3, %2114, implicit $mode, implicit $exec |
| undef %2643.sub0:vreg_64_align2 = nofpexcept V_MUL_F32_e32 %2616.sub0, %2115, implicit $mode, implicit $exec |
| %2644:vgpr_32 = nofpexcept V_MUL_F32_e32 %2617.sub0, %2116, implicit $mode, implicit $exec |
| %2645:vgpr_32 = nofpexcept V_MUL_F32_e32 %2618.sub0, %2117, implicit $mode, implicit $exec |
| %2646:vgpr_32 = nofpexcept V_MUL_F32_e32 %2619.sub0, %2118, implicit $mode, implicit $exec |
| %2643.sub1:vreg_64_align2 = nofpexcept V_MUL_F32_e32 %2616.sub1, %2119, implicit $mode, implicit $exec |
| undef %2647.sub0:vreg_64_align2 = nofpexcept V_MUL_F32_e32 %2616.sub2, %2120, implicit $mode, implicit $exec |
| %2648:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %2620, 8, %2121, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2649:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %2621, 8, %2122, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2650:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %2622, 8, %2123, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2647.sub1:vreg_64_align2 = nofpexcept V_MUL_F32_e32 %2616.sub3, %2124, implicit $mode, implicit $exec |
| %2651:vgpr_32 = nofpexcept V_MUL_F32_e32 %2617.sub3, %2125, implicit $mode, implicit $exec |
| %2652:vgpr_32 = nofpexcept V_MUL_F32_e32 %2618.sub3, %2126, implicit $mode, implicit $exec |
| %2653:vgpr_32 = nofpexcept V_MUL_F32_e32 %2619.sub3, %2127, implicit $mode, implicit $exec |
| undef %2654.sub0:vreg_128_align2 = nofpexcept V_ADD_F32_e32 %2623, %2525, implicit $mode, implicit $exec |
| undef %2655.sub0:vreg_128_align2 = nofpexcept V_ADD_F32_e32 %2624, %2535, implicit $mode, implicit $exec |
| undef %2656.sub0:vreg_128_align2 = nofpexcept V_ADD_F32_e32 %2055.sub1, %2625, implicit $mode, implicit $exec |
| undef %2657.sub0:vreg_128_align2 = nofpexcept V_ADD_F32_e32 %2055.sub1, %2626, implicit $mode, implicit $exec |
| undef %2658.sub0:vreg_128_align2 = nofpexcept V_ADD_F32_e32 %2055.sub1, %2627, implicit $mode, implicit $exec |
| undef %2659.sub0:vreg_128_align2 = nofpexcept V_ADD_F32_e32 %2055.sub1, %2628, implicit $mode, implicit $exec |
| undef %2660.sub0_sub1:vreg_128_align2 = nofpexcept V_PK_ADD_F32 8, %2629, 8, %2095, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %311.sub0:vreg_64_align2 = COPY %315.sub1 |
| %2661:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %1597.sub0_sub1, 8, %311, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %1571.sub1:vreg_64_align2 = COPY %2055.sub1 |
| %2662:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %2661, 8, %1571, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2663:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %2662, 8, %2601.sub0_sub1, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2515.sub1:vreg_64_align2 = COPY %2055.sub1 |
| undef %2664.sub0_sub1:vreg_128_align2 = nofpexcept V_PK_ADD_F32 8, %2515, 8, %2663, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2659.sub1:vreg_128_align2 = nofpexcept V_ADD_F32_e32 %2055.sub1, %2631, implicit $mode, implicit $exec |
| %2665:vreg_64_align2 = nofpexcept V_PK_ADD_F32 12, %2055, 8, %2632, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2666:vreg_64_align2 = nofpexcept V_PK_ADD_F32 12, %2055, 8, %2633, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2667:vreg_64_align2 = nofpexcept V_PK_ADD_F32 12, %2055, 8, %2634, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2668:vreg_64_align2 = nofpexcept V_PK_ADD_F32 12, %2055, 8, %2635, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2669:vreg_64_align2 = nofpexcept V_PK_ADD_F32 12, %2055, 8, %2630, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2659.sub2:vreg_128_align2 = nofpexcept V_ADD_F32_e32 %2055.sub1, %2636, implicit $mode, implicit $exec |
| undef %2670.sub0:vreg_64_align2 = COPY %307.sub0 |
| %2670.sub1:vreg_64_align2 = COPY %303.sub0 |
| %2671:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %1596.sub2_sub3, 8, %2670, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2672:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %2671, 12, %2055, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2673:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %2600.sub2_sub3, 8, %2672, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2660.sub2_sub3:vreg_128_align2 = nofpexcept V_PK_ADD_F32 12, %2055, 8, %2673, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %303.sub0:vreg_64_align2 = COPY %307.sub1 |
| %2674:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %1597.sub2_sub3, 8, %303, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2675:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %2674, 12, %2055, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2676:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %2601.sub2_sub3, 8, %2675, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2664.sub2_sub3:vreg_128_align2 = nofpexcept V_PK_ADD_F32 12, %2055, 8, %2676, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2654.sub3:vreg_128_align2 = nofpexcept V_ADD_F32_e32 %2055.sub1, %2637, implicit $mode, implicit $exec |
| %2655.sub3:vreg_128_align2 = nofpexcept V_ADD_F32_e32 %2055.sub1, %2638, implicit $mode, implicit $exec |
| %2656.sub3:vreg_128_align2 = nofpexcept V_ADD_F32_e32 %2055.sub1, %2639, implicit $mode, implicit $exec |
| %2657.sub3:vreg_128_align2 = nofpexcept V_ADD_F32_e32 %2055.sub1, %2640, implicit $mode, implicit $exec |
| %2658.sub3:vreg_128_align2 = nofpexcept V_ADD_F32_e32 %2055.sub1, %2641, implicit $mode, implicit $exec |
| %2659.sub3:vreg_128_align2 = nofpexcept V_ADD_F32_e32 %2055.sub1, %2642, implicit $mode, implicit $exec |
| undef %2677.sub0:vreg_128_align2 = nofpexcept V_ADD_F32_e32 %2055.sub1, %2644, implicit $mode, implicit $exec |
| undef %2678.sub0:vreg_128_align2 = nofpexcept V_ADD_F32_e32 %2055.sub1, %2645, implicit $mode, implicit $exec |
| undef %2679.sub0:vreg_128_align2 = nofpexcept V_ADD_F32_e32 %2055.sub1, %2646, implicit $mode, implicit $exec |
| %2680:vreg_64_align2 = nofpexcept V_PK_ADD_F32 12, %2055, 8, %2648, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2681:vreg_64_align2 = nofpexcept V_PK_ADD_F32 12, %2055, 8, %2649, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2682:vreg_64_align2 = nofpexcept V_PK_ADD_F32 12, %2055, 8, %2650, 0, 0, 0, 0, 0, implicit $mode, implicit $exec |
| %2677.sub3:vreg_128_align2 = nofpexcept V_ADD_F32_e32 %2055.sub1, %2651, implicit $mode, implicit $exec |
| %2678.sub3:vreg_128_align2 = nofpexcept V_ADD_F32_e32 %2055.sub1, %2652, implicit $mode, implicit $exec |
| %2679.sub3:vreg_128_align2 = nofpexcept V_ADD_F32_e32 %2055.sub1, %2653, implicit $mode, implicit $exec |
| undef %2683.sub0:vreg_64_align2 = V_CVT_PK_F16_F32_e64 0, %2039.sub0, 0, %2039.sub1, 0, 0, implicit $exec |
| %2683.sub1:vreg_64_align2 = V_CVT_PK_F16_F32_e64 0, %2040.sub0, 0, %2040.sub1, 0, 0, implicit $exec |
| undef %2684.sub0:vreg_64_align2 = V_CVT_PK_F16_F32_e64 0, %2490.sub0, 0, %2490.sub1, 0, 0, implicit $exec |
| %2684.sub1:vreg_64_align2 = V_CVT_PK_F16_F32_e64 0, %2491.sub0, 0, %2491.sub1, 0, 0, implicit $exec |
| undef %2685.sub0:vreg_64_align2 = V_CVT_PK_F16_F32_e64 0, %2492.sub0, 0, %2492.sub1, 0, 0, implicit $exec |
| %2685.sub1:vreg_64_align2 = V_CVT_PK_F16_F32_e64 0, %2493.sub0, 0, %2493.sub1, 0, 0, implicit $exec |
| %2686:vgpr_32 = V_CVT_PK_F16_F32_e64 0, %2494, 0, %2495, 0, 0, implicit $exec |
| %2687:vgpr_32 = V_LSHRREV_B32_e32 16, %2686, implicit $exec |
| %2688:vgpr_32 = V_CVT_PK_F16_F32_e64 0, %2496, 0, %2497, 0, 0, implicit $exec |
| %2689:vgpr_32 = V_LSHRREV_B32_e32 16, %2688, implicit $exec |
| %2690:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, %2686, %1283, implicit $exec |
| %2691:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, %2687, %1283, implicit $exec |
| %2692:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, %2688, %1283, implicit $exec |
| %2693:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, %2689, %1283, implicit $exec |
| %2694:vgpr_32 = nuw V_ADD_U32_e32 %15, %108, implicit $exec |
| undef %2695.sub0_sub1:av_128_align2 = DS_READ_B64_TR_B16 %2694, 0, 0, implicit $exec |
| %2696:vgpr_32 = nuw V_ADD_U32_e32 %15, %1617, implicit $exec |
| %2695.sub2_sub3:av_128_align2 = DS_READ_B64_TR_B16 %2696, 0, 0, implicit $exec |
| %2697:vgpr_32 = nuw V_ADD_U32_e32 %15, %1619, implicit $exec |
| undef %2698.sub0_sub1:av_128_align2 = DS_READ_B64_TR_B16 %2697, 0, 0, implicit $exec |
| %2699:vgpr_32 = nuw V_ADD_U32_e32 %15, %1622, implicit $exec |
| %2698.sub2_sub3:av_128_align2 = DS_READ_B64_TR_B16 %2699, 0, 0, implicit $exec |
| %2700:vgpr_32 = nuw V_ADD_U32_e32 %15, %1624, implicit $exec |
| undef %2701.sub0_sub1:av_128_align2 = DS_READ_B64_TR_B16 %2700, 0, 0, implicit $exec |
| %2702:vgpr_32 = nuw V_ADD_U32_e32 %15, %1627, implicit $exec |
| %2701.sub2_sub3:av_128_align2 = DS_READ_B64_TR_B16 %2702, 0, 0, implicit $exec |
| %2703:vgpr_32 = nuw V_ADD_U32_e32 %15, %1629, implicit $exec |
| undef %2704.sub0_sub1:av_128_align2 = DS_READ_B64_TR_B16 %2703, 0, 0, implicit $exec |
| %2705:vgpr_32 = nuw V_ADD_U32_e32 %15, %1632, implicit $exec |
| %2704.sub2_sub3:av_128_align2 = DS_READ_B64_TR_B16 %2705, 0, 0, implicit $exec |
| S_WAITCNT 49279 |
| WAVE_BARRIER |
| DS_WRITE_B128_gfx9 %37, %2600, 0, 0, implicit $exec |
| DS_WRITE_B128_gfx9 %37, %2601, 16, 0, implicit $exec |
| %2602.sub1:vreg_128_align2 = COPY %2608.sub0 |
| %2602.sub2:vreg_128_align2 = COPY %2608.sub1 |
| DS_WRITE_B128_gfx9 %37, %2602, 32, 0, implicit $exec |
| %2603.sub1:vreg_128_align2 = COPY %2609.sub0 |
| %2603.sub2:vreg_128_align2 = COPY %2609.sub1 |
| DS_WRITE_B128_gfx9 %37, %2603, 48, 0, implicit $exec |
| %2604.sub1:vreg_128_align2 = COPY %2610.sub0 |
| %2604.sub2:vreg_128_align2 = COPY %2610.sub1 |
| DS_WRITE2ST64_B64_gfx9 %1639, %1924, %1924, 32, 40, 0, implicit $exec |
| DS_WRITE2ST64_B64_gfx9 %1639, %1924, %1924, 48, 56, 0, implicit $exec |
| undef %2706.sub1:vreg_64_align2 = V_PERM_B32_e64 %2693, %2692, %1641, implicit $exec |
| %2706.sub0:vreg_64_align2 = V_PERM_B32_e64 %2691, %2690, %1641, implicit $exec |
| DS_WRITE2ST64_B64_gfx9 %1640, %2706, %1924, 0, 8, 0, implicit $exec |
| DS_WRITE2ST64_B64_gfx9 %1640, %1924, %1924, 16, 24, 0, implicit $exec |
| DS_WRITE2ST64_B64_gfx9 %1640, %1924, %1924, 32, 40, 0, implicit $exec |
| DS_WRITE2ST64_B64_gfx9 %1640, %1924, %1924, 48, 56, 0, implicit $exec |
| DS_WRITE2ST64_B64_gfx9 %1643, %1924, %1924, 0, 8, 0, implicit $exec |
| DS_WRITE2ST64_B64_gfx9 %1643, %1924, %1924, 16, 24, 0, implicit $exec |
| DS_WRITE2ST64_B64_gfx9 %1643, %1924, %1924, 32, 40, 0, implicit $exec |
| DS_WRITE2ST64_B64_gfx9 %1643, %1924, %1924, 48, 56, 0, implicit $exec |
| DS_WRITE2ST64_B64_gfx9 %1644, %1924, %1924, 0, 8, 0, implicit $exec |
| DS_WRITE2ST64_B64_gfx9 %1644, %1924, %1924, 16, 24, 0, implicit $exec |
| DS_WRITE2ST64_B64_gfx9 %1644, %1924, %1924, 32, 40, 0, implicit $exec |
| DS_WRITE2ST64_B64_gfx9 %1644, %1924, %1924, 48, 56, 0, implicit $exec |
| DS_WRITE2ST64_B64_gfx9 %1645, %1924, %1924, 0, 8, 0, implicit $exec |
| DS_WRITE2ST64_B64_gfx9 %1645, %1924, %1924, 16, 24, 0, implicit $exec |
| DS_WRITE2ST64_B64_gfx9 %1645, %1924, %1924, 32, 40, 0, implicit $exec |
| DS_WRITE2ST64_B64_gfx9 %1645, %1924, %1924, 48, 56, 0, implicit $exec |
| DS_WRITE2ST64_B64_gfx9 %1646, %1924, %1924, 0, 8, 0, implicit $exec |
| DS_WRITE2ST64_B64_gfx9 %1646, %1924, %1924, 16, 24, 0, implicit $exec |
| DS_WRITE2ST64_B64_gfx9 %1646, %1924, %1924, 32, 40, 0, implicit $exec |
| DS_WRITE2ST64_B64_gfx9 %1646, %1924, %1924, 48, 56, 0, implicit $exec |
| S_WAITCNT 49279 |
| WAVE_BARRIER |
| undef %2707.sub0_sub1_sub2_sub3:av_192_align2 = DS_READ2_B64_gfx9 %169, 0, 16, 0, implicit $exec |
| %2708:vgpr_32 = V_ADD_U32_e32 4096, %169, implicit $exec |
| undef %2709.sub0_sub1_sub2_sub3:av_192_align2 = DS_READ2_B64_gfx9 %2708, 0, 16, 0, implicit $exec |
| %2710:vgpr_32 = V_ADD_U32_e32 8192, %169, implicit $exec |
| undef %2711.sub0_sub1_sub2_sub3:av_192_align2 = DS_READ2_B64_gfx9 %2710, 0, 16, 0, implicit $exec |
| %2712:vgpr_32 = V_ADD_U32_e32 12288, %169, implicit $exec |
| undef %2713.sub0_sub1_sub2_sub3:av_192_align2 = DS_READ2_B64_gfx9 %2712, 0, 16, 0, implicit $exec |
| %2714:vgpr_32 = V_ADD_U32_e32 16384, %169, implicit $exec |
| undef %2715.sub0_sub1_sub2_sub3:av_192_align2 = DS_READ2_B64_gfx9 %2714, 0, 16, 0, implicit $exec |
| %2716:vgpr_32 = V_ADD_U32_e32 20480, %169, implicit $exec |
| undef %2717.sub0_sub1_sub2_sub3:av_192_align2 = DS_READ2_B64_gfx9 %2716, 0, 16, 0, implicit $exec |
| ... |