llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-asinh.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=amdgpu-simplifylib %s | FileCheck %s

define float @test_tdo_scalar_f32_asinh() {
; CHECK-LABEL: define float @test_tdo_scalar_f32_asinh() {
; CHECK-NEXT:  [[ENTRY:.*:]]
; CHECK-NEXT:    ret float 0.000000e+00
;
entry:
  %c = call float @_Z5asinhf(float 0.000000e+00)
  ret float %c
}

define <2 x float> @test_tdo_v2_f32_asinh() {
; CHECK-LABEL: define <2 x float> @test_tdo_v2_f32_asinh() {
; CHECK-NEXT:  [[ENTRY:.*:]]
; CHECK-NEXT:    ret <2 x float> <float 0.000000e+00, float -0.000000e+00>
;
entry:
  %c = call <2 x float> @_Z5asinhDv2_f(<2 x float> <float 0.000000e+00, float -0.000000e+00>)
  ret <2 x float> %c
}

define half @test_tdo_scalar_f16_asinh() {
; CHECK-LABEL: define half @test_tdo_scalar_f16_asinh() {
; CHECK-NEXT:  [[ENTRY:.*:]]
; CHECK-NEXT:    ret half 0xH0000
;
entry:
  %c = call half @_Z5asinhDh(half 0.000000e+00)
  ret half %c
}

define <2 x half> @test_tdo_v2_f16_asinh() {
; CHECK-LABEL: define <2 x half> @test_tdo_v2_f16_asinh() {
; CHECK-NEXT:  [[ENTRY:.*:]]
; CHECK-NEXT:    ret <2 x half> <half 0xH0000, half 0xH8000>
;
entry:
  %c = call <2 x half> @_Z5asinhDv2_Dh(<2 x half> <half 0.000000e+00, half -0.000000e+00>)
  ret <2 x half> %c
}

define double @test_tdo_scalar_f64_asinh() {
; CHECK-LABEL: define double @test_tdo_scalar_f64_asinh() {
; CHECK-NEXT:  [[ENTRY:.*:]]
; CHECK-NEXT:    ret double 0.000000e+00
;
entry:
  %c = call double @_Z5asinhd(double 0.000000e+00)
  ret double %c
}

define <2 x double> @test_tdo_v2_f64_asinh() {
; CHECK-LABEL: define <2 x double> @test_tdo_v2_f64_asinh() {
; CHECK-NEXT:  [[ENTRY:.*:]]
; CHECK-NEXT:    ret <2 x double> <double 0.000000e+00, double -0.000000e+00>
;
entry:
  %c = call <2 x double> @_Z5asinhDv2_d(<2 x double> <double 0.000000e+00, double -0.000000e+00>)
  ret <2 x double> %c
}

declare float        @_Z5asinhf(float)
declare <2 x float>  @_Z5asinhDv2_f(<2 x float>)
declare half         @_Z5asinhDh(half)
declare <2 x half>   @_Z5asinhDv2_Dh(<2 x half>)
declare double       @_Z5asinhd(double)
declare <2 x double> @_Z5asinhDv2_d(<2 x double>)