llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-extendedLLTs-err.mir

# RUN: llc -mtriple=amdgpu12.50 -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=2 -pass-remarks-missed='gisel*' %s -o /dev/null 2>&1 | FileCheck -check-prefix=ERR %s

# ERR: remark: <unknown>:0:0: cannot select: %2:vcc(s1) = G_FCMP floatpred(oeq), %1:vgpr(s32), %0:vgpr (in function: g_fcmp_op2_fconstant_s32)

---
name: g_fcmp_op2_fconstant_s32
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $vgpr0
    %0:vgpr(s32) = COPY $vgpr0
    %1:vgpr(s32) = G_FCONSTANT float 1.0
    %2:vcc(s1) = G_FCMP floatpred(oeq), %1, %0
    S_ENDPGM 0, implicit %2
...

# ERR: remark: <unknown>:0:0: cannot select: %2:vcc(s1) = G_FCMP floatpred(oeq), %0:vgpr(s32), %1:vgpr (in function: g_fcmp_op3_fconstant_s32)

---
name: g_fcmp_op3_fconstant_s32
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $vgpr0
    %0:vgpr(s32) = COPY $vgpr0
    %1:vgpr(s32) = G_FCONSTANT float 1.0
    %2:vcc(s1) = G_FCMP floatpred(oeq), %0, %1
    S_ENDPGM 0, implicit %2
...

# ERR: remark: <unknown>:0:0: cannot select: %2:vgpr(s32) = G_SHL %0:vgpr, %1:vgpr(s32) (in function: g_shl_op0_i32)

---
name: g_shl_op0_i32
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $vgpr0, $vgpr1
    %0:vgpr(s32) = COPY $vgpr0
    %1:vgpr(s32) = COPY $vgpr1
    %2:vgpr(s32) = G_SHL %0, %1
    S_ENDPGM 0, implicit %2
...

# ERR: remark: <unknown>:0:0: cannot select: %1:vgpr(s64) = G_FPEXT %0:vgpr(f32) (in function: g_fpext_op0_f64)

---
name: g_fpext_op0_f64
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $vgpr0
    %0:vgpr(f32) = COPY $vgpr0
    %1:vgpr(s64) = G_FPEXT %0
    S_ENDPGM 0, implicit %1
...

# ERR: remark: <unknown>:0:0: cannot select: %2:vgpr(s32) = G_LSHR %0:vgpr, %1:vgpr(s32) (in function: g_lshr_op0_i32)

---
name: g_lshr_op0_i32
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $vgpr0, $vgpr1
    %0:vgpr(s32) = COPY $vgpr0
    %1:vgpr(s32) = COPY $vgpr1
    %2:vgpr(s32) = G_LSHR %0, %1
    S_ENDPGM 0, implicit %2
...

# ERR: remark: <unknown>:0:0: cannot select: %2:vgpr(s32) = G_ASHR %0:vgpr, %1:vgpr(s32) (in function: g_ashr_op0_i32)

---
name: g_ashr_op0_i32
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $vgpr0, $vgpr1
    %0:vgpr(s32) = COPY $vgpr0
    %1:vgpr(s32) = COPY $vgpr1
    %2:vgpr(s32) = G_ASHR %0, %1
    S_ENDPGM 0, implicit %2
...

# ERR: remark: <unknown>:0:0: cannot select: %1:vgpr(s16) = G_FPTRUNC %0:vgpr(s32) (in function: g_fptrunc_op0_f16)

---
name: g_fptrunc_op0_f16
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $vgpr0
    %0:vgpr(s32) = COPY $vgpr0
    %1:vgpr(s16) = G_FPTRUNC %0
    S_ENDPGM 0, implicit %1
...

# ERR: remark: <unknown>:0:0: cannot select: %1:vgpr_32(s32) = G_ZEXTLOAD %0:vgpr(p3) :: (load (s8), addrspace 3) (in function: g_zextload_op0_i32)

---
name: g_zextload_op0_i32
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $vgpr0
    %0:vgpr(p3) = COPY $vgpr0
    %1:vgpr(s32) = G_ZEXTLOAD %0 :: (load (s8), align 1, addrspace 3)
    $vgpr0 = COPY %1
...

# ERR: remark: <unknown>:0:0: cannot select: %1:vgpr_32(s32) = G_SEXTLOAD %0:vgpr(p3) :: (load (s8), addrspace 3) (in function: g_sextload_op0_i32)

---
name: g_sextload_op0_i32
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $vgpr0
    %0:vgpr(p3) = COPY $vgpr0
    %1:vgpr(s32) = G_SEXTLOAD %0 :: (load (s8), align 1, addrspace 3)
    $vgpr0 = COPY %1
...

# ERR: remark: <unknown>:0:0: cannot select: %2:vgpr(s32) = G_UMIN %0:vgpr, %1:vgpr (in function: g_umin_op0_i32)

---
name: g_umin_op0_i32
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $vgpr0, $vgpr1
    %0:vgpr(s32) = COPY $vgpr0
    %1:vgpr(s32) = COPY $vgpr1
    %2:vgpr(s32) = G_UMIN %0, %1
    S_ENDPGM 0, implicit %2
...

# ERR: remark: <unknown>:0:0: cannot select: %2:vgpr(s64) = G_UMIN %0:vgpr, %1:vgpr (in function: g_umin_op0_i64)

---
name: g_umin_op0_i64
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
    %0:vgpr(s64) = COPY $vgpr0_vgpr1
    %1:vgpr(s64) = COPY $vgpr2_vgpr3
    %2:vgpr(s64) = G_UMIN %0, %1
    S_ENDPGM 0, implicit %2
...

# ERR: remark: <unknown>:0:0: cannot select: %2:vgpr(s32) = G_UMAX %0:vgpr, %1:vgpr (in function: g_umax_op0_i32)

---
name: g_umax_op0_i32
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $vgpr0, $vgpr1
    %0:vgpr(s32) = COPY $vgpr0
    %1:vgpr(s32) = COPY $vgpr1
    %2:vgpr(s32) = G_UMAX %0, %1
    S_ENDPGM 0, implicit %2
...

# ERR: remark: <unknown>:0:0: cannot select: %1:vgpr_32(s32) = G_UITOFP %0:vgpr(s32) (in function: g_uitofp_op0_f32)

---
name: g_uitofp_op0_f32
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $vgpr0
    %0:vgpr(s32) = COPY $vgpr0
    %1:vgpr(s32) = G_UITOFP %0
    $vgpr0 = COPY %1
...

# ERR: remark: <unknown>:0:0: cannot select: %2:vgpr(s64) = G_UMAX %0:vgpr, %1:vgpr (in function: g_umax_op0_i64)

---
name: g_umax_op0_i64
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
    %0:vgpr(s64) = COPY $vgpr0_vgpr1
    %1:vgpr(s64) = COPY $vgpr2_vgpr3
    %2:vgpr(s64) = G_UMAX %0, %1
    S_ENDPGM 0, implicit %2
...

# ERR: remark: <unknown>:0:0: cannot select: %2:vgpr(s32) = G_SMIN %0:vgpr, %1:vgpr (in function: g_smin_op0_i32)

---
name: g_smin_op0_i32
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $vgpr0, $vgpr1
    %0:vgpr(s32) = COPY $vgpr0
    %1:vgpr(s32) = COPY $vgpr1
    %2:vgpr(s32) = G_SMIN %0, %1
    S_ENDPGM 0, implicit %2
...

# ERR: remark: <unknown>:0:0: cannot select: %2:vgpr(s32) = G_SMAX %0:vgpr, %1:vgpr (in function: g_smax_op0_i32)

---
name: g_smax_op0_i32
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $vgpr0, $vgpr1
    %0:vgpr(s32) = COPY $vgpr0
    %1:vgpr(s32) = COPY $vgpr1
    %2:vgpr(s32) = G_SMAX %0, %1
    S_ENDPGM 0, implicit %2
...

# ERR: remark: <unknown>:0:0: cannot select: %3:vgpr_32(s32) = G_FMA %0:vgpr, %1:vgpr, %2:vgpr (in function: g_fma_op0_f32)

---
name: g_fma_op0_f32
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $vgpr0, $vgpr1, $vgpr2
    %0:vgpr(s32) = COPY $vgpr0
    %1:vgpr(s32) = COPY $vgpr1
    %2:vgpr(s32) = COPY $vgpr2
    %3:vgpr(s32) = G_FMA %0, %1, %2
    $vgpr0 = COPY %3
...

# ERR: remark: <unknown>:0:0: cannot select: %1:vgpr_32(f32) = G_UITOFP %0:vgpr(s32) (in function: g_uitofp_op1_i32)

---
name: g_uitofp_op1_i32
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $vgpr0
    %0:vgpr(s32) = COPY $vgpr0
    %1:vgpr(f32) = G_UITOFP %0
    $vgpr0 = COPY %1
...

# ERR: remark: <unknown>:0:0: cannot select: %2:vgpr_32(s32) = G_FMAXNUM %0:vgpr, %1:vgpr (in function: g_fmaxnum_op0_f32)

---
name: g_fmaxnum_op0_f32
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $vgpr0, $vgpr1
    %0:vgpr(s32) = COPY $vgpr0
    %1:vgpr(s32) = COPY $vgpr1
    %2:vgpr(s32) = G_FMAXNUM %0, %1
    $vgpr0 = COPY %2
...

# ERR: remark: <unknown>:0:0: cannot select: %2:vgpr_32(s32) = G_FMINNUM %0:vgpr, %1:vgpr (in function: g_fminnum_op0_f32)

---
name: g_fminnum_op0_f32
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $vgpr0, $vgpr1
    %0:vgpr(s32) = COPY $vgpr0
    %1:vgpr(s32) = COPY $vgpr1
    %2:vgpr(s32) = G_FMINNUM %0, %1
    $vgpr0 = COPY %2
...

# ERR: remark: <unknown>:0:0: cannot select: %2:vgpr_32(s32) = G_FMAXNUM_IEEE %0:vgpr, %1:vgpr (in function: g_fmaxnum_ieee_op0_f32)

---
name: g_fmaxnum_ieee_op0_f32
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $vgpr0, $vgpr1
    %0:vgpr(s32) = COPY $vgpr0
    %1:vgpr(s32) = COPY $vgpr1
    %2:vgpr(s32) = G_FMAXNUM_IEEE %0, %1
    $vgpr0 = COPY %2
...

# ERR: remark: <unknown>:0:0: cannot select: %2:vgpr_32(s32) = G_FMINNUM_IEEE %0:vgpr, %1:vgpr (in function: g_fminnum_ieee_op0_f32)

---
name: g_fminnum_ieee_op0_f32
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $vgpr0, $vgpr1
    %0:vgpr(s32) = COPY $vgpr0
    %1:vgpr(s32) = COPY $vgpr1
    %2:vgpr(s32) = G_FMINNUM_IEEE %0, %1
    $vgpr0 = COPY %2
...

# ERR: remark: <unknown>:0:0: cannot select: %2:vcc(s1) = G_INTRINSIC intrinsic(@llvm.amdgcn.class), %0:vgpr(s32), %1:vgpr(s32) (in function: g_intrinsic_amdgcn_class_op2_f32)

---
name: g_intrinsic_amdgcn_class_op2_f32
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $vgpr0, $vgpr1
    %0:vgpr(s32) = COPY $vgpr0
    %1:vgpr(s32) = COPY $vgpr1
    %2:vcc(s1) = G_INTRINSIC intrinsic(@llvm.amdgcn.class), %0, %1
    S_ENDPGM 0, implicit %2
...

# ERR: remark: <unknown>:0:0: cannot select: %1:sgpr(s32) = G_INTRINSIC_CONVERGENT intrinsic(@llvm.amdgcn.readfirstlane), %0:vgpr(s32) (in function: g_intrinsic_convergent_amdgcn_readfirstlane_op0_i32)

---
name: g_intrinsic_convergent_amdgcn_readfirstlane_op0_i32
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $vgpr0
    %0:vgpr(s32) = COPY $vgpr0
    %1:sgpr(s32) = G_INTRINSIC_CONVERGENT intrinsic(@llvm.amdgcn.readfirstlane), %0
    S_ENDPGM 0, implicit %1
...

# ERR: remark: <unknown>:0:0: cannot select: %2:vgpr(s32) = G_AMDGPU_ATOMIC_CMPXCHG %0:vgpr(p1), %1:vgpr :: (load store seq_cst (s32), addrspace 1) (in function: g_amdgpu_atomic_cmpxchg_op0_i32)

---
name: g_amdgpu_atomic_cmpxchg_op0_i32
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
    %0:vgpr(p1) = COPY $vgpr0_vgpr1
    %1:vgpr(s64) = COPY $vgpr2_vgpr3
    %2:vgpr(s32) = G_AMDGPU_ATOMIC_CMPXCHG %0, %1 :: (load store seq_cst (s32), addrspace 1)
    S_ENDPGM 0, implicit %2
...

# ERR: remark: <unknown>:0:0: cannot select: %1:vgpr(s32) = G_AMDGPU_FFBH_U32 %0:vgpr(s32) (in function: g_amdgpu_ffbh_u32_op1_i32)

---
name: g_amdgpu_ffbh_u32_op1_i32
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $vgpr0
    %0:vgpr(s32) = COPY $vgpr0
    %1:vgpr(s32) = G_AMDGPU_FFBH_U32 %0
    S_ENDPGM 0, implicit %1
...

# ERR: remark: <unknown>:0:0: cannot select: %1:vgpr(s32) = G_AMDGPU_FFBL_B32 %0:vgpr(s32) (in function: g_amdgpu_ffbl_b32_op1_i32)

---
name: g_amdgpu_ffbl_b32_op1_i32
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $vgpr0
    %0:vgpr(s32) = COPY $vgpr0
    %1:vgpr(s32) = G_AMDGPU_FFBL_B32 %0
    S_ENDPGM 0, implicit %1
...

# ERR: remark: <unknown>:0:0: cannot select: %1:vgpr(s32) = G_BITREVERSE %0:vgpr (in function: g_bitreverse_op0_i32)

---
name: g_bitreverse_op0_i32
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $vgpr0
    %0:vgpr(s32) = COPY $vgpr0
    %1:vgpr(s32) = G_BITREVERSE %0
    S_ENDPGM 0, implicit %1
...

# ERR: remark: <unknown>:0:0: cannot select: %2:vcc(s1) = G_FCMP floatpred(oeq), %0:vgpr(s32), %1:vgpr (in function: g_fcmp_op2_f32)

---
name: g_fcmp_op2_f32
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $vgpr0, $vgpr1
    %0:vgpr(s32) = COPY $vgpr0
    %1:vgpr(s32) = COPY $vgpr1
    %2:vcc(s1) = G_FCMP floatpred(oeq), %0, %1
    S_ENDPGM 0, implicit %2
...

# ERR: remark: <unknown>:0:0: cannot select: %1:vgpr(s32) = G_CTLZ_ZERO_POISON %0:vgpr(s32) (in function: g_ctlz_zero_poison_op1_i32)

---
name: g_ctlz_zero_poison_op1_i32
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $vgpr0
    %0:vgpr(s32) = COPY $vgpr0
    %1:vgpr(s32) = G_CTLZ_ZERO_POISON %0
    S_ENDPGM 0, implicit %1
...

# ERR: remark: <unknown>:0:0: cannot select: %1:vgpr(s32) = G_CTPOP %0:vgpr(s32) (in function: g_ctpop_op0_i32)

---
name: g_ctpop_op0_i32
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $vgpr0
    %0:vgpr(s32) = COPY $vgpr0
    %1:vgpr(s32) = G_CTPOP %0
    S_ENDPGM 0, implicit %1
...

# ERR: remark: <unknown>:0:0: cannot select: %1:vgpr(s32) = G_CTTZ_ZERO_POISON %0:vgpr(s32) (in function: g_cttz_zero_poison_op1_i32)

---
name: g_cttz_zero_poison_op1_i32
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $vgpr0
    %0:vgpr(s32) = COPY $vgpr0
    %1:vgpr(s32) = G_CTTZ_ZERO_POISON %0
    S_ENDPGM 0, implicit %1
...

# ERR: remark: <unknown>:0:0: cannot select: %2:vgpr(s32) = G_FADD %0:vgpr, %1:vgpr (in function: g_fadd_op0_f32)

---
name: g_fadd_op0_f32
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $vgpr0, $vgpr1
    %0:vgpr(s32) = COPY $vgpr0
    %1:vgpr(s32) = COPY $vgpr1
    %2:vgpr(s32) = G_FADD %0, %1
    S_ENDPGM 0, implicit %2
...

# ERR: remark: <unknown>:0:0: cannot select: %1:vgpr(s32) = G_FCANONICALIZE %0:vgpr (in function: g_fcanonicalize_op0_f32)

---
name: g_fcanonicalize_op0_f32
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $vgpr0
    %0:vgpr(s32) = COPY $vgpr0
    %1:vgpr(s32) = G_FCANONICALIZE %0
    S_ENDPGM 0, implicit %1
...

# ERR: remark: <unknown>:0:0: cannot select: %1:vgpr(s32) = G_FNEG %0:vgpr (in function: g_fneg_op0_f32)

---
name: g_fneg_op0_f32
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $vgpr0
    %0:vgpr(s32) = COPY $vgpr0
    %1:vgpr(s32) = G_FNEG %0
    S_ENDPGM 0, implicit %1
...

# ERR: remark: <unknown>:0:0: cannot select: %1:vgpr(s32) = G_FFLOOR %0:vgpr (in function: g_ffloor_op0_f32)

---
name: g_ffloor_op0_f32
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $vgpr0
    %0:vgpr(s32) = COPY $vgpr0
    %1:vgpr(s32) = G_FFLOOR %0
    S_ENDPGM 0, implicit %1
...

# ERR: remark: <unknown>:0:0: cannot select: %1:vgpr(s32) = G_FEXP2 %0:vgpr (in function: g_fexp2_op0_f32)

---
name: g_fexp2_op0_f32
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $vgpr0
    %0:vgpr(s32) = COPY $vgpr0
    %1:vgpr(s32) = G_FEXP2 %0
    S_ENDPGM 0, implicit %1
...

# ERR: remark: <unknown>:0:0: cannot select: %2:vgpr(s32) = G_FMUL %0:vgpr, %1:vgpr (in function: g_fmul_op0_f32)

---
name: g_fmul_op0_f32
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $vgpr0, $vgpr1
    %0:vgpr(s32) = COPY $vgpr0
    %1:vgpr(s32) = COPY $vgpr1
    %2:vgpr(s32) = G_FMUL %0, %1
    S_ENDPGM 0, implicit %2
...

# ERR: remark: <unknown>:0:0: cannot select: %1:vgpr(s32) = G_FABS %0:vgpr (in function: g_fabs_op0_f32)

---
name: g_fabs_op0_f32
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $vgpr0
    %0:vgpr(s32) = COPY $vgpr0
    %1:vgpr(s32) = G_FABS %0
    S_ENDPGM 0, implicit %1
...

# ERR: remark: <unknown>:0:0: cannot select: %1:vgpr(s32) = G_FPTOSI %0:vgpr(s32) (in function: g_fptosi_op0_i32)

---
name: g_fptosi_op0_i32
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $vgpr0
    %0:vgpr(s32) = COPY $vgpr0
    %1:vgpr(s32) = G_FPTOSI %0
    S_ENDPGM 0, implicit %1
...

# ERR: remark: <unknown>:0:0: cannot select: %1:vgpr(s32) = G_FPTOUI %0:vgpr(s32) (in function: g_fptoui_op0_i32)

---
name: g_fptoui_op0_i32
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $vgpr0
    %0:vgpr(s32) = COPY $vgpr0
    %1:vgpr(s32) = G_FPTOUI %0
    S_ENDPGM 0, implicit %1
...

# ERR: remark: <unknown>:0:0: cannot select: %3:vgpr(s32) = G_FSHR %0:vgpr, %1:vgpr, %2:vgpr(s32) (in function: g_fshr_op3_i32)

---
name: g_fshr_op3_i32
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $vgpr0, $vgpr1, $vgpr2
    %0:vgpr(s32) = COPY $vgpr0
    %1:vgpr(s32) = COPY $vgpr1
    %2:vgpr(s32) = COPY $vgpr2
    %3:vgpr(s32) = G_FSHR %0, %1, %2
    S_ENDPGM 0, implicit %3
...

# ERR: remark: <unknown>:0:0: cannot select: %1:vgpr(s32) = G_INTRINSIC_TRUNC %0:vgpr (in function: g_intrinsic_trunc_op0_f32)

---
name: g_intrinsic_trunc_op0_f32
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $vgpr0
    %0:vgpr(s32) = COPY $vgpr0
    %1:vgpr(s32) = G_INTRINSIC_TRUNC %0
    S_ENDPGM 0, implicit %1
...