llvm/test/CodeGen/AMDGPU/GlobalISel/fceil.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc -mtriple=amdgcn -mcpu=fiji -global-isel=1 -new-reg-bank-select < %s | FileCheck -check-prefix=FIJI %s
; RUN: llc -mtriple=amdgcn -mcpu=gfx1200 -global-isel=1 -new-reg-bank-select < %s | FileCheck -check-prefix=GFX12 %s

define float @fceil_s(float inreg %val) {
; FIJI-LABEL: fceil_s:
; FIJI:       ; %bb.0:
; FIJI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; FIJI-NEXT:    v_ceil_f32_e32 v0, s16
; FIJI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-LABEL: fceil_s:
; GFX12:       ; %bb.0:
; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT:    s_wait_expcnt 0x0
; GFX12-NEXT:    s_wait_samplecnt 0x0
; GFX12-NEXT:    s_wait_bvhcnt 0x0
; GFX12-NEXT:    s_wait_kmcnt 0x0
; GFX12-NEXT:    s_ceil_f32 s0, s0
; GFX12-NEXT:    s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT:    s_delay_alu instid0(SALU_CYCLE_2)
; GFX12-NEXT:    v_mov_b32_e32 v0, s0
; GFX12-NEXT:    s_setpc_b64 s[30:31]
  %result = call float @llvm.ceil.f32(float %val)
  ret float %result
}

define float @fceil_v(float %val) {
; FIJI-LABEL: fceil_v:
; FIJI:       ; %bb.0:
; FIJI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; FIJI-NEXT:    v_ceil_f32_e32 v0, v0
; FIJI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-LABEL: fceil_v:
; GFX12:       ; %bb.0:
; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT:    s_wait_expcnt 0x0
; GFX12-NEXT:    s_wait_samplecnt 0x0
; GFX12-NEXT:    s_wait_bvhcnt 0x0
; GFX12-NEXT:    s_wait_kmcnt 0x0
; GFX12-NEXT:    v_ceil_f32_e32 v0, v0
; GFX12-NEXT:    s_setpc_b64 s[30:31]
  %result = call float @llvm.ceil.f32(float %val)
  ret float %result
}

define half @fceil_s16_s(half inreg %val) {
; FIJI-LABEL: fceil_s16_s:
; FIJI:       ; %bb.0:
; FIJI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; FIJI-NEXT:    v_ceil_f16_e32 v0, s16
; FIJI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-LABEL: fceil_s16_s:
; GFX12:       ; %bb.0:
; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT:    s_wait_expcnt 0x0
; GFX12-NEXT:    s_wait_samplecnt 0x0
; GFX12-NEXT:    s_wait_bvhcnt 0x0
; GFX12-NEXT:    s_wait_kmcnt 0x0
; GFX12-NEXT:    s_ceil_f16 s0, s0
; GFX12-NEXT:    s_wait_alu depctr_sa_sdst(0)
; GFX12-NEXT:    s_delay_alu instid0(SALU_CYCLE_2)
; GFX12-NEXT:    v_mov_b32_e32 v0, s0
; GFX12-NEXT:    s_setpc_b64 s[30:31]
  %result = call half @llvm.ceil.f16(half %val)
  ret half %result
}

define half @fceil_s16_v(half %val) {
; FIJI-LABEL: fceil_s16_v:
; FIJI:       ; %bb.0:
; FIJI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; FIJI-NEXT:    v_ceil_f16_e32 v0, v0
; FIJI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-LABEL: fceil_s16_v:
; GFX12:       ; %bb.0:
; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT:    s_wait_expcnt 0x0
; GFX12-NEXT:    s_wait_samplecnt 0x0
; GFX12-NEXT:    s_wait_bvhcnt 0x0
; GFX12-NEXT:    s_wait_kmcnt 0x0
; GFX12-NEXT:    v_ceil_f16_e32 v0.l, v0.l
; GFX12-NEXT:    s_setpc_b64 s[30:31]
  %result = call half @llvm.ceil.f16(half %val)
  ret half %result
}

define double @fceil_s64_v(double %val) {
; FIJI-LABEL: fceil_s64_v:
; FIJI:       ; %bb.0:
; FIJI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; FIJI-NEXT:    v_ceil_f64_e32 v[0:1], v[0:1]
; FIJI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-LABEL: fceil_s64_v:
; GFX12:       ; %bb.0:
; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT:    s_wait_expcnt 0x0
; GFX12-NEXT:    s_wait_samplecnt 0x0
; GFX12-NEXT:    s_wait_bvhcnt 0x0
; GFX12-NEXT:    s_wait_kmcnt 0x0
; GFX12-NEXT:    v_ceil_f64_e32 v[0:1], v[0:1]
; GFX12-NEXT:    s_setpc_b64 s[30:31]
  %result = call double @llvm.ceil.f64(double %val)
  ret double %result
}


define double @fceil_s64_s(double inreg %val) {
; FIJI-LABEL: fceil_s64_s:
; FIJI:       ; %bb.0:
; FIJI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; FIJI-NEXT:    v_ceil_f64_e32 v[0:1], s[16:17]
; FIJI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX12-LABEL: fceil_s64_s:
; GFX12:       ; %bb.0:
; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT:    s_wait_expcnt 0x0
; GFX12-NEXT:    s_wait_samplecnt 0x0
; GFX12-NEXT:    s_wait_bvhcnt 0x0
; GFX12-NEXT:    s_wait_kmcnt 0x0
; GFX12-NEXT:    v_ceil_f64_e32 v[0:1], s[0:1]
; GFX12-NEXT:    s_setpc_b64 s[30:31]
  %result = call double @llvm.ceil.f64(double %val)
  ret double %result
}

declare float @llvm.ceil.f32(float)
declare half @llvm.ceil.f16(half)
declare double @llvm.ceil.f64(double)