llvm/test/CodeGen/AArch64/sve-fixed-length-fptrunc.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
; RUN: llc -mtriple=aarch64 %s -o - | FileCheck %s

define <8 x bfloat> @fptrunc_v8bf16(<8 x float> %a) #0 {
; CHECK-LABEL: fptrunc_v8bf16:
; CHECK:       // %bb.0:
; CHECK-NEXT:    ptrue p0.d, vl2
; CHECK-NEXT:    // kill: def $q0 killed $q0 def $z0
; CHECK-NEXT:    // kill: def $q1 killed $q1 def $z1
; CHECK-NEXT:    splice z0.d, p0, z0.d, z1.d
; CHECK-NEXT:    ptrue p0.s
; CHECK-NEXT:    bfcvt z0.h, p0/m, z0.s
; CHECK-NEXT:    uzp1 z0.h, z0.h, z0.h
; CHECK-NEXT:    // kill: def $q0 killed $q0 killed $z0
; CHECK-NEXT:    ret
  %fpt = fptrunc <8 x float> %a to <8 x bfloat>
  ret <8 x bfloat> %fpt
}

define <8 x half> @fptrunc_v8f16(<8 x float> %a) #0 {
; CHECK-LABEL: fptrunc_v8f16:
; CHECK:       // %bb.0:
; CHECK-NEXT:    ptrue p0.d, vl2
; CHECK-NEXT:    // kill: def $q0 killed $q0 def $z0
; CHECK-NEXT:    // kill: def $q1 killed $q1 def $z1
; CHECK-NEXT:    splice z0.d, p0, z0.d, z1.d
; CHECK-NEXT:    ptrue p0.s
; CHECK-NEXT:    fcvt z0.h, p0/m, z0.s
; CHECK-NEXT:    uzp1 z0.h, z0.h, z0.h
; CHECK-NEXT:    // kill: def $q0 killed $q0 killed $z0
; CHECK-NEXT:    ret
  %fpt = fptrunc <8 x float> %a to <8 x half>
  ret <8 x half> %fpt
}

attributes #0 = { vscale_range(2,2) "target-features"="+bf16,+sve" }