blob: ecde58f35748945612013a5650155ddecc34e014 [file] [edit]
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc < %s -mtriple=aarch64 -mattr=+sve2-bitperm | FileCheck %s --check-prefix=BITPERM
; RUN: llc < %s -mtriple=aarch64 -mattr=+sve2 | FileCheck %s --check-prefix=NOSVE2BITPERM
define i8 @pext_i8(i8 %val, i8 %mask) nounwind {
; BITPERM-LABEL: pext_i8:
; BITPERM: // %bb.0:
; BITPERM-NEXT: and w8, w1, #0xff
; BITPERM-NEXT: fmov s0, w0
; BITPERM-NEXT: fmov s1, w8
; BITPERM-NEXT: bext z0.s, z0.s, z1.s
; BITPERM-NEXT: fmov w0, s0
; BITPERM-NEXT: ret
;
; NOSVE2BITPERM-LABEL: pext_i8:
; NOSVE2BITPERM: // %bb.0:
; NOSVE2BITPERM-NEXT: mvn w9, w1
; NOSVE2BITPERM-NEXT: mov w8, #-1 // =0xffffffff
; NOSVE2BITPERM-NEXT: and w10, w0, w1
; NOSVE2BITPERM-NEXT: lsl w9, w9, #1
; NOSVE2BITPERM-NEXT: fmov s0, w8
; NOSVE2BITPERM-NEXT: fmov s1, w9
; NOSVE2BITPERM-NEXT: pmul v1.8b, v1.8b, v0.8b
; NOSVE2BITPERM-NEXT: fmov w8, s1
; NOSVE2BITPERM-NEXT: bic w9, w9, w8
; NOSVE2BITPERM-NEXT: and w8, w8, w1
; NOSVE2BITPERM-NEXT: fmov s1, w9
; NOSVE2BITPERM-NEXT: and w11, w10, w8
; NOSVE2BITPERM-NEXT: eor w13, w1, w8
; NOSVE2BITPERM-NEXT: and w8, w8, #0xfe
; NOSVE2BITPERM-NEXT: eor w10, w10, w11
; NOSVE2BITPERM-NEXT: and w11, w11, #0xfe
; NOSVE2BITPERM-NEXT: orr w8, w13, w8, lsr #1
; NOSVE2BITPERM-NEXT: pmul v1.8b, v1.8b, v0.8b
; NOSVE2BITPERM-NEXT: fmov w12, s1
; NOSVE2BITPERM-NEXT: bic w9, w9, w12
; NOSVE2BITPERM-NEXT: fmov s1, w9
; NOSVE2BITPERM-NEXT: orr w9, w10, w11, lsr #1
; NOSVE2BITPERM-NEXT: and w10, w12, w8
; NOSVE2BITPERM-NEXT: eor w8, w8, w10
; NOSVE2BITPERM-NEXT: and w11, w9, w10
; NOSVE2BITPERM-NEXT: and w10, w10, #0xfc
; NOSVE2BITPERM-NEXT: pmul v0.8b, v1.8b, v0.8b
; NOSVE2BITPERM-NEXT: orr w8, w8, w10, lsr #2
; NOSVE2BITPERM-NEXT: eor w9, w9, w11
; NOSVE2BITPERM-NEXT: and w11, w11, #0xfc
; NOSVE2BITPERM-NEXT: orr w9, w9, w11, lsr #2
; NOSVE2BITPERM-NEXT: fmov w10, s0
; NOSVE2BITPERM-NEXT: and w8, w10, w8
; NOSVE2BITPERM-NEXT: and w8, w9, w8
; NOSVE2BITPERM-NEXT: eor w9, w9, w8
; NOSVE2BITPERM-NEXT: and w8, w8, #0xf0
; NOSVE2BITPERM-NEXT: orr w0, w9, w8, lsr #4
; NOSVE2BITPERM-NEXT: ret
%res = call i8 @llvm.pext.i8(i8 %val, i8 %mask)
ret i8 %res
}
define i16 @pext_i16(i16 %val, i16 %mask) nounwind {
; BITPERM-LABEL: pext_i16:
; BITPERM: // %bb.0:
; BITPERM-NEXT: and w8, w1, #0xffff
; BITPERM-NEXT: fmov s0, w0
; BITPERM-NEXT: fmov s1, w8
; BITPERM-NEXT: bext z0.s, z0.s, z1.s
; BITPERM-NEXT: fmov w0, s0
; BITPERM-NEXT: ret
;
; NOSVE2BITPERM-LABEL: pext_i16:
; NOSVE2BITPERM: // %bb.0:
; NOSVE2BITPERM-NEXT: mvn w8, w1
; NOSVE2BITPERM-NEXT: and w11, w0, w1
; NOSVE2BITPERM-NEXT: lsl w9, w8, #1
; NOSVE2BITPERM-NEXT: eor w8, w9, w8, lsl #2
; NOSVE2BITPERM-NEXT: eor w8, w8, w8, lsl #2
; NOSVE2BITPERM-NEXT: eor w8, w8, w8, lsl #4
; NOSVE2BITPERM-NEXT: eor w8, w8, w8, lsl #8
; NOSVE2BITPERM-NEXT: bic w9, w9, w8
; NOSVE2BITPERM-NEXT: and w8, w8, w1
; NOSVE2BITPERM-NEXT: eor w10, w9, w9, lsl #1
; NOSVE2BITPERM-NEXT: and w13, w11, w8
; NOSVE2BITPERM-NEXT: eor w14, w1, w8
; NOSVE2BITPERM-NEXT: and w8, w8, #0xfffe
; NOSVE2BITPERM-NEXT: eor w11, w11, w13
; NOSVE2BITPERM-NEXT: and w13, w13, #0xfffe
; NOSVE2BITPERM-NEXT: eor w10, w10, w10, lsl #2
; NOSVE2BITPERM-NEXT: orr w8, w14, w8, lsr #1
; NOSVE2BITPERM-NEXT: orr w11, w11, w13, lsr #1
; NOSVE2BITPERM-NEXT: eor w10, w10, w10, lsl #4
; NOSVE2BITPERM-NEXT: eor w10, w10, w10, lsl #8
; NOSVE2BITPERM-NEXT: bic w9, w9, w10
; NOSVE2BITPERM-NEXT: and w10, w10, w8
; NOSVE2BITPERM-NEXT: eor w12, w9, w9, lsl #1
; NOSVE2BITPERM-NEXT: and w13, w11, w10
; NOSVE2BITPERM-NEXT: eor w8, w8, w10
; NOSVE2BITPERM-NEXT: and w10, w10, #0xfffc
; NOSVE2BITPERM-NEXT: eor w11, w11, w13
; NOSVE2BITPERM-NEXT: and w13, w13, #0xfffc
; NOSVE2BITPERM-NEXT: eor w12, w12, w12, lsl #2
; NOSVE2BITPERM-NEXT: orr w8, w8, w10, lsr #2
; NOSVE2BITPERM-NEXT: orr w10, w11, w13, lsr #2
; NOSVE2BITPERM-NEXT: eor w12, w12, w12, lsl #4
; NOSVE2BITPERM-NEXT: eor w12, w12, w12, lsl #8
; NOSVE2BITPERM-NEXT: bic w9, w9, w12
; NOSVE2BITPERM-NEXT: and w11, w12, w8
; NOSVE2BITPERM-NEXT: eor w9, w9, w9, lsl #1
; NOSVE2BITPERM-NEXT: and w12, w10, w11
; NOSVE2BITPERM-NEXT: eor w8, w8, w11
; NOSVE2BITPERM-NEXT: eor w10, w10, w12
; NOSVE2BITPERM-NEXT: and w12, w12, #0xfff0
; NOSVE2BITPERM-NEXT: and w11, w11, #0xfff0
; NOSVE2BITPERM-NEXT: eor w9, w9, w9, lsl #2
; NOSVE2BITPERM-NEXT: orr w10, w10, w12, lsr #4
; NOSVE2BITPERM-NEXT: orr w8, w8, w11, lsr #4
; NOSVE2BITPERM-NEXT: eor w9, w9, w9, lsl #4
; NOSVE2BITPERM-NEXT: and w8, w10, w8
; NOSVE2BITPERM-NEXT: eor w9, w9, w9, lsl #8
; NOSVE2BITPERM-NEXT: and w8, w8, w9
; NOSVE2BITPERM-NEXT: eor w9, w10, w8
; NOSVE2BITPERM-NEXT: and w8, w8, #0xff00
; NOSVE2BITPERM-NEXT: orr w0, w9, w8, lsr #8
; NOSVE2BITPERM-NEXT: ret
%res = call i16 @llvm.pext.i16(i16 %val, i16 %mask)
ret i16 %res
}
define i32 @pext_i32(i32 %val, i32 %mask) nounwind {
; BITPERM-LABEL: pext_i32:
; BITPERM: // %bb.0:
; BITPERM-NEXT: fmov s0, w1
; BITPERM-NEXT: fmov s1, w0
; BITPERM-NEXT: bext z0.s, z1.s, z0.s
; BITPERM-NEXT: fmov w0, s0
; BITPERM-NEXT: ret
;
; NOSVE2BITPERM-LABEL: pext_i32:
; NOSVE2BITPERM: // %bb.0:
; NOSVE2BITPERM-NEXT: mvn w8, w1
; NOSVE2BITPERM-NEXT: and w13, w0, w1
; NOSVE2BITPERM-NEXT: lsl w9, w8, #1
; NOSVE2BITPERM-NEXT: eor w8, w9, w8, lsl #2
; NOSVE2BITPERM-NEXT: eor w8, w8, w8, lsl #2
; NOSVE2BITPERM-NEXT: eor w8, w8, w8, lsl #4
; NOSVE2BITPERM-NEXT: eor w8, w8, w8, lsl #8
; NOSVE2BITPERM-NEXT: eor w8, w8, w8, lsl #16
; NOSVE2BITPERM-NEXT: bic w9, w9, w8
; NOSVE2BITPERM-NEXT: and w8, w8, w1
; NOSVE2BITPERM-NEXT: eor w10, w9, w9, lsl #1
; NOSVE2BITPERM-NEXT: and w14, w13, w8
; NOSVE2BITPERM-NEXT: eor w15, w1, w8
; NOSVE2BITPERM-NEXT: orr w8, w15, w8, lsr #1
; NOSVE2BITPERM-NEXT: eor w13, w13, w14
; NOSVE2BITPERM-NEXT: eor w10, w10, w10, lsl #2
; NOSVE2BITPERM-NEXT: orr w13, w13, w14, lsr #1
; NOSVE2BITPERM-NEXT: eor w10, w10, w10, lsl #4
; NOSVE2BITPERM-NEXT: eor w10, w10, w10, lsl #8
; NOSVE2BITPERM-NEXT: eor w10, w10, w10, lsl #16
; NOSVE2BITPERM-NEXT: bic w9, w9, w10
; NOSVE2BITPERM-NEXT: and w10, w10, w8
; NOSVE2BITPERM-NEXT: eor w11, w9, w9, lsl #1
; NOSVE2BITPERM-NEXT: and w14, w13, w10
; NOSVE2BITPERM-NEXT: eor w8, w8, w10
; NOSVE2BITPERM-NEXT: orr w8, w8, w10, lsr #2
; NOSVE2BITPERM-NEXT: eor w10, w13, w14
; NOSVE2BITPERM-NEXT: eor w11, w11, w11, lsl #2
; NOSVE2BITPERM-NEXT: orr w10, w10, w14, lsr #2
; NOSVE2BITPERM-NEXT: eor w11, w11, w11, lsl #4
; NOSVE2BITPERM-NEXT: eor w11, w11, w11, lsl #8
; NOSVE2BITPERM-NEXT: eor w11, w11, w11, lsl #16
; NOSVE2BITPERM-NEXT: bic w9, w9, w11
; NOSVE2BITPERM-NEXT: and w11, w11, w8
; NOSVE2BITPERM-NEXT: eor w12, w9, w9, lsl #1
; NOSVE2BITPERM-NEXT: and w13, w10, w11
; NOSVE2BITPERM-NEXT: eor w8, w8, w11
; NOSVE2BITPERM-NEXT: eor w10, w10, w13
; NOSVE2BITPERM-NEXT: orr w8, w8, w11, lsr #4
; NOSVE2BITPERM-NEXT: eor w12, w12, w12, lsl #2
; NOSVE2BITPERM-NEXT: orr w10, w10, w13, lsr #4
; NOSVE2BITPERM-NEXT: eor w12, w12, w12, lsl #4
; NOSVE2BITPERM-NEXT: eor w12, w12, w12, lsl #8
; NOSVE2BITPERM-NEXT: eor w12, w12, w12, lsl #16
; NOSVE2BITPERM-NEXT: bic w9, w9, w12
; NOSVE2BITPERM-NEXT: and w11, w12, w8
; NOSVE2BITPERM-NEXT: eor w9, w9, w9, lsl #1
; NOSVE2BITPERM-NEXT: and w12, w10, w11
; NOSVE2BITPERM-NEXT: eor w8, w8, w11
; NOSVE2BITPERM-NEXT: eor w10, w10, w12
; NOSVE2BITPERM-NEXT: orr w8, w8, w11, lsr #8
; NOSVE2BITPERM-NEXT: eor w9, w9, w9, lsl #2
; NOSVE2BITPERM-NEXT: orr w10, w10, w12, lsr #8
; NOSVE2BITPERM-NEXT: eor w9, w9, w9, lsl #4
; NOSVE2BITPERM-NEXT: and w8, w10, w8
; NOSVE2BITPERM-NEXT: eor w9, w9, w9, lsl #8
; NOSVE2BITPERM-NEXT: eor w9, w9, w9, lsl #16
; NOSVE2BITPERM-NEXT: and w8, w8, w9
; NOSVE2BITPERM-NEXT: eor w9, w10, w8
; NOSVE2BITPERM-NEXT: orr w0, w9, w8, lsr #16
; NOSVE2BITPERM-NEXT: ret
%res = call i32 @llvm.pext.i32(i32 %val, i32 %mask)
ret i32 %res
}
define i64 @pext_i64(i64 %val, i64 %mask) nounwind {
; BITPERM-LABEL: pext_i64:
; BITPERM: // %bb.0:
; BITPERM-NEXT: fmov d0, x1
; BITPERM-NEXT: fmov d1, x0
; BITPERM-NEXT: bext z0.d, z1.d, z0.d
; BITPERM-NEXT: fmov x0, d0
; BITPERM-NEXT: ret
;
; NOSVE2BITPERM-LABEL: pext_i64:
; NOSVE2BITPERM: // %bb.0:
; NOSVE2BITPERM-NEXT: mvn x8, x1
; NOSVE2BITPERM-NEXT: and x14, x0, x1
; NOSVE2BITPERM-NEXT: lsl x9, x8, #1
; NOSVE2BITPERM-NEXT: eor x8, x9, x8, lsl #2
; NOSVE2BITPERM-NEXT: eor x8, x8, x8, lsl #2
; NOSVE2BITPERM-NEXT: eor x8, x8, x8, lsl #4
; NOSVE2BITPERM-NEXT: eor x8, x8, x8, lsl #8
; NOSVE2BITPERM-NEXT: eor x8, x8, x8, lsl #16
; NOSVE2BITPERM-NEXT: eor x8, x8, x8, lsl #32
; NOSVE2BITPERM-NEXT: bic x9, x9, x8
; NOSVE2BITPERM-NEXT: and x8, x8, x1
; NOSVE2BITPERM-NEXT: eor x10, x9, x9, lsl #1
; NOSVE2BITPERM-NEXT: and x15, x14, x8
; NOSVE2BITPERM-NEXT: eor x16, x1, x8
; NOSVE2BITPERM-NEXT: orr x8, x16, x8, lsr #1
; NOSVE2BITPERM-NEXT: eor x14, x14, x15
; NOSVE2BITPERM-NEXT: eor x10, x10, x10, lsl #2
; NOSVE2BITPERM-NEXT: orr x14, x14, x15, lsr #1
; NOSVE2BITPERM-NEXT: eor x10, x10, x10, lsl #4
; NOSVE2BITPERM-NEXT: eor x10, x10, x10, lsl #8
; NOSVE2BITPERM-NEXT: eor x10, x10, x10, lsl #16
; NOSVE2BITPERM-NEXT: eor x10, x10, x10, lsl #32
; NOSVE2BITPERM-NEXT: bic x9, x9, x10
; NOSVE2BITPERM-NEXT: and x10, x10, x8
; NOSVE2BITPERM-NEXT: eor x11, x9, x9, lsl #1
; NOSVE2BITPERM-NEXT: and x15, x14, x10
; NOSVE2BITPERM-NEXT: eor x8, x8, x10
; NOSVE2BITPERM-NEXT: orr x8, x8, x10, lsr #2
; NOSVE2BITPERM-NEXT: eor x10, x14, x15
; NOSVE2BITPERM-NEXT: eor x11, x11, x11, lsl #2
; NOSVE2BITPERM-NEXT: orr x10, x10, x15, lsr #2
; NOSVE2BITPERM-NEXT: eor x11, x11, x11, lsl #4
; NOSVE2BITPERM-NEXT: eor x11, x11, x11, lsl #8
; NOSVE2BITPERM-NEXT: eor x11, x11, x11, lsl #16
; NOSVE2BITPERM-NEXT: eor x11, x11, x11, lsl #32
; NOSVE2BITPERM-NEXT: bic x9, x9, x11
; NOSVE2BITPERM-NEXT: and x11, x11, x8
; NOSVE2BITPERM-NEXT: eor x12, x9, x9, lsl #1
; NOSVE2BITPERM-NEXT: and x14, x10, x11
; NOSVE2BITPERM-NEXT: eor x8, x8, x11
; NOSVE2BITPERM-NEXT: orr x8, x8, x11, lsr #4
; NOSVE2BITPERM-NEXT: eor x10, x10, x14
; NOSVE2BITPERM-NEXT: eor x12, x12, x12, lsl #2
; NOSVE2BITPERM-NEXT: orr x10, x10, x14, lsr #4
; NOSVE2BITPERM-NEXT: eor x12, x12, x12, lsl #4
; NOSVE2BITPERM-NEXT: eor x12, x12, x12, lsl #8
; NOSVE2BITPERM-NEXT: eor x12, x12, x12, lsl #16
; NOSVE2BITPERM-NEXT: eor x12, x12, x12, lsl #32
; NOSVE2BITPERM-NEXT: bic x9, x9, x12
; NOSVE2BITPERM-NEXT: and x11, x12, x8
; NOSVE2BITPERM-NEXT: eor x13, x9, x9, lsl #1
; NOSVE2BITPERM-NEXT: and x12, x10, x11
; NOSVE2BITPERM-NEXT: eor x8, x8, x11
; NOSVE2BITPERM-NEXT: eor x10, x10, x12
; NOSVE2BITPERM-NEXT: orr x8, x8, x11, lsr #8
; NOSVE2BITPERM-NEXT: eor x13, x13, x13, lsl #2
; NOSVE2BITPERM-NEXT: orr x10, x10, x12, lsr #8
; NOSVE2BITPERM-NEXT: eor x13, x13, x13, lsl #4
; NOSVE2BITPERM-NEXT: eor x13, x13, x13, lsl #8
; NOSVE2BITPERM-NEXT: eor x13, x13, x13, lsl #16
; NOSVE2BITPERM-NEXT: eor x13, x13, x13, lsl #32
; NOSVE2BITPERM-NEXT: bic x9, x9, x13
; NOSVE2BITPERM-NEXT: and x11, x13, x8
; NOSVE2BITPERM-NEXT: eor x9, x9, x9, lsl #1
; NOSVE2BITPERM-NEXT: and x12, x10, x11
; NOSVE2BITPERM-NEXT: eor x8, x8, x11
; NOSVE2BITPERM-NEXT: eor x10, x10, x12
; NOSVE2BITPERM-NEXT: orr x8, x8, x11, lsr #16
; NOSVE2BITPERM-NEXT: eor x9, x9, x9, lsl #2
; NOSVE2BITPERM-NEXT: orr x10, x10, x12, lsr #16
; NOSVE2BITPERM-NEXT: eor x9, x9, x9, lsl #4
; NOSVE2BITPERM-NEXT: and x8, x10, x8
; NOSVE2BITPERM-NEXT: eor x9, x9, x9, lsl #8
; NOSVE2BITPERM-NEXT: eor x9, x9, x9, lsl #16
; NOSVE2BITPERM-NEXT: eor x9, x9, x9, lsl #32
; NOSVE2BITPERM-NEXT: and x8, x8, x9
; NOSVE2BITPERM-NEXT: eor x9, x10, x8
; NOSVE2BITPERM-NEXT: orr x0, x9, x8, lsr #32
; NOSVE2BITPERM-NEXT: ret
%res = call i64 @llvm.pext.i64(i64 %val, i64 %mask)
ret i64 %res
}
define <vscale x 16 x i8> @pext_nxv16i8(<vscale x 16 x i8> %val, <vscale x 16 x i8> %mask) nounwind {
; BITPERM-LABEL: pext_nxv16i8:
; BITPERM: // %bb.0:
; BITPERM-NEXT: bext z0.b, z0.b, z1.b
; BITPERM-NEXT: ret
;
; NOSVE2BITPERM-LABEL: pext_nxv16i8:
; NOSVE2BITPERM: // %bb.0:
; NOSVE2BITPERM-NEXT: movprfx z3, z1
; NOSVE2BITPERM-NEXT: subr z3.b, z3.b, #255 // =0xff
; NOSVE2BITPERM-NEXT: mov z2.b, #-1 // =0xffffffffffffffff
; NOSVE2BITPERM-NEXT: and z0.d, z0.d, z1.d
; NOSVE2BITPERM-NEXT: lsl z3.b, z3.b, #1
; NOSVE2BITPERM-NEXT: pmul z4.b, z3.b, z2.b
; NOSVE2BITPERM-NEXT: and z5.d, z4.d, z1.d
; NOSVE2BITPERM-NEXT: bic z3.d, z3.d, z4.d
; NOSVE2BITPERM-NEXT: and z6.d, z0.d, z5.d
; NOSVE2BITPERM-NEXT: eor z1.d, z1.d, z5.d
; NOSVE2BITPERM-NEXT: pmul z4.b, z3.b, z2.b
; NOSVE2BITPERM-NEXT: eor z0.d, z0.d, z6.d
; NOSVE2BITPERM-NEXT: usra z1.b, z5.b, #1
; NOSVE2BITPERM-NEXT: bic z3.d, z3.d, z4.d
; NOSVE2BITPERM-NEXT: usra z0.b, z6.b, #1
; NOSVE2BITPERM-NEXT: and z5.d, z4.d, z1.d
; NOSVE2BITPERM-NEXT: pmul z2.b, z3.b, z2.b
; NOSVE2BITPERM-NEXT: and z6.d, z0.d, z5.d
; NOSVE2BITPERM-NEXT: eor z1.d, z1.d, z5.d
; NOSVE2BITPERM-NEXT: eor z0.d, z0.d, z6.d
; NOSVE2BITPERM-NEXT: usra z1.b, z5.b, #2
; NOSVE2BITPERM-NEXT: usra z0.b, z6.b, #2
; NOSVE2BITPERM-NEXT: and z1.d, z2.d, z1.d
; NOSVE2BITPERM-NEXT: and z1.d, z0.d, z1.d
; NOSVE2BITPERM-NEXT: eor z0.d, z0.d, z1.d
; NOSVE2BITPERM-NEXT: usra z0.b, z1.b, #4
; NOSVE2BITPERM-NEXT: ret
%res = call <vscale x 16 x i8> @llvm.pext.nxv16i8(<vscale x 16 x i8> %val, <vscale x 16 x i8> %mask)
ret <vscale x 16 x i8> %res
}
define <vscale x 8 x i16> @pext_nxv8i16(<vscale x 8 x i16> %val, <vscale x 8 x i16> %mask) nounwind {
; BITPERM-LABEL: pext_nxv8i16:
; BITPERM: // %bb.0:
; BITPERM-NEXT: bext z0.h, z0.h, z1.h
; BITPERM-NEXT: ret
;
; NOSVE2BITPERM-LABEL: pext_nxv8i16:
; NOSVE2BITPERM: // %bb.0:
; NOSVE2BITPERM-NEXT: movprfx z3, z1
; NOSVE2BITPERM-NEXT: subr z3.b, z3.b, #255 // =0xff
; NOSVE2BITPERM-NEXT: mov z2.h, #-1 // =0xffffffffffffffff
; NOSVE2BITPERM-NEXT: and z0.d, z0.d, z1.d
; NOSVE2BITPERM-NEXT: lsl z3.h, z3.h, #1
; NOSVE2BITPERM-NEXT: trn1 z4.b, z2.b, z3.b
; NOSVE2BITPERM-NEXT: trn2 z5.b, z3.b, z2.b
; NOSVE2BITPERM-NEXT: pmullb z6.h, z3.b, z2.b
; NOSVE2BITPERM-NEXT: pmul z4.b, z5.b, z4.b
; NOSVE2BITPERM-NEXT: eorbt z4.b, z4.b, z4.b
; NOSVE2BITPERM-NEXT: eortb z6.b, z6.b, z4.b
; NOSVE2BITPERM-NEXT: bic z3.d, z3.d, z6.d
; NOSVE2BITPERM-NEXT: trn1 z4.b, z2.b, z3.b
; NOSVE2BITPERM-NEXT: trn2 z5.b, z3.b, z2.b
; NOSVE2BITPERM-NEXT: pmullb z7.h, z3.b, z2.b
; NOSVE2BITPERM-NEXT: pmul z4.b, z5.b, z4.b
; NOSVE2BITPERM-NEXT: eorbt z4.b, z4.b, z4.b
; NOSVE2BITPERM-NEXT: eortb z7.b, z7.b, z4.b
; NOSVE2BITPERM-NEXT: and z4.d, z6.d, z1.d
; NOSVE2BITPERM-NEXT: eor z1.d, z1.d, z4.d
; NOSVE2BITPERM-NEXT: and z5.d, z0.d, z4.d
; NOSVE2BITPERM-NEXT: bic z3.d, z3.d, z7.d
; NOSVE2BITPERM-NEXT: usra z1.h, z4.h, #1
; NOSVE2BITPERM-NEXT: eor z0.d, z0.d, z5.d
; NOSVE2BITPERM-NEXT: trn1 z6.b, z2.b, z3.b
; NOSVE2BITPERM-NEXT: trn2 z24.b, z3.b, z2.b
; NOSVE2BITPERM-NEXT: pmullb z25.h, z3.b, z2.b
; NOSVE2BITPERM-NEXT: usra z0.h, z5.h, #1
; NOSVE2BITPERM-NEXT: pmul z4.b, z24.b, z6.b
; NOSVE2BITPERM-NEXT: and z5.d, z7.d, z1.d
; NOSVE2BITPERM-NEXT: and z6.d, z0.d, z5.d
; NOSVE2BITPERM-NEXT: eor z1.d, z1.d, z5.d
; NOSVE2BITPERM-NEXT: eorbt z4.b, z4.b, z4.b
; NOSVE2BITPERM-NEXT: eor z0.d, z0.d, z6.d
; NOSVE2BITPERM-NEXT: usra z1.h, z5.h, #2
; NOSVE2BITPERM-NEXT: eortb z25.b, z25.b, z4.b
; NOSVE2BITPERM-NEXT: usra z0.h, z6.h, #2
; NOSVE2BITPERM-NEXT: bic z3.d, z3.d, z25.d
; NOSVE2BITPERM-NEXT: and z4.d, z25.d, z1.d
; NOSVE2BITPERM-NEXT: trn1 z5.b, z2.b, z3.b
; NOSVE2BITPERM-NEXT: trn2 z6.b, z3.b, z2.b
; NOSVE2BITPERM-NEXT: and z7.d, z0.d, z4.d
; NOSVE2BITPERM-NEXT: pmullb z2.h, z3.b, z2.b
; NOSVE2BITPERM-NEXT: eor z1.d, z1.d, z4.d
; NOSVE2BITPERM-NEXT: pmul z3.b, z6.b, z5.b
; NOSVE2BITPERM-NEXT: eor z0.d, z0.d, z7.d
; NOSVE2BITPERM-NEXT: usra z1.h, z4.h, #4
; NOSVE2BITPERM-NEXT: usra z0.h, z7.h, #4
; NOSVE2BITPERM-NEXT: eorbt z3.b, z3.b, z3.b
; NOSVE2BITPERM-NEXT: and z1.d, z0.d, z1.d
; NOSVE2BITPERM-NEXT: eortb z2.b, z2.b, z3.b
; NOSVE2BITPERM-NEXT: and z1.d, z1.d, z2.d
; NOSVE2BITPERM-NEXT: eor z0.d, z0.d, z1.d
; NOSVE2BITPERM-NEXT: usra z0.h, z1.h, #8
; NOSVE2BITPERM-NEXT: ret
%res = call <vscale x 8 x i16> @llvm.pext.nxv8i16(<vscale x 8 x i16> %val, <vscale x 8 x i16> %mask)
ret <vscale x 8 x i16> %res
}
define <vscale x 4 x i32> @pext_nxv4i32(<vscale x 4 x i32> %val, <vscale x 4 x i32> %mask) nounwind {
; BITPERM-LABEL: pext_nxv4i32:
; BITPERM: // %bb.0:
; BITPERM-NEXT: bext z0.s, z0.s, z1.s
; BITPERM-NEXT: ret
;
; NOSVE2BITPERM-LABEL: pext_nxv4i32:
; NOSVE2BITPERM: // %bb.0:
; NOSVE2BITPERM-NEXT: movprfx z3, z1
; NOSVE2BITPERM-NEXT: subr z3.b, z3.b, #255 // =0xff
; NOSVE2BITPERM-NEXT: mov z2.s, #-1 // =0xffffffffffffffff
; NOSVE2BITPERM-NEXT: and z0.d, z0.d, z1.d
; NOSVE2BITPERM-NEXT: lsl z3.s, z3.s, #1
; NOSVE2BITPERM-NEXT: pmullt z4.d, z3.s, z2.s
; NOSVE2BITPERM-NEXT: pmullb z5.d, z3.s, z2.s
; NOSVE2BITPERM-NEXT: trn1 z4.s, z5.s, z4.s
; NOSVE2BITPERM-NEXT: bic z3.d, z3.d, z4.d
; NOSVE2BITPERM-NEXT: and z4.d, z4.d, z1.d
; NOSVE2BITPERM-NEXT: pmullt z5.d, z3.s, z2.s
; NOSVE2BITPERM-NEXT: eor z1.d, z1.d, z4.d
; NOSVE2BITPERM-NEXT: and z24.d, z0.d, z4.d
; NOSVE2BITPERM-NEXT: pmullb z6.d, z3.s, z2.s
; NOSVE2BITPERM-NEXT: usra z1.s, z4.s, #1
; NOSVE2BITPERM-NEXT: eor z0.d, z0.d, z24.d
; NOSVE2BITPERM-NEXT: usra z0.s, z24.s, #1
; NOSVE2BITPERM-NEXT: trn1 z5.s, z6.s, z5.s
; NOSVE2BITPERM-NEXT: bic z3.d, z3.d, z5.d
; NOSVE2BITPERM-NEXT: and z4.d, z5.d, z1.d
; NOSVE2BITPERM-NEXT: pmullt z6.d, z3.s, z2.s
; NOSVE2BITPERM-NEXT: eor z1.d, z1.d, z4.d
; NOSVE2BITPERM-NEXT: pmullb z7.d, z3.s, z2.s
; NOSVE2BITPERM-NEXT: usra z1.s, z4.s, #2
; NOSVE2BITPERM-NEXT: trn1 z5.s, z7.s, z6.s
; NOSVE2BITPERM-NEXT: and z6.d, z0.d, z4.d
; NOSVE2BITPERM-NEXT: bic z3.d, z3.d, z5.d
; NOSVE2BITPERM-NEXT: eor z0.d, z0.d, z6.d
; NOSVE2BITPERM-NEXT: and z5.d, z5.d, z1.d
; NOSVE2BITPERM-NEXT: pmullt z4.d, z3.s, z2.s
; NOSVE2BITPERM-NEXT: usra z0.s, z6.s, #2
; NOSVE2BITPERM-NEXT: eor z1.d, z1.d, z5.d
; NOSVE2BITPERM-NEXT: pmullb z7.d, z3.s, z2.s
; NOSVE2BITPERM-NEXT: usra z1.s, z5.s, #4
; NOSVE2BITPERM-NEXT: and z6.d, z0.d, z5.d
; NOSVE2BITPERM-NEXT: eor z0.d, z0.d, z6.d
; NOSVE2BITPERM-NEXT: trn1 z4.s, z7.s, z4.s
; NOSVE2BITPERM-NEXT: usra z0.s, z6.s, #4
; NOSVE2BITPERM-NEXT: and z5.d, z4.d, z1.d
; NOSVE2BITPERM-NEXT: bic z3.d, z3.d, z4.d
; NOSVE2BITPERM-NEXT: and z4.d, z0.d, z5.d
; NOSVE2BITPERM-NEXT: pmullt z6.d, z3.s, z2.s
; NOSVE2BITPERM-NEXT: eor z1.d, z1.d, z5.d
; NOSVE2BITPERM-NEXT: pmullb z2.d, z3.s, z2.s
; NOSVE2BITPERM-NEXT: eor z0.d, z0.d, z4.d
; NOSVE2BITPERM-NEXT: usra z1.s, z5.s, #8
; NOSVE2BITPERM-NEXT: usra z0.s, z4.s, #8
; NOSVE2BITPERM-NEXT: trn1 z2.s, z2.s, z6.s
; NOSVE2BITPERM-NEXT: and z1.d, z0.d, z1.d
; NOSVE2BITPERM-NEXT: and z1.d, z1.d, z2.d
; NOSVE2BITPERM-NEXT: eor z0.d, z0.d, z1.d
; NOSVE2BITPERM-NEXT: usra z0.s, z1.s, #16
; NOSVE2BITPERM-NEXT: ret
%res = call <vscale x 4 x i32> @llvm.pext.nxv4i32(<vscale x 4 x i32> %val, <vscale x 4 x i32> %mask)
ret <vscale x 4 x i32> %res
}
define <vscale x 2 x i64> @pext_nxv2i64(<vscale x 2 x i64> %val, <vscale x 2 x i64> %mask) nounwind {
; BITPERM-LABEL: pext_nxv2i64:
; BITPERM: // %bb.0:
; BITPERM-NEXT: bext z0.d, z0.d, z1.d
; BITPERM-NEXT: ret
;
; NOSVE2BITPERM-LABEL: pext_nxv2i64:
; NOSVE2BITPERM: // %bb.0:
; NOSVE2BITPERM-NEXT: movprfx z3, z1
; NOSVE2BITPERM-NEXT: subr z3.b, z3.b, #255 // =0xff
; NOSVE2BITPERM-NEXT: mov z2.d, #-1 // =0xffffffffffffffff
; NOSVE2BITPERM-NEXT: and z0.d, z0.d, z1.d
; NOSVE2BITPERM-NEXT: lsl z4.d, z3.d, #1
; NOSVE2BITPERM-NEXT: trn1 z3.s, z2.s, z4.s
; NOSVE2BITPERM-NEXT: trn2 z5.s, z4.s, z2.s
; NOSVE2BITPERM-NEXT: pmullt z6.d, z5.s, z3.s
; NOSVE2BITPERM-NEXT: pmullb z5.d, z5.s, z3.s
; NOSVE2BITPERM-NEXT: pmullb z3.d, z4.s, z2.s
; NOSVE2BITPERM-NEXT: trn1 z5.s, z5.s, z6.s
; NOSVE2BITPERM-NEXT: eorbt z5.s, z5.s, z5.s
; NOSVE2BITPERM-NEXT: eortb z3.s, z3.s, z5.s
; NOSVE2BITPERM-NEXT: bic z5.d, z4.d, z3.d
; NOSVE2BITPERM-NEXT: and z3.d, z3.d, z1.d
; NOSVE2BITPERM-NEXT: trn1 z4.s, z2.s, z5.s
; NOSVE2BITPERM-NEXT: trn2 z6.s, z5.s, z2.s
; NOSVE2BITPERM-NEXT: eor z1.d, z1.d, z3.d
; NOSVE2BITPERM-NEXT: pmullt z7.d, z6.s, z4.s
; NOSVE2BITPERM-NEXT: usra z1.d, z3.d, #1
; NOSVE2BITPERM-NEXT: pmullb z6.d, z6.s, z4.s
; NOSVE2BITPERM-NEXT: pmullb z4.d, z5.s, z2.s
; NOSVE2BITPERM-NEXT: trn1 z6.s, z6.s, z7.s
; NOSVE2BITPERM-NEXT: eorbt z6.s, z6.s, z6.s
; NOSVE2BITPERM-NEXT: eortb z4.s, z4.s, z6.s
; NOSVE2BITPERM-NEXT: bic z6.d, z5.d, z4.d
; NOSVE2BITPERM-NEXT: and z4.d, z4.d, z1.d
; NOSVE2BITPERM-NEXT: trn1 z5.s, z2.s, z6.s
; NOSVE2BITPERM-NEXT: trn2 z7.s, z6.s, z2.s
; NOSVE2BITPERM-NEXT: eor z1.d, z1.d, z4.d
; NOSVE2BITPERM-NEXT: pmullt z24.d, z7.s, z5.s
; NOSVE2BITPERM-NEXT: usra z1.d, z4.d, #2
; NOSVE2BITPERM-NEXT: pmullb z7.d, z7.s, z5.s
; NOSVE2BITPERM-NEXT: pmullb z5.d, z6.s, z2.s
; NOSVE2BITPERM-NEXT: trn1 z7.s, z7.s, z24.s
; NOSVE2BITPERM-NEXT: eorbt z7.s, z7.s, z7.s
; NOSVE2BITPERM-NEXT: eortb z5.s, z5.s, z7.s
; NOSVE2BITPERM-NEXT: bic z7.d, z6.d, z5.d
; NOSVE2BITPERM-NEXT: and z5.d, z5.d, z1.d
; NOSVE2BITPERM-NEXT: trn1 z6.s, z2.s, z7.s
; NOSVE2BITPERM-NEXT: trn2 z24.s, z7.s, z2.s
; NOSVE2BITPERM-NEXT: eor z1.d, z1.d, z5.d
; NOSVE2BITPERM-NEXT: pmullt z25.d, z24.s, z6.s
; NOSVE2BITPERM-NEXT: usra z1.d, z5.d, #4
; NOSVE2BITPERM-NEXT: pmullb z24.d, z24.s, z6.s
; NOSVE2BITPERM-NEXT: pmullb z6.d, z7.s, z2.s
; NOSVE2BITPERM-NEXT: trn1 z24.s, z24.s, z25.s
; NOSVE2BITPERM-NEXT: eorbt z24.s, z24.s, z24.s
; NOSVE2BITPERM-NEXT: eortb z6.s, z6.s, z24.s
; NOSVE2BITPERM-NEXT: and z24.d, z0.d, z3.d
; NOSVE2BITPERM-NEXT: eor z0.d, z0.d, z24.d
; NOSVE2BITPERM-NEXT: bic z7.d, z7.d, z6.d
; NOSVE2BITPERM-NEXT: usra z0.d, z24.d, #1
; NOSVE2BITPERM-NEXT: trn1 z25.s, z2.s, z7.s
; NOSVE2BITPERM-NEXT: trn2 z26.s, z7.s, z2.s
; NOSVE2BITPERM-NEXT: pmullt z3.d, z26.s, z25.s
; NOSVE2BITPERM-NEXT: pmullb z24.d, z26.s, z25.s
; NOSVE2BITPERM-NEXT: and z25.d, z0.d, z4.d
; NOSVE2BITPERM-NEXT: pmullb z4.d, z7.s, z2.s
; NOSVE2BITPERM-NEXT: eor z0.d, z0.d, z25.d
; NOSVE2BITPERM-NEXT: usra z0.d, z25.d, #2
; NOSVE2BITPERM-NEXT: trn1 z3.s, z24.s, z3.s
; NOSVE2BITPERM-NEXT: and z24.d, z0.d, z5.d
; NOSVE2BITPERM-NEXT: and z5.d, z6.d, z1.d
; NOSVE2BITPERM-NEXT: eorbt z3.s, z3.s, z3.s
; NOSVE2BITPERM-NEXT: eor z0.d, z0.d, z24.d
; NOSVE2BITPERM-NEXT: eor z1.d, z1.d, z5.d
; NOSVE2BITPERM-NEXT: eortb z4.s, z4.s, z3.s
; NOSVE2BITPERM-NEXT: usra z0.d, z24.d, #4
; NOSVE2BITPERM-NEXT: usra z1.d, z5.d, #8
; NOSVE2BITPERM-NEXT: bic z3.d, z7.d, z4.d
; NOSVE2BITPERM-NEXT: and z24.d, z0.d, z5.d
; NOSVE2BITPERM-NEXT: and z4.d, z4.d, z1.d
; NOSVE2BITPERM-NEXT: trn1 z6.s, z2.s, z3.s
; NOSVE2BITPERM-NEXT: trn2 z7.s, z3.s, z2.s
; NOSVE2BITPERM-NEXT: eor z0.d, z0.d, z24.d
; NOSVE2BITPERM-NEXT: pmullb z2.d, z3.s, z2.s
; NOSVE2BITPERM-NEXT: eor z1.d, z1.d, z4.d
; NOSVE2BITPERM-NEXT: pmullt z25.d, z7.s, z6.s
; NOSVE2BITPERM-NEXT: usra z0.d, z24.d, #8
; NOSVE2BITPERM-NEXT: pmullb z6.d, z7.s, z6.s
; NOSVE2BITPERM-NEXT: usra z1.d, z4.d, #16
; NOSVE2BITPERM-NEXT: and z3.d, z0.d, z4.d
; NOSVE2BITPERM-NEXT: eor z0.d, z0.d, z3.d
; NOSVE2BITPERM-NEXT: trn1 z5.s, z6.s, z25.s
; NOSVE2BITPERM-NEXT: usra z0.d, z3.d, #16
; NOSVE2BITPERM-NEXT: eorbt z5.s, z5.s, z5.s
; NOSVE2BITPERM-NEXT: and z1.d, z0.d, z1.d
; NOSVE2BITPERM-NEXT: eortb z2.s, z2.s, z5.s
; NOSVE2BITPERM-NEXT: and z1.d, z1.d, z2.d
; NOSVE2BITPERM-NEXT: eor z0.d, z0.d, z1.d
; NOSVE2BITPERM-NEXT: usra z0.d, z1.d, #32
; NOSVE2BITPERM-NEXT: ret
%res = call <vscale x 2 x i64> @llvm.pext.nxv2i64(<vscale x 2 x i64> %val, <vscale x 2 x i64> %mask)
ret <vscale x 2 x i64> %res
}