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llvm/llvm-project.git/refs/heads/main/./llvm/test/CodeGen/AArch64/fcvt-i256.ll
blob: 42fcbddea7ccf9dc10284583e3ca13022021b796 [file] [log] [blame] [edit]
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc -mtriple=aarch64 %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD
; RUN: llc -mtriple=aarch64 -global-isel=true -global-isel-abort=2 %s -o - 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-GI
; CHECK-GI: warning: Instruction selection used fallback path for s256_to_f32
; CHECK-GI-NEXT: warning: Instruction selection used fallback path for u256_to_f32
; CHECK-GI-NEXT: warning: Instruction selection used fallback path for s256_to_f64
; CHECK-GI-NEXT: warning: Instruction selection used fallback path for u256_to_f64
define float @s256_to_f32(i256 %val) {
; CHECK-LABEL: s256_to_f32:
; CHECK: // %bb.0: // %itofp-entry
; CHECK-NEXT: orr x8, x1, x3
; CHECK-NEXT: orr x9, x0, x2
; CHECK-NEXT: orr x8, x9, x8
; CHECK-NEXT: cbz x8, .LBB0_5
; CHECK-NEXT: // %bb.1: // %itofp-if-end
; CHECK-NEXT: sub sp, sp, #192
; CHECK-NEXT: .cfi_def_cfa_offset 192
; CHECK-NEXT: asr x8, x3, #63
; CHECK-NEXT: eor x9, x0, x8
; CHECK-NEXT: eor x11, x1, x8
; CHECK-NEXT: subs x10, x9, x8
; CHECK-NEXT: eor x9, x2, x8
; CHECK-NEXT: sbcs x13, x11, x8
; CHECK-NEXT: eor x11, x3, x8
; CHECK-NEXT: clz x14, x10
; CHECK-NEXT: sbcs x12, x9, x8
; CHECK-NEXT: add w14, w14, #64
; CHECK-NEXT: sbcs x11, x11, x8
; CHECK-NEXT: clz x8, x12
; CHECK-NEXT: add w8, w8, #64
; CHECK-NEXT: clz x9, x11
; CHECK-NEXT: csel w8, w9, w8, ne
; CHECK-NEXT: clz x9, x13
; CHECK-NEXT: cmp x13, #0
; CHECK-NEXT: csel w9, w9, w14, ne
; CHECK-NEXT: orr x14, x12, x11
; CHECK-NEXT: add w9, w9, #128
; CHECK-NEXT: cmp x14, #0
; CHECK-NEXT: csel w15, w8, w9, ne
; CHECK-NEXT: mov w8, #256 // =0x100
; CHECK-NEXT: sub w9, w8, w15
; CHECK-NEXT: mov w8, #255 // =0xff
; CHECK-NEXT: cmp w9, #25
; CHECK-NEXT: sub w8, w8, w15
; CHECK-NEXT: b.lt .LBB0_6
; CHECK-NEXT: // %bb.2: // %itofp-if-then4
; CHECK-NEXT: cmp w9, #26
; CHECK-NEXT: b.eq .LBB0_8
; CHECK-NEXT: // %bb.3: // %itofp-if-then4
; CHECK-NEXT: cmp w9, #25
; CHECK-NEXT: b.ne .LBB0_7
; CHECK-NEXT: // %bb.4: // %itofp-sw-bb
; CHECK-NEXT: lsl x10, x10, #1
; CHECK-NEXT: b .LBB0_8
; CHECK-NEXT: .LBB0_5:
; CHECK-NEXT: movi d0, #0000000000000000
; CHECK-NEXT: ret
; CHECK-NEXT: .LBB0_6: // %itofp-if-else
; CHECK-NEXT: movi v0.2d, #0000000000000000
; CHECK-NEXT: sub w9, w15, #232
; CHECK-NEXT: str x10, [sp, #160]
; CHECK-NEXT: lsr x11, x9, #3
; CHECK-NEXT: add x10, sp, #128
; CHECK-NEXT: add x10, x10, #32
; CHECK-NEXT: and x11, x11, #0x18
; CHECK-NEXT: stp q0, q0, [sp, #128]
; CHECK-NEXT: sub x10, x10, x11
; CHECK-NEXT: ldr x10, [x10]
; CHECK-NEXT: lsl x10, x10, x9
; CHECK-NEXT: b .LBB0_9
; CHECK-NEXT: .LBB0_7: // %itofp-sw-default
; CHECK-NEXT: mov w14, #230 // =0xe6
; CHECK-NEXT: movi v0.2d, #0000000000000000
; CHECK-NEXT: add x17, sp, #64
; CHECK-NEXT: sub w14, w14, w15
; CHECK-NEXT: stp x10, x13, [sp, #64]
; CHECK-NEXT: mov x18, sp
; CHECK-NEXT: lsr x16, x14, #3
; CHECK-NEXT: stp x12, x11, [sp, #80]
; CHECK-NEXT: and x16, x16, #0x18
; CHECK-NEXT: stp q0, q0, [sp, #96]
; CHECK-NEXT: add x16, x17, x16
; CHECK-NEXT: ldp x16, x17, [x16]
; CHECK-NEXT: stp x10, x13, [sp, #32]
; CHECK-NEXT: add w10, w15, #26
; CHECK-NEXT: add x13, x18, #32
; CHECK-NEXT: stp q0, q0, [sp]
; CHECK-NEXT: lsr x15, x10, #3
; CHECK-NEXT: stp x12, x11, [sp, #48]
; CHECK-NEXT: and x18, x10, #0x3f
; CHECK-NEXT: lsl x17, x17, #1
; CHECK-NEXT: and x15, x15, #0x18
; CHECK-NEXT: sub x12, x13, x15
; CHECK-NEXT: ldp x13, x11, [x12, #16]
; CHECK-NEXT: ldp x12, x15, [x12]
; CHECK-NEXT: orr x11, x15, x11
; CHECK-NEXT: orr x12, x12, x13
; CHECK-NEXT: lsr x13, x15, #1
; CHECK-NEXT: orr x11, x12, x11
; CHECK-NEXT: mvn w15, w10
; CHECK-NEXT: lsr x12, x12, #1
; CHECK-NEXT: lsl x10, x11, x10
; CHECK-NEXT: lsr x11, x13, x15
; CHECK-NEXT: eor x13, x18, #0x3f
; CHECK-NEXT: and x15, x14, #0x3f
; CHECK-NEXT: lsr x12, x12, x13
; CHECK-NEXT: eor x13, x15, #0x3f
; CHECK-NEXT: orr x10, x10, x11
; CHECK-NEXT: lsr x11, x16, x14
; CHECK-NEXT: lsl x13, x17, x13
; CHECK-NEXT: orr x10, x10, x12
; CHECK-NEXT: cmp x10, #0
; CHECK-NEXT: orr x10, x13, x11
; CHECK-NEXT: cset w11, ne
; CHECK-NEXT: orr x10, x10, x11
; CHECK-NEXT: .LBB0_8: // %itofp-sw-epilog
; CHECK-NEXT: ubfx w11, w10, #2, #1
; CHECK-NEXT: orr x10, x10, x11
; CHECK-NEXT: adds x10, x10, #1
; CHECK-NEXT: lsr x11, x10, #2
; CHECK-NEXT: lsr x12, x10, #3
; CHECK-NEXT: tst w10, #0x4000000
; CHECK-NEXT: csel w8, w8, w9, eq
; CHECK-NEXT: csel w10, w11, w12, eq
; CHECK-NEXT: .LBB0_9: // %itofp-if-end26
; CHECK-NEXT: lsr x9, x3, #32
; CHECK-NEXT: mov w11, #1065353216 // =0x3f800000
; CHECK-NEXT: add w8, w11, w8, lsl #23
; CHECK-NEXT: and w9, w9, #0x80000000
; CHECK-NEXT: bfxil w9, w10, #0, #23
; CHECK-NEXT: orr w8, w9, w8
; CHECK-NEXT: fmov s0, w8
; CHECK-NEXT: add sp, sp, #192
; CHECK-NEXT: ret
%result = sitofp i256 %val to float
ret float %result
}
define float @u256_to_f32(i256 %val) {
; CHECK-LABEL: u256_to_f32:
; CHECK: // %bb.0: // %itofp-entry
; CHECK-NEXT: orr x8, x1, x3
; CHECK-NEXT: orr x9, x0, x2
; CHECK-NEXT: orr x8, x9, x8
; CHECK-NEXT: cbz x8, .LBB1_5
; CHECK-NEXT: // %bb.1: // %itofp-if-end
; CHECK-NEXT: sub sp, sp, #192
; CHECK-NEXT: .cfi_def_cfa_offset 192
; CHECK-NEXT: clz x8, x2
; CHECK-NEXT: clz x9, x3
; CHECK-NEXT: cmp x3, #0
; CHECK-NEXT: add w8, w8, #64
; CHECK-NEXT: clz x10, x0
; CHECK-NEXT: csel w8, w9, w8, ne
; CHECK-NEXT: add w9, w10, #64
; CHECK-NEXT: clz x10, x1
; CHECK-NEXT: cmp x1, #0
; CHECK-NEXT: csel w9, w10, w9, ne
; CHECK-NEXT: orr x10, x2, x3
; CHECK-NEXT: add w9, w9, #128
; CHECK-NEXT: cmp x10, #0
; CHECK-NEXT: csel w11, w8, w9, ne
; CHECK-NEXT: mov w8, #256 // =0x100
; CHECK-NEXT: sub w9, w8, w11
; CHECK-NEXT: mov w8, #255 // =0xff
; CHECK-NEXT: cmp w9, #25
; CHECK-NEXT: sub w8, w8, w11
; CHECK-NEXT: b.lt .LBB1_6
; CHECK-NEXT: // %bb.2: // %itofp-if-then4
; CHECK-NEXT: cmp w9, #26
; CHECK-NEXT: b.eq .LBB1_8
; CHECK-NEXT: // %bb.3: // %itofp-if-then4
; CHECK-NEXT: cmp w9, #25
; CHECK-NEXT: b.ne .LBB1_7
; CHECK-NEXT: // %bb.4: // %itofp-sw-bb
; CHECK-NEXT: lsl x0, x0, #1
; CHECK-NEXT: b .LBB1_8
; CHECK-NEXT: .LBB1_5:
; CHECK-NEXT: movi d0, #0000000000000000
; CHECK-NEXT: ret
; CHECK-NEXT: .LBB1_6: // %itofp-if-else
; CHECK-NEXT: movi v0.2d, #0000000000000000
; CHECK-NEXT: sub w9, w11, #232
; CHECK-NEXT: add x11, sp, #128
; CHECK-NEXT: lsr x10, x9, #3
; CHECK-NEXT: add x11, x11, #32
; CHECK-NEXT: str x0, [sp, #160]
; CHECK-NEXT: and x10, x10, #0x18
; CHECK-NEXT: stp q0, q0, [sp, #128]
; CHECK-NEXT: sub x10, x11, x10
; CHECK-NEXT: ldr x10, [x10]
; CHECK-NEXT: lsl x10, x10, x9
; CHECK-NEXT: b .LBB1_9
; CHECK-NEXT: .LBB1_7: // %itofp-sw-default
; CHECK-NEXT: mov w10, #230 // =0xe6
; CHECK-NEXT: movi v0.2d, #0000000000000000
; CHECK-NEXT: add x13, sp, #64
; CHECK-NEXT: sub w10, w10, w11
; CHECK-NEXT: add w11, w11, #26
; CHECK-NEXT: mov x15, sp
; CHECK-NEXT: lsr x12, x10, #3
; CHECK-NEXT: lsr x14, x11, #3
; CHECK-NEXT: stp x0, x1, [sp, #64]
; CHECK-NEXT: stp x2, x3, [sp, #80]
; CHECK-NEXT: add x15, x15, #32
; CHECK-NEXT: and x18, x11, #0x3f
; CHECK-NEXT: and x12, x12, #0x18
; CHECK-NEXT: stp q0, q0, [sp, #96]
; CHECK-NEXT: and x14, x14, #0x18
; CHECK-NEXT: add x12, x13, x12
; CHECK-NEXT: sub x14, x15, x14
; CHECK-NEXT: ldp x12, x13, [x12]
; CHECK-NEXT: stp x0, x1, [sp, #32]
; CHECK-NEXT: stp q0, q0, [sp]
; CHECK-NEXT: stp x2, x3, [sp, #48]
; CHECK-NEXT: ldp x16, x15, [x14, #16]
; CHECK-NEXT: lsl x13, x13, #1
; CHECK-NEXT: ldp x14, x17, [x14]
; CHECK-NEXT: orr x15, x17, x15
; CHECK-NEXT: orr x14, x14, x16
; CHECK-NEXT: lsr x16, x17, #1
; CHECK-NEXT: orr x15, x14, x15
; CHECK-NEXT: mvn w17, w11
; CHECK-NEXT: lsr x14, x14, #1
; CHECK-NEXT: lsl x11, x15, x11
; CHECK-NEXT: lsr x15, x16, x17
; CHECK-NEXT: eor x16, x18, #0x3f
; CHECK-NEXT: and x17, x10, #0x3f
; CHECK-NEXT: lsr x14, x14, x16
; CHECK-NEXT: lsr x10, x12, x10
; CHECK-NEXT: eor x16, x17, #0x3f
; CHECK-NEXT: orr x11, x11, x15
; CHECK-NEXT: lsl x12, x13, x16
; CHECK-NEXT: orr x11, x11, x14
; CHECK-NEXT: cmp x11, #0
; CHECK-NEXT: orr x10, x12, x10
; CHECK-NEXT: cset w11, ne
; CHECK-NEXT: orr x0, x10, x11
; CHECK-NEXT: .LBB1_8: // %itofp-sw-epilog
; CHECK-NEXT: ubfx w10, w0, #2, #1
; CHECK-NEXT: orr x10, x0, x10
; CHECK-NEXT: adds x10, x10, #1
; CHECK-NEXT: lsr x11, x10, #2
; CHECK-NEXT: lsr x12, x10, #3
; CHECK-NEXT: tst w10, #0x4000000
; CHECK-NEXT: csel w8, w8, w9, eq
; CHECK-NEXT: csel w10, w11, w12, eq
; CHECK-NEXT: .LBB1_9: // %itofp-if-end26
; CHECK-NEXT: bfi w10, w8, #23, #9
; CHECK-NEXT: mov w8, #1065353216 // =0x3f800000
; CHECK-NEXT: add w8, w10, w8
; CHECK-NEXT: fmov s0, w8
; CHECK-NEXT: add sp, sp, #192
; CHECK-NEXT: ret
%result = uitofp i256 %val to float
ret float %result
}
define double @s256_to_f64(i256 %val) {
; CHECK-LABEL: s256_to_f64:
; CHECK: // %bb.0: // %itofp-entry
; CHECK-NEXT: orr x8, x1, x3
; CHECK-NEXT: orr x9, x0, x2
; CHECK-NEXT: orr x8, x9, x8
; CHECK-NEXT: cbz x8, .LBB2_5
; CHECK-NEXT: // %bb.1: // %itofp-if-end
; CHECK-NEXT: sub sp, sp, #192
; CHECK-NEXT: .cfi_def_cfa_offset 192
; CHECK-NEXT: asr x8, x3, #63
; CHECK-NEXT: eor x9, x0, x8
; CHECK-NEXT: eor x10, x1, x8
; CHECK-NEXT: eor x11, x3, x8
; CHECK-NEXT: subs x12, x9, x8
; CHECK-NEXT: eor x9, x2, x8
; CHECK-NEXT: sbcs x10, x10, x8
; CHECK-NEXT: clz x14, x12
; CHECK-NEXT: sbcs x13, x9, x8
; CHECK-NEXT: add w14, w14, #64
; CHECK-NEXT: sbcs x11, x11, x8
; CHECK-NEXT: clz x8, x13
; CHECK-NEXT: add w8, w8, #64
; CHECK-NEXT: clz x9, x11
; CHECK-NEXT: csel w8, w9, w8, ne
; CHECK-NEXT: clz x9, x10
; CHECK-NEXT: cmp x10, #0
; CHECK-NEXT: csel w9, w9, w14, ne
; CHECK-NEXT: orr x14, x13, x11
; CHECK-NEXT: add w9, w9, #128
; CHECK-NEXT: cmp x14, #0
; CHECK-NEXT: csel w14, w8, w9, ne
; CHECK-NEXT: mov w8, #256 // =0x100
; CHECK-NEXT: sub w9, w8, w14
; CHECK-NEXT: mov w8, #255 // =0xff
; CHECK-NEXT: cmp w9, #54
; CHECK-NEXT: sub w8, w8, w14
; CHECK-NEXT: b.lt .LBB2_6
; CHECK-NEXT: // %bb.2: // %itofp-if-then4
; CHECK-NEXT: cmp w9, #55
; CHECK-NEXT: b.eq .LBB2_8
; CHECK-NEXT: // %bb.3: // %itofp-if-then4
; CHECK-NEXT: cmp w9, #54
; CHECK-NEXT: b.ne .LBB2_7
; CHECK-NEXT: // %bb.4: // %itofp-sw-bb
; CHECK-NEXT: extr x10, x10, x12, #63
; CHECK-NEXT: lsl x12, x12, #1
; CHECK-NEXT: b .LBB2_8
; CHECK-NEXT: .LBB2_5:
; CHECK-NEXT: movi d0, #0000000000000000
; CHECK-NEXT: ret
; CHECK-NEXT: .LBB2_6: // %itofp-if-else
; CHECK-NEXT: movi v0.2d, #0000000000000000
; CHECK-NEXT: sub w9, w14, #203
; CHECK-NEXT: stp x12, x10, [sp, #160]
; CHECK-NEXT: lsr x10, x9, #3
; CHECK-NEXT: add x12, sp, #128
; CHECK-NEXT: stp x13, x11, [sp, #176]
; CHECK-NEXT: add x12, x12, #32
; CHECK-NEXT: and x10, x10, #0x18
; CHECK-NEXT: stp q0, q0, [sp, #128]
; CHECK-NEXT: sub x10, x12, x10
; CHECK-NEXT: ldr x10, [x10]
; CHECK-NEXT: lsl x10, x10, x9
; CHECK-NEXT: lsr x11, x10, #32
; CHECK-NEXT: b .LBB2_9
; CHECK-NEXT: .LBB2_7: // %itofp-sw-default
; CHECK-NEXT: mov w15, #201 // =0xc9
; CHECK-NEXT: movi v0.2d, #0000000000000000
; CHECK-NEXT: add x17, sp, #64
; CHECK-NEXT: sub w15, w15, w14
; CHECK-NEXT: stp x12, x10, [sp, #64]
; CHECK-NEXT: mov x1, sp
; CHECK-NEXT: lsr x16, x15, #3
; CHECK-NEXT: stp x13, x11, [sp, #80]
; CHECK-NEXT: and x16, x16, #0x18
; CHECK-NEXT: stp q0, q0, [sp, #96]
; CHECK-NEXT: add x16, x17, x16
; CHECK-NEXT: ldp x18, x17, [x16, #8]
; CHECK-NEXT: ldr x16, [x16]
; CHECK-NEXT: stp x12, x10, [sp, #32]
; CHECK-NEXT: add w12, w14, #55
; CHECK-NEXT: add x10, x1, #32
; CHECK-NEXT: lsr x0, x12, #3
; CHECK-NEXT: stp q0, q0, [sp]
; CHECK-NEXT: and x2, x12, #0x3f
; CHECK-NEXT: stp x13, x11, [sp, #48]
; CHECK-NEXT: and x1, x15, #0x3f
; CHECK-NEXT: sub w14, w14, #202
; CHECK-NEXT: and x0, x0, #0x18
; CHECK-NEXT: eor x1, x1, #0x3f
; CHECK-NEXT: sub x10, x10, x0
; CHECK-NEXT: ldp x13, x11, [x10, #16]
; CHECK-NEXT: ldp x10, x0, [x10]
; CHECK-NEXT: orr x11, x0, x11
; CHECK-NEXT: orr x10, x10, x13
; CHECK-NEXT: lsl x13, x17, #1
; CHECK-NEXT: lsr x17, x0, #1
; CHECK-NEXT: orr x11, x10, x11
; CHECK-NEXT: mvn w0, w12
; CHECK-NEXT: lsr x10, x10, #1
; CHECK-NEXT: lsl x11, x11, x12
; CHECK-NEXT: lsl x13, x13, x14
; CHECK-NEXT: lsr x12, x17, x0
; CHECK-NEXT: eor x17, x2, #0x3f
; CHECK-NEXT: lsl x0, x18, #1
; CHECK-NEXT: lsr x10, x10, x17
; CHECK-NEXT: lsr x17, x18, x15
; CHECK-NEXT: orr x11, x11, x12
; CHECK-NEXT: lsr x12, x16, x15
; CHECK-NEXT: lsl x14, x0, x1
; CHECK-NEXT: orr x10, x11, x10
; CHECK-NEXT: cmp x10, #0
; CHECK-NEXT: orr x11, x14, x12
; CHECK-NEXT: orr x10, x17, x13
; CHECK-NEXT: cset w12, ne
; CHECK-NEXT: orr x12, x11, x12
; CHECK-NEXT: .LBB2_8: // %itofp-sw-epilog
; CHECK-NEXT: ubfx w11, w12, #2, #1
; CHECK-NEXT: orr x11, x12, x11
; CHECK-NEXT: adds x11, x11, #1
; CHECK-NEXT: adcs x10, x10, xzr
; CHECK-NEXT: extr x12, x10, x11, #2
; CHECK-NEXT: extr x10, x10, x11, #3
; CHECK-NEXT: tst x11, #0x80000000000000
; CHECK-NEXT: csel w8, w8, w9, eq
; CHECK-NEXT: lsr x13, x12, #32
; CHECK-NEXT: lsr x14, x10, #32
; CHECK-NEXT: csel x10, x12, x10, eq
; CHECK-NEXT: csel w11, w13, w14, eq
; CHECK-NEXT: .LBB2_9: // %itofp-if-end26
; CHECK-NEXT: lsr x9, x3, #32
; CHECK-NEXT: mov w12, #1072693248 // =0x3ff00000
; CHECK-NEXT: add w8, w12, w8, lsl #20
; CHECK-NEXT: and w9, w9, #0x80000000
; CHECK-NEXT: bfxil w9, w11, #0, #20
; CHECK-NEXT: orr w8, w9, w8
; CHECK-NEXT: bfi x10, x8, #32, #32
; CHECK-NEXT: fmov d0, x10
; CHECK-NEXT: add sp, sp, #192
; CHECK-NEXT: ret
%result = sitofp i256 %val to double
ret double %result
}
define double @u256_to_f64(i256 %val) {
; CHECK-LABEL: u256_to_f64:
; CHECK: // %bb.0: // %itofp-entry
; CHECK-NEXT: orr x8, x1, x3
; CHECK-NEXT: orr x9, x0, x2
; CHECK-NEXT: orr x8, x9, x8
; CHECK-NEXT: cbz x8, .LBB3_5
; CHECK-NEXT: // %bb.1: // %itofp-if-end
; CHECK-NEXT: sub sp, sp, #192
; CHECK-NEXT: .cfi_def_cfa_offset 192
; CHECK-NEXT: clz x8, x2
; CHECK-NEXT: clz x9, x3
; CHECK-NEXT: cmp x3, #0
; CHECK-NEXT: add w8, w8, #64
; CHECK-NEXT: clz x10, x0
; CHECK-NEXT: csel w8, w9, w8, ne
; CHECK-NEXT: add w9, w10, #64
; CHECK-NEXT: clz x10, x1
; CHECK-NEXT: cmp x1, #0
; CHECK-NEXT: csel w9, w10, w9, ne
; CHECK-NEXT: orr x10, x2, x3
; CHECK-NEXT: add w9, w9, #128
; CHECK-NEXT: cmp x10, #0
; CHECK-NEXT: csel w10, w8, w9, ne
; CHECK-NEXT: mov w8, #256 // =0x100
; CHECK-NEXT: sub w9, w8, w10
; CHECK-NEXT: mov w8, #255 // =0xff
; CHECK-NEXT: cmp w9, #54
; CHECK-NEXT: sub w8, w8, w10
; CHECK-NEXT: b.lt .LBB3_6
; CHECK-NEXT: // %bb.2: // %itofp-if-then4
; CHECK-NEXT: cmp w9, #55
; CHECK-NEXT: b.eq .LBB3_8
; CHECK-NEXT: // %bb.3: // %itofp-if-then4
; CHECK-NEXT: cmp w9, #54
; CHECK-NEXT: b.ne .LBB3_7
; CHECK-NEXT: // %bb.4: // %itofp-sw-bb
; CHECK-NEXT: extr x1, x1, x0, #63
; CHECK-NEXT: lsl x0, x0, #1
; CHECK-NEXT: b .LBB3_8
; CHECK-NEXT: .LBB3_5:
; CHECK-NEXT: movi d0, #0000000000000000
; CHECK-NEXT: ret
; CHECK-NEXT: .LBB3_6: // %itofp-if-else
; CHECK-NEXT: movi v0.2d, #0000000000000000
; CHECK-NEXT: sub w9, w10, #203
; CHECK-NEXT: add x11, sp, #128
; CHECK-NEXT: lsr x10, x9, #3
; CHECK-NEXT: add x11, x11, #32
; CHECK-NEXT: stp x0, x1, [sp, #160]
; CHECK-NEXT: stp x2, x3, [sp, #176]
; CHECK-NEXT: and x10, x10, #0x18
; CHECK-NEXT: stp q0, q0, [sp, #128]
; CHECK-NEXT: sub x10, x11, x10
; CHECK-NEXT: ldr x10, [x10]
; CHECK-NEXT: lsl x10, x10, x9
; CHECK-NEXT: lsr x11, x10, #32
; CHECK-NEXT: b .LBB3_9
; CHECK-NEXT: .LBB3_7: // %itofp-sw-default
; CHECK-NEXT: mov w11, #201 // =0xc9
; CHECK-NEXT: movi v0.2d, #0000000000000000
; CHECK-NEXT: add w15, w10, #55
; CHECK-NEXT: sub w11, w11, w10
; CHECK-NEXT: lsr x16, x15, #3
; CHECK-NEXT: add x13, sp, #64
; CHECK-NEXT: lsr x12, x11, #3
; CHECK-NEXT: mov x17, sp
; CHECK-NEXT: stp x0, x1, [sp, #64]
; CHECK-NEXT: stp x2, x3, [sp, #80]
; CHECK-NEXT: add x17, x17, #32
; CHECK-NEXT: and x16, x16, #0x18
; CHECK-NEXT: and x12, x12, #0x18
; CHECK-NEXT: stp q0, q0, [sp, #96]
; CHECK-NEXT: sub x16, x17, x16
; CHECK-NEXT: add x12, x13, x12
; CHECK-NEXT: sub w10, w10, #202
; CHECK-NEXT: ldp x14, x13, [x12, #8]
; CHECK-NEXT: ldr x12, [x12]
; CHECK-NEXT: stp x0, x1, [sp, #32]
; CHECK-NEXT: and x1, x11, #0x3f
; CHECK-NEXT: stp q0, q0, [sp]
; CHECK-NEXT: eor x1, x1, #0x3f
; CHECK-NEXT: stp x2, x3, [sp, #48]
; CHECK-NEXT: and x2, x15, #0x3f
; CHECK-NEXT: lsl x13, x13, #1
; CHECK-NEXT: ldp x18, x17, [x16, #16]
; CHECK-NEXT: ldp x16, x0, [x16]
; CHECK-NEXT: lsl x10, x13, x10
; CHECK-NEXT: orr x17, x0, x17
; CHECK-NEXT: orr x16, x16, x18
; CHECK-NEXT: lsr x18, x0, #1
; CHECK-NEXT: orr x17, x16, x17
; CHECK-NEXT: mvn w0, w15
; CHECK-NEXT: lsr x16, x16, #1
; CHECK-NEXT: lsl x15, x17, x15
; CHECK-NEXT: lsr x17, x18, x0
; CHECK-NEXT: eor x18, x2, #0x3f
; CHECK-NEXT: lsl x0, x14, #1
; CHECK-NEXT: lsr x16, x16, x18
; CHECK-NEXT: lsr x14, x14, x11
; CHECK-NEXT: orr x13, x15, x17
; CHECK-NEXT: lsr x11, x12, x11
; CHECK-NEXT: lsl x12, x0, x1
; CHECK-NEXT: orr x13, x13, x16
; CHECK-NEXT: orr x1, x14, x10
; CHECK-NEXT: cmp x13, #0
; CHECK-NEXT: orr x10, x12, x11
; CHECK-NEXT: cset w11, ne
; CHECK-NEXT: orr x0, x10, x11
; CHECK-NEXT: .LBB3_8: // %itofp-sw-epilog
; CHECK-NEXT: ubfx w10, w0, #2, #1
; CHECK-NEXT: orr x10, x0, x10
; CHECK-NEXT: adds x10, x10, #1
; CHECK-NEXT: adcs x11, x1, xzr
; CHECK-NEXT: extr x12, x11, x10, #2
; CHECK-NEXT: extr x13, x11, x10, #34
; CHECK-NEXT: extr x14, x11, x10, #3
; CHECK-NEXT: extr x11, x11, x10, #35
; CHECK-NEXT: tst x10, #0x80000000000000
; CHECK-NEXT: csel x10, x12, x14, eq
; CHECK-NEXT: csel w8, w8, w9, eq
; CHECK-NEXT: csel w11, w13, w11, eq
; CHECK-NEXT: .LBB3_9: // %itofp-if-end26
; CHECK-NEXT: bfi w11, w8, #20, #12
; CHECK-NEXT: mov w8, #1072693248 // =0x3ff00000
; CHECK-NEXT: add w8, w11, w8
; CHECK-NEXT: bfi x10, x8, #32, #32
; CHECK-NEXT: fmov d0, x10
; CHECK-NEXT: add sp, sp, #192
; CHECK-NEXT: ret
%result = uitofp i256 %val to double
ret double %result
}
define i256 @f32_to_s256(float %val) {
; CHECK-SD-LABEL: f32_to_s256:
; CHECK-SD: // %bb.0: // %fp-to-i-entry
; CHECK-SD-NEXT: fmov w8, s0
; CHECK-SD-NEXT: ubfx w10, w8, #23, #8
; CHECK-SD-NEXT: cmp w10, #127
; CHECK-SD-NEXT: b.hs .LBB4_2
; CHECK-SD-NEXT: // %bb.1:
; CHECK-SD-NEXT: mov x0, xzr
; CHECK-SD-NEXT: mov x1, xzr
; CHECK-SD-NEXT: mov x2, xzr
; CHECK-SD-NEXT: mov x3, xzr
; CHECK-SD-NEXT: ret
; CHECK-SD-NEXT: .LBB4_2: // %fp-to-i-if-check.exp.size
; CHECK-SD-NEXT: sbfx x9, x8, #31, #1
; CHECK-SD-NEXT: mov w11, #8388608 // =0x800000
; CHECK-SD-NEXT: cmp w10, #149
; CHECK-SD-NEXT: bfxil w11, w8, #0, #23
; CHECK-SD-NEXT: orr x8, x9, #0x1
; CHECK-SD-NEXT: b.hi .LBB4_4
; CHECK-SD-NEXT: // %bb.3: // %fp-to-i-if-exp.small
; CHECK-SD-NEXT: mov w12, #150 // =0x96
; CHECK-SD-NEXT: sub w10, w12, w10
; CHECK-SD-NEXT: lsr w10, w11, w10
; CHECK-SD-NEXT: umulh x13, x10, x8
; CHECK-SD-NEXT: umulh x12, x10, x9
; CHECK-SD-NEXT: umulh x11, x9, x10
; CHECK-SD-NEXT: smull x14, w10, w9
; CHECK-SD-NEXT: smull x15, w9, w10
; CHECK-SD-NEXT: smull x9, w9, w10
; CHECK-SD-NEXT: adds x1, x14, x13
; CHECK-SD-NEXT: smull x0, w10, w8
; CHECK-SD-NEXT: adcs x2, x15, x12
; CHECK-SD-NEXT: adc x3, x11, x9
; CHECK-SD-NEXT: ret
; CHECK-SD-NEXT: .LBB4_4: // %fp-to-i-if-exp.large
; CHECK-SD-NEXT: sub sp, sp, #64
; CHECK-SD-NEXT: .cfi_def_cfa_offset 64
; CHECK-SD-NEXT: movi v0.2d, #0000000000000000
; CHECK-SD-NEXT: sub w10, w10, #150
; CHECK-SD-NEXT: str x11, [sp, #32]
; CHECK-SD-NEXT: lsr x11, x10, #3
; CHECK-SD-NEXT: mov x12, sp
; CHECK-SD-NEXT: str xzr, [sp, #56]
; CHECK-SD-NEXT: add x12, x12, #32
; CHECK-SD-NEXT: and x16, x10, #0x3f
; CHECK-SD-NEXT: mvn w2, w10
; CHECK-SD-NEXT: and x11, x11, #0x18
; CHECK-SD-NEXT: eor x16, x16, #0x3f
; CHECK-SD-NEXT: stur q0, [sp, #40]
; CHECK-SD-NEXT: sub x11, x12, x11
; CHECK-SD-NEXT: stp q0, q0, [sp]
; CHECK-SD-NEXT: ldp x12, x15, [x11]
; CHECK-SD-NEXT: ldp x1, x11, [x11, #16]
; CHECK-SD-NEXT: lsl x18, x15, x10
; CHECK-SD-NEXT: lsr x15, x15, #1
; CHECK-SD-NEXT: lsl x13, x12, x10
; CHECK-SD-NEXT: lsr x12, x12, #1
; CHECK-SD-NEXT: lsl x4, x1, x10
; CHECK-SD-NEXT: lsr x1, x1, #1
; CHECK-SD-NEXT: lsr x15, x15, x2
; CHECK-SD-NEXT: lsl x10, x11, x10
; CHECK-SD-NEXT: umulh x14, x13, x8
; CHECK-SD-NEXT: lsr x12, x12, x16
; CHECK-SD-NEXT: lsr x11, x1, x16
; CHECK-SD-NEXT: orr x15, x4, x15
; CHECK-SD-NEXT: mul x0, x13, x9
; CHECK-SD-NEXT: orr x12, x18, x12
; CHECK-SD-NEXT: orr x10, x10, x11
; CHECK-SD-NEXT: umulh x4, x8, x15
; CHECK-SD-NEXT: mul x3, x12, x8
; CHECK-SD-NEXT: umulh x11, x9, x13
; CHECK-SD-NEXT: umulh x18, x12, x8
; CHECK-SD-NEXT: adds x14, x3, x14
; CHECK-SD-NEXT: umulh x17, x13, x9
; CHECK-SD-NEXT: madd x10, x8, x10, x4
; CHECK-SD-NEXT: cinc x18, x18, hs
; CHECK-SD-NEXT: adds x1, x0, x14
; CHECK-SD-NEXT: madd x11, x9, x12, x11
; CHECK-SD-NEXT: mul x16, x12, x9
; CHECK-SD-NEXT: umulh x2, x12, x9
; CHECK-SD-NEXT: madd x10, x9, x15, x10
; CHECK-SD-NEXT: mul x12, x8, x15
; CHECK-SD-NEXT: mul x15, x9, x13
; CHECK-SD-NEXT: madd x9, x9, x13, x11
; CHECK-SD-NEXT: cinc x11, x17, hs
; CHECK-SD-NEXT: adds x11, x18, x11
; CHECK-SD-NEXT: mul x0, x13, x8
; CHECK-SD-NEXT: cset w8, hs
; CHECK-SD-NEXT: adds x11, x16, x11
; CHECK-SD-NEXT: adc x8, x2, x8
; CHECK-SD-NEXT: adds x12, x15, x12
; CHECK-SD-NEXT: adc x9, x9, x10
; CHECK-SD-NEXT: adds x2, x11, x12
; CHECK-SD-NEXT: adc x3, x8, x9
; CHECK-SD-NEXT: add sp, sp, #64
; CHECK-SD-NEXT: ret
;
; CHECK-GI-LABEL: f32_to_s256:
; CHECK-GI: // %bb.0: // %fp-to-i-entry
; CHECK-GI-NEXT: fmov w9, s0
; CHECK-GI-NEXT: mov x0, xzr
; CHECK-GI-NEXT: mov x1, xzr
; CHECK-GI-NEXT: mov x2, xzr
; CHECK-GI-NEXT: mov x3, xzr
; CHECK-GI-NEXT: ubfx w11, w9, #23, #8
; CHECK-GI-NEXT: cmp w9, #0
; CHECK-GI-NEXT: cset w8, mi
; CHECK-GI-NEXT: cmp w11, #127
; CHECK-GI-NEXT: b.lo .LBB4_5
; CHECK-GI-NEXT: // %bb.1: // %fp-to-i-if-check.exp.size
; CHECK-GI-NEXT: sbfx x10, x8, #0, #1
; CHECK-GI-NEXT: and w12, w9, #0x7fffff
; CHECK-GI-NEXT: cmp w11, #150
; CHECK-GI-NEXT: asr x8, x10, #63
; CHECK-GI-NEXT: orr x9, x10, #0x1
; CHECK-GI-NEXT: orr w10, w12, #0x800000
; CHECK-GI-NEXT: b.hs .LBB4_3
; CHECK-GI-NEXT: // %bb.2: // %fp-to-i-if-exp.small
; CHECK-GI-NEXT: mov w12, #150 // =0x96
; CHECK-GI-NEXT: umulh x13, x8, xzr
; CHECK-GI-NEXT: and x16, xzr, #0x1
; CHECK-GI-NEXT: sub w11, w12, w11
; CHECK-GI-NEXT: and x17, xzr, #0x1
; CHECK-GI-NEXT: lsr w10, w10, w11
; CHECK-GI-NEXT: umulh x12, x9, xzr
; CHECK-GI-NEXT: umulh x11, x10, x9
; CHECK-GI-NEXT: smull x14, w10, w8
; CHECK-GI-NEXT: umulh x15, x10, x8
; CHECK-GI-NEXT: adds x1, x14, x11
; CHECK-GI-NEXT: smaddl x11, w10, w8, x12
; CHECK-GI-NEXT: cset w14, hs
; CHECK-GI-NEXT: smaddl x8, w10, w8, x12
; CHECK-GI-NEXT: and x14, x14, #0x1
; CHECK-GI-NEXT: smull x0, w10, w9
; CHECK-GI-NEXT: and x10, xzr, #0x1
; CHECK-GI-NEXT: add x14, x16, x14
; CHECK-GI-NEXT: and x16, xzr, #0x1
; CHECK-GI-NEXT: adds x11, x11, x15
; CHECK-GI-NEXT: add x9, x17, x16
; CHECK-GI-NEXT: cset w12, hs
; CHECK-GI-NEXT: adds x2, x11, x14
; CHECK-GI-NEXT: add x9, x9, x10
; CHECK-GI-NEXT: and x10, x12, #0x1
; CHECK-GI-NEXT: cset w11, hs
; CHECK-GI-NEXT: add x9, x9, x10
; CHECK-GI-NEXT: and x10, x11, #0x1
; CHECK-GI-NEXT: add x8, x8, x13
; CHECK-GI-NEXT: add x9, x9, x10
; CHECK-GI-NEXT: add x8, x8, x15
; CHECK-GI-NEXT: b .LBB4_4
; CHECK-GI-NEXT: .LBB4_3: // %fp-to-i-if-exp.large
; CHECK-GI-NEXT: sub w12, w11, #150
; CHECK-GI-NEXT: mov w13, #64 // =0x40
; CHECK-GI-NEXT: mov w11, #128 // =0x80
; CHECK-GI-NEXT: sub x14, x12, #64
; CHECK-GI-NEXT: sub x15, x13, x12
; CHECK-GI-NEXT: lsl x16, x10, x12
; CHECK-GI-NEXT: lsr x15, x10, x15
; CHECK-GI-NEXT: lsl x14, x10, x14
; CHECK-GI-NEXT: sub x11, x11, x12
; CHECK-GI-NEXT: cmp x12, #64
; CHECK-GI-NEXT: sub x17, x12, #128
; CHECK-GI-NEXT: lsr x18, x10, x11
; CHECK-GI-NEXT: csel x16, x16, xzr, lo
; CHECK-GI-NEXT: csel x14, x15, x14, lo
; CHECK-GI-NEXT: cmp x12, #0
; CHECK-GI-NEXT: sub x15, x17, #64
; CHECK-GI-NEXT: csel x14, xzr, x14, eq
; CHECK-GI-NEXT: cmp x11, #64
; CHECK-GI-NEXT: sub x13, x13, x17
; CHECK-GI-NEXT: csel x18, x18, xzr, lo
; CHECK-GI-NEXT: cmp x11, #0
; CHECK-GI-NEXT: lsl x11, x10, x17
; CHECK-GI-NEXT: lsr x13, x10, x13
; CHECK-GI-NEXT: lsl x15, x10, x15
; CHECK-GI-NEXT: csel x18, x10, x18, eq
; CHECK-GI-NEXT: cmp x17, #64
; CHECK-GI-NEXT: csel x0, x11, xzr, lo
; CHECK-GI-NEXT: csel x10, x13, x15, lo
; CHECK-GI-NEXT: cmp x17, #0
; CHECK-GI-NEXT: csel x13, xzr, x10, eq
; CHECK-GI-NEXT: cmp x12, #128
; CHECK-GI-NEXT: csel x11, x14, xzr, lo
; CHECK-GI-NEXT: csel x10, x16, xzr, lo
; CHECK-GI-NEXT: csel x16, x18, x0, lo
; CHECK-GI-NEXT: mul x14, x11, x9
; CHECK-GI-NEXT: csel x13, xzr, x13, lo
; CHECK-GI-NEXT: cmp x12, #0
; CHECK-GI-NEXT: csel x16, xzr, x16, eq
; CHECK-GI-NEXT: csel x13, xzr, x13, eq
; CHECK-GI-NEXT: mul x15, x10, x8
; CHECK-GI-NEXT: umulh x12, x10, x9
; CHECK-GI-NEXT: mul x17, x16, x9
; CHECK-GI-NEXT: adds x14, x14, x15
; CHECK-GI-NEXT: mul x18, x11, x8
; CHECK-GI-NEXT: cset w2, hs
; CHECK-GI-NEXT: mul x1, x16, x8
; CHECK-GI-NEXT: umulh x0, x11, x9
; CHECK-GI-NEXT: madd x13, x13, x9, x1
; CHECK-GI-NEXT: adds x1, x14, x12
; CHECK-GI-NEXT: and x14, x2, #0x1
; CHECK-GI-NEXT: umulh x3, x10, x8
; CHECK-GI-NEXT: umulh x12, x16, x9
; CHECK-GI-NEXT: cset w16, hs
; CHECK-GI-NEXT: adds x17, x17, x18
; CHECK-GI-NEXT: cset w18, hs
; CHECK-GI-NEXT: adds x15, x17, x15
; CHECK-GI-NEXT: and x16, x16, #0x1
; CHECK-GI-NEXT: and x17, x18, #0x1
; CHECK-GI-NEXT: cset w18, hs
; CHECK-GI-NEXT: madd x13, x11, x8, x13
; CHECK-GI-NEXT: adds x15, x15, x0
; CHECK-GI-NEXT: and x18, x18, #0x1
; CHECK-GI-NEXT: add x14, x14, x16
; CHECK-GI-NEXT: umulh x11, x11, x8
; CHECK-GI-NEXT: add x16, x17, x18
; CHECK-GI-NEXT: cset w17, hs
; CHECK-GI-NEXT: and x17, x17, #0x1
; CHECK-GI-NEXT: adds x15, x15, x3
; CHECK-GI-NEXT: madd x8, x10, x8, x13
; CHECK-GI-NEXT: add x13, x16, x17
; CHECK-GI-NEXT: cset w16, hs
; CHECK-GI-NEXT: adds x2, x15, x14
; CHECK-GI-NEXT: and x14, x16, #0x1
; CHECK-GI-NEXT: mul x0, x10, x9
; CHECK-GI-NEXT: cset w15, hs
; CHECK-GI-NEXT: add x9, x13, x14
; CHECK-GI-NEXT: and x10, x15, #0x1
; CHECK-GI-NEXT: add x11, x12, x11
; CHECK-GI-NEXT: add x9, x9, x10
; CHECK-GI-NEXT: add x10, x11, x3
; CHECK-GI-NEXT: add x9, x10, x9
; CHECK-GI-NEXT: .LBB4_4: // %fp-to-i-cleanup
; CHECK-GI-NEXT: add x3, x8, x9
; CHECK-GI-NEXT: .LBB4_5: // %fp-to-i-cleanup
; CHECK-GI-NEXT: ret
%result = fptosi float %val to i256
ret i256 %result
}
define i256 @f32_to_u256(float %val) {
; CHECK-SD-LABEL: f32_to_u256:
; CHECK-SD: // %bb.0: // %fp-to-i-entry
; CHECK-SD-NEXT: fmov w10, s0
; CHECK-SD-NEXT: ubfx w9, w10, #23, #8
; CHECK-SD-NEXT: cmp w9, #127
; CHECK-SD-NEXT: b.hs .LBB5_2
; CHECK-SD-NEXT: // %bb.1:
; CHECK-SD-NEXT: mov x0, xzr
; CHECK-SD-NEXT: mov x1, xzr
; CHECK-SD-NEXT: mov x2, xzr
; CHECK-SD-NEXT: mov x3, xzr
; CHECK-SD-NEXT: ret
; CHECK-SD-NEXT: .LBB5_2: // %fp-to-i-if-check.exp.size
; CHECK-SD-NEXT: mov w8, #8388608 // =0x800000
; CHECK-SD-NEXT: cmp w9, #149
; CHECK-SD-NEXT: bfxil w8, w10, #0, #23
; CHECK-SD-NEXT: b.hi .LBB5_4
; CHECK-SD-NEXT: // %bb.3: // %fp-to-i-if-exp.small
; CHECK-SD-NEXT: mov w10, #150 // =0x96
; CHECK-SD-NEXT: mov x1, xzr
; CHECK-SD-NEXT: mov x2, xzr
; CHECK-SD-NEXT: sub w9, w10, w9
; CHECK-SD-NEXT: mov x3, xzr
; CHECK-SD-NEXT: lsr w0, w8, w9
; CHECK-SD-NEXT: ret
; CHECK-SD-NEXT: .LBB5_4: // %fp-to-i-if-exp.large
; CHECK-SD-NEXT: sub sp, sp, #64
; CHECK-SD-NEXT: .cfi_def_cfa_offset 64
; CHECK-SD-NEXT: movi v0.2d, #0000000000000000
; CHECK-SD-NEXT: sub w9, w9, #150
; CHECK-SD-NEXT: str x8, [sp, #32]
; CHECK-SD-NEXT: lsr x8, x9, #3
; CHECK-SD-NEXT: mov x10, sp
; CHECK-SD-NEXT: str xzr, [sp, #56]
; CHECK-SD-NEXT: add x10, x10, #32
; CHECK-SD-NEXT: and x13, x9, #0x3f
; CHECK-SD-NEXT: mvn w17, w9
; CHECK-SD-NEXT: and x8, x8, #0x18
; CHECK-SD-NEXT: eor x13, x13, #0x3f
; CHECK-SD-NEXT: stur q0, [sp, #40]
; CHECK-SD-NEXT: sub x8, x10, x8
; CHECK-SD-NEXT: stp q0, q0, [sp]
; CHECK-SD-NEXT: ldp x11, x10, [x8, #8]
; CHECK-SD-NEXT: ldr x12, [x8]
; CHECK-SD-NEXT: ldr x8, [x8, #24]
; CHECK-SD-NEXT: lsr x16, x12, #1
; CHECK-SD-NEXT: lsl x0, x12, x9
; CHECK-SD-NEXT: lsr x14, x10, #1
; CHECK-SD-NEXT: lsr x15, x11, #1
; CHECK-SD-NEXT: lsl x8, x8, x9
; CHECK-SD-NEXT: lsl x10, x10, x9
; CHECK-SD-NEXT: lsl x11, x11, x9
; CHECK-SD-NEXT: lsr x15, x15, x17
; CHECK-SD-NEXT: lsr x14, x14, x13
; CHECK-SD-NEXT: lsr x13, x16, x13
; CHECK-SD-NEXT: orr x3, x8, x14
; CHECK-SD-NEXT: orr x2, x10, x15
; CHECK-SD-NEXT: orr x1, x11, x13
; CHECK-SD-NEXT: add sp, sp, #64
; CHECK-SD-NEXT: ret
;
; CHECK-GI-LABEL: f32_to_u256:
; CHECK-GI: // %bb.0: // %fp-to-i-entry
; CHECK-GI-NEXT: fmov w8, s0
; CHECK-GI-NEXT: mov x0, xzr
; CHECK-GI-NEXT: mov x1, xzr
; CHECK-GI-NEXT: mov x2, xzr
; CHECK-GI-NEXT: mov x3, xzr
; CHECK-GI-NEXT: ubfx w9, w8, #23, #8
; CHECK-GI-NEXT: cmp w9, #127
; CHECK-GI-NEXT: b.lo .LBB5_4
; CHECK-GI-NEXT: // %bb.1: // %fp-to-i-if-check.exp.size
; CHECK-GI-NEXT: and w8, w8, #0x7fffff
; CHECK-GI-NEXT: cmp w9, #150
; CHECK-GI-NEXT: orr w8, w8, #0x800000
; CHECK-GI-NEXT: b.hs .LBB5_3
; CHECK-GI-NEXT: // %bb.2: // %fp-to-i-if-exp.small
; CHECK-GI-NEXT: mov w10, #150 // =0x96
; CHECK-GI-NEXT: mov x1, xzr
; CHECK-GI-NEXT: mov x2, xzr
; CHECK-GI-NEXT: sub w9, w10, w9
; CHECK-GI-NEXT: mov x3, xzr
; CHECK-GI-NEXT: lsr w0, w8, w9
; CHECK-GI-NEXT: ret
; CHECK-GI-NEXT: .LBB5_3: // %fp-to-i-if-exp.large
; CHECK-GI-NEXT: sub w9, w9, #150
; CHECK-GI-NEXT: mov w11, #64 // =0x40
; CHECK-GI-NEXT: mov w10, #128 // =0x80
; CHECK-GI-NEXT: sub x12, x9, #64
; CHECK-GI-NEXT: sub x13, x11, x9
; CHECK-GI-NEXT: lsl x14, x8, x9
; CHECK-GI-NEXT: lsr x13, x8, x13
; CHECK-GI-NEXT: lsl x12, x8, x12
; CHECK-GI-NEXT: sub x10, x10, x9
; CHECK-GI-NEXT: cmp x9, #64
; CHECK-GI-NEXT: sub x15, x9, #128
; CHECK-GI-NEXT: lsr x16, x8, x10
; CHECK-GI-NEXT: csel x14, x14, xzr, lo
; CHECK-GI-NEXT: csel x12, x13, x12, lo
; CHECK-GI-NEXT: cmp x9, #0
; CHECK-GI-NEXT: sub x13, x15, #64
; CHECK-GI-NEXT: csel x12, xzr, x12, eq
; CHECK-GI-NEXT: cmp x10, #64
; CHECK-GI-NEXT: sub x11, x11, x15
; CHECK-GI-NEXT: csel x16, x16, xzr, lo
; CHECK-GI-NEXT: cmp x10, #0
; CHECK-GI-NEXT: lsl x10, x8, x15
; CHECK-GI-NEXT: lsr x11, x8, x11
; CHECK-GI-NEXT: lsl x13, x8, x13
; CHECK-GI-NEXT: csel x8, x8, x16, eq
; CHECK-GI-NEXT: cmp x15, #64
; CHECK-GI-NEXT: csel x10, x10, xzr, lo
; CHECK-GI-NEXT: csel x11, x11, x13, lo
; CHECK-GI-NEXT: cmp x15, #0
; CHECK-GI-NEXT: csel x11, xzr, x11, eq
; CHECK-GI-NEXT: cmp x9, #128
; CHECK-GI-NEXT: csel x0, x14, xzr, lo
; CHECK-GI-NEXT: csel x1, x12, xzr, lo
; CHECK-GI-NEXT: csel x8, x8, x10, lo
; CHECK-GI-NEXT: csel x10, xzr, x11, lo
; CHECK-GI-NEXT: cmp x9, #0
; CHECK-GI-NEXT: csel x2, xzr, x8, eq
; CHECK-GI-NEXT: csel x3, xzr, x10, eq
; CHECK-GI-NEXT: .LBB5_4: // %fp-to-i-cleanup
; CHECK-GI-NEXT: ret
%result = fptoui float %val to i256
ret i256 %result
}
define i256 @f64_to_s256(double %val) {
; CHECK-SD-LABEL: f64_to_s256:
; CHECK-SD: // %bb.0: // %fp-to-i-entry
; CHECK-SD-NEXT: fmov x8, d0
; CHECK-SD-NEXT: ubfx x10, x8, #52, #11
; CHECK-SD-NEXT: cmp x10, #1023
; CHECK-SD-NEXT: b.hs .LBB6_2
; CHECK-SD-NEXT: // %bb.1:
; CHECK-SD-NEXT: mov x0, xzr
; CHECK-SD-NEXT: mov x1, xzr
; CHECK-SD-NEXT: mov x2, xzr
; CHECK-SD-NEXT: mov x3, xzr
; CHECK-SD-NEXT: ret
; CHECK-SD-NEXT: .LBB6_2: // %fp-to-i-if-check.exp.size
; CHECK-SD-NEXT: asr x9, x8, #63
; CHECK-SD-NEXT: mov x11, #4503599627370496 // =0x10000000000000
; CHECK-SD-NEXT: cmp x10, #1074
; CHECK-SD-NEXT: bfxil x11, x8, #0, #52
; CHECK-SD-NEXT: orr x8, x9, #0x1
; CHECK-SD-NEXT: b.hi .LBB6_4
; CHECK-SD-NEXT: // %bb.3: // %fp-to-i-if-exp.small
; CHECK-SD-NEXT: mov w12, #1075 // =0x433
; CHECK-SD-NEXT: sub x10, x12, x10
; CHECK-SD-NEXT: lsr x10, x11, x10
; CHECK-SD-NEXT: umulh x13, x10, x8
; CHECK-SD-NEXT: mul x14, x10, x9
; CHECK-SD-NEXT: mul x11, x9, x10
; CHECK-SD-NEXT: umulh x12, x9, x10
; CHECK-SD-NEXT: adds x1, x14, x13
; CHECK-SD-NEXT: umulh x9, x10, x9
; CHECK-SD-NEXT: mul x0, x10, x8
; CHECK-SD-NEXT: adcs x2, x11, x9
; CHECK-SD-NEXT: adc x3, x12, x11
; CHECK-SD-NEXT: ret
; CHECK-SD-NEXT: .LBB6_4: // %fp-to-i-if-exp.large
; CHECK-SD-NEXT: sub sp, sp, #64
; CHECK-SD-NEXT: .cfi_def_cfa_offset 64
; CHECK-SD-NEXT: movi v0.2d, #0000000000000000
; CHECK-SD-NEXT: sub x10, x10, #1075
; CHECK-SD-NEXT: str x11, [sp, #32]
; CHECK-SD-NEXT: lsr x11, x10, #3
; CHECK-SD-NEXT: mov x12, sp
; CHECK-SD-NEXT: str xzr, [sp, #56]
; CHECK-SD-NEXT: add x12, x12, #32
; CHECK-SD-NEXT: and x16, x10, #0x3f
; CHECK-SD-NEXT: mvn w2, w10
; CHECK-SD-NEXT: and x11, x11, #0x18
; CHECK-SD-NEXT: eor x16, x16, #0x3f
; CHECK-SD-NEXT: stur q0, [sp, #40]
; CHECK-SD-NEXT: sub x11, x12, x11
; CHECK-SD-NEXT: stp q0, q0, [sp]
; CHECK-SD-NEXT: ldp x12, x15, [x11]
; CHECK-SD-NEXT: ldp x1, x11, [x11, #16]
; CHECK-SD-NEXT: lsl x18, x15, x10
; CHECK-SD-NEXT: lsr x15, x15, #1
; CHECK-SD-NEXT: lsl x13, x12, x10
; CHECK-SD-NEXT: lsr x12, x12, #1
; CHECK-SD-NEXT: lsl x4, x1, x10
; CHECK-SD-NEXT: lsr x1, x1, #1
; CHECK-SD-NEXT: lsr x15, x15, x2
; CHECK-SD-NEXT: lsl x10, x11, x10
; CHECK-SD-NEXT: umulh x14, x13, x8
; CHECK-SD-NEXT: lsr x12, x12, x16
; CHECK-SD-NEXT: lsr x11, x1, x16
; CHECK-SD-NEXT: orr x15, x4, x15
; CHECK-SD-NEXT: mul x0, x13, x9
; CHECK-SD-NEXT: orr x12, x18, x12
; CHECK-SD-NEXT: orr x10, x10, x11
; CHECK-SD-NEXT: umulh x4, x8, x15
; CHECK-SD-NEXT: mul x3, x12, x8
; CHECK-SD-NEXT: umulh x11, x9, x13
; CHECK-SD-NEXT: umulh x18, x12, x8
; CHECK-SD-NEXT: adds x14, x3, x14
; CHECK-SD-NEXT: umulh x17, x13, x9
; CHECK-SD-NEXT: madd x10, x8, x10, x4
; CHECK-SD-NEXT: cinc x18, x18, hs
; CHECK-SD-NEXT: adds x1, x0, x14
; CHECK-SD-NEXT: madd x11, x9, x12, x11
; CHECK-SD-NEXT: mul x16, x12, x9
; CHECK-SD-NEXT: umulh x2, x12, x9
; CHECK-SD-NEXT: madd x10, x9, x15, x10
; CHECK-SD-NEXT: mul x12, x8, x15
; CHECK-SD-NEXT: mul x15, x9, x13
; CHECK-SD-NEXT: madd x9, x9, x13, x11
; CHECK-SD-NEXT: cinc x11, x17, hs
; CHECK-SD-NEXT: adds x11, x18, x11
; CHECK-SD-NEXT: mul x0, x13, x8
; CHECK-SD-NEXT: cset w8, hs
; CHECK-SD-NEXT: adds x11, x16, x11
; CHECK-SD-NEXT: adc x8, x2, x8
; CHECK-SD-NEXT: adds x12, x15, x12
; CHECK-SD-NEXT: adc x9, x9, x10
; CHECK-SD-NEXT: adds x2, x11, x12
; CHECK-SD-NEXT: adc x3, x8, x9
; CHECK-SD-NEXT: add sp, sp, #64
; CHECK-SD-NEXT: ret
;
; CHECK-GI-LABEL: f64_to_s256:
; CHECK-GI: // %bb.0: // %fp-to-i-entry
; CHECK-GI-NEXT: fmov x8, d0
; CHECK-GI-NEXT: mov x0, xzr
; CHECK-GI-NEXT: mov x1, xzr
; CHECK-GI-NEXT: mov x2, xzr
; CHECK-GI-NEXT: mov x3, xzr
; CHECK-GI-NEXT: ubfx x11, x8, #52, #11
; CHECK-GI-NEXT: cmp x8, #0
; CHECK-GI-NEXT: cset w9, mi
; CHECK-GI-NEXT: cmp x11, #1023
; CHECK-GI-NEXT: b.lo .LBB6_5
; CHECK-GI-NEXT: // %bb.1: // %fp-to-i-if-check.exp.size
; CHECK-GI-NEXT: sbfx x10, x9, #0, #1
; CHECK-GI-NEXT: and x12, x8, #0xfffffffffffff
; CHECK-GI-NEXT: cmp x11, #1075
; CHECK-GI-NEXT: asr x9, x10, #63
; CHECK-GI-NEXT: orr x8, x10, #0x1
; CHECK-GI-NEXT: orr x10, x12, #0x10000000000000
; CHECK-GI-NEXT: b.hs .LBB6_3
; CHECK-GI-NEXT: // %bb.2: // %fp-to-i-if-exp.small
; CHECK-GI-NEXT: mov w12, #1075 // =0x433
; CHECK-GI-NEXT: umulh x13, x8, xzr
; CHECK-GI-NEXT: and x15, xzr, #0x1
; CHECK-GI-NEXT: sub x11, x12, x11
; CHECK-GI-NEXT: lsr x10, x10, x11
; CHECK-GI-NEXT: mul x11, x10, x9
; CHECK-GI-NEXT: umulh x12, x10, x8
; CHECK-GI-NEXT: umulh x14, x10, x9
; CHECK-GI-NEXT: madd x13, x10, x9, x13
; CHECK-GI-NEXT: adds x1, x11, x12
; CHECK-GI-NEXT: and x12, xzr, #0x1
; CHECK-GI-NEXT: cset w11, hs
; CHECK-GI-NEXT: umulh x9, x9, xzr
; CHECK-GI-NEXT: and x11, x11, #0x1
; CHECK-GI-NEXT: add x11, x12, x11
; CHECK-GI-NEXT: and x12, xzr, #0x1
; CHECK-GI-NEXT: mul x0, x10, x8
; CHECK-GI-NEXT: add x12, x15, x12
; CHECK-GI-NEXT: adds x15, x13, x14
; CHECK-GI-NEXT: and x10, xzr, #0x1
; CHECK-GI-NEXT: cset w8, hs
; CHECK-GI-NEXT: adds x2, x15, x11
; CHECK-GI-NEXT: add x10, x12, x10
; CHECK-GI-NEXT: and x8, x8, #0x1
; CHECK-GI-NEXT: cset w11, hs
; CHECK-GI-NEXT: add x9, x9, x14
; CHECK-GI-NEXT: add x8, x10, x8
; CHECK-GI-NEXT: and x10, x11, #0x1
; CHECK-GI-NEXT: add x9, x13, x9
; CHECK-GI-NEXT: add x8, x8, x10
; CHECK-GI-NEXT: b .LBB6_4
; CHECK-GI-NEXT: .LBB6_3: // %fp-to-i-if-exp.large
; CHECK-GI-NEXT: sub x12, x11, #1075
; CHECK-GI-NEXT: mov w13, #64 // =0x40
; CHECK-GI-NEXT: mov w11, #128 // =0x80
; CHECK-GI-NEXT: sub x14, x12, #64
; CHECK-GI-NEXT: sub x15, x13, x12
; CHECK-GI-NEXT: lsl x16, x10, x12
; CHECK-GI-NEXT: lsr x15, x10, x15
; CHECK-GI-NEXT: lsl x14, x10, x14
; CHECK-GI-NEXT: sub x11, x11, x12
; CHECK-GI-NEXT: cmp x12, #64
; CHECK-GI-NEXT: sub x17, x12, #128
; CHECK-GI-NEXT: lsr x18, x10, x11
; CHECK-GI-NEXT: csel x16, x16, xzr, lo
; CHECK-GI-NEXT: csel x14, x15, x14, lo
; CHECK-GI-NEXT: cmp x12, #0
; CHECK-GI-NEXT: sub x15, x17, #64
; CHECK-GI-NEXT: csel x14, xzr, x14, eq
; CHECK-GI-NEXT: cmp x11, #64
; CHECK-GI-NEXT: sub x13, x13, x17
; CHECK-GI-NEXT: csel x18, x18, xzr, lo
; CHECK-GI-NEXT: cmp x11, #0
; CHECK-GI-NEXT: lsl x11, x10, x17
; CHECK-GI-NEXT: lsr x13, x10, x13
; CHECK-GI-NEXT: lsl x15, x10, x15
; CHECK-GI-NEXT: csel x18, x10, x18, eq
; CHECK-GI-NEXT: cmp x17, #64
; CHECK-GI-NEXT: csel x0, x11, xzr, lo
; CHECK-GI-NEXT: csel x10, x13, x15, lo
; CHECK-GI-NEXT: cmp x17, #0
; CHECK-GI-NEXT: csel x13, xzr, x10, eq
; CHECK-GI-NEXT: cmp x12, #128
; CHECK-GI-NEXT: csel x11, x14, xzr, lo
; CHECK-GI-NEXT: csel x10, x16, xzr, lo
; CHECK-GI-NEXT: csel x16, x18, x0, lo
; CHECK-GI-NEXT: mul x14, x11, x8
; CHECK-GI-NEXT: csel x13, xzr, x13, lo
; CHECK-GI-NEXT: cmp x12, #0
; CHECK-GI-NEXT: csel x16, xzr, x16, eq
; CHECK-GI-NEXT: csel x13, xzr, x13, eq
; CHECK-GI-NEXT: mul x15, x10, x9
; CHECK-GI-NEXT: umulh x12, x10, x8
; CHECK-GI-NEXT: mul x17, x16, x8
; CHECK-GI-NEXT: adds x14, x14, x15
; CHECK-GI-NEXT: mul x18, x11, x9
; CHECK-GI-NEXT: cset w2, hs
; CHECK-GI-NEXT: mul x1, x16, x9
; CHECK-GI-NEXT: umulh x0, x11, x8
; CHECK-GI-NEXT: madd x13, x13, x8, x1
; CHECK-GI-NEXT: adds x1, x14, x12
; CHECK-GI-NEXT: and x14, x2, #0x1
; CHECK-GI-NEXT: umulh x3, x10, x9
; CHECK-GI-NEXT: umulh x12, x16, x8
; CHECK-GI-NEXT: cset w16, hs
; CHECK-GI-NEXT: adds x17, x17, x18
; CHECK-GI-NEXT: cset w18, hs
; CHECK-GI-NEXT: adds x15, x17, x15
; CHECK-GI-NEXT: and x16, x16, #0x1
; CHECK-GI-NEXT: and x17, x18, #0x1
; CHECK-GI-NEXT: cset w18, hs
; CHECK-GI-NEXT: madd x13, x11, x9, x13
; CHECK-GI-NEXT: adds x15, x15, x0
; CHECK-GI-NEXT: and x18, x18, #0x1
; CHECK-GI-NEXT: add x14, x14, x16
; CHECK-GI-NEXT: umulh x11, x11, x9
; CHECK-GI-NEXT: add x16, x17, x18
; CHECK-GI-NEXT: cset w17, hs
; CHECK-GI-NEXT: and x17, x17, #0x1
; CHECK-GI-NEXT: adds x15, x15, x3
; CHECK-GI-NEXT: madd x9, x10, x9, x13
; CHECK-GI-NEXT: add x13, x16, x17
; CHECK-GI-NEXT: cset w16, hs
; CHECK-GI-NEXT: adds x2, x15, x14
; CHECK-GI-NEXT: and x14, x16, #0x1
; CHECK-GI-NEXT: mul x0, x10, x8
; CHECK-GI-NEXT: cset w15, hs
; CHECK-GI-NEXT: add x8, x13, x14
; CHECK-GI-NEXT: and x10, x15, #0x1
; CHECK-GI-NEXT: add x11, x12, x11
; CHECK-GI-NEXT: add x8, x8, x10
; CHECK-GI-NEXT: add x10, x11, x3
; CHECK-GI-NEXT: add x8, x10, x8
; CHECK-GI-NEXT: .LBB6_4: // %fp-to-i-cleanup
; CHECK-GI-NEXT: add x3, x9, x8
; CHECK-GI-NEXT: .LBB6_5: // %fp-to-i-cleanup
; CHECK-GI-NEXT: ret
%result = fptosi double %val to i256
ret i256 %result
}
define i256 @f64_to_u256(double %val) {
; CHECK-SD-LABEL: f64_to_u256:
; CHECK-SD: // %bb.0: // %fp-to-i-entry
; CHECK-SD-NEXT: fmov x10, d0
; CHECK-SD-NEXT: ubfx x8, x10, #52, #11
; CHECK-SD-NEXT: cmp x8, #1023
; CHECK-SD-NEXT: b.hs .LBB7_2
; CHECK-SD-NEXT: // %bb.1:
; CHECK-SD-NEXT: mov x0, xzr
; CHECK-SD-NEXT: mov x1, xzr
; CHECK-SD-NEXT: mov x2, xzr
; CHECK-SD-NEXT: mov x3, xzr
; CHECK-SD-NEXT: ret
; CHECK-SD-NEXT: .LBB7_2: // %fp-to-i-if-check.exp.size
; CHECK-SD-NEXT: mov x9, #4503599627370496 // =0x10000000000000
; CHECK-SD-NEXT: cmp x8, #1074
; CHECK-SD-NEXT: bfxil x9, x10, #0, #52
; CHECK-SD-NEXT: b.hi .LBB7_4
; CHECK-SD-NEXT: // %bb.3: // %fp-to-i-if-exp.small
; CHECK-SD-NEXT: mov w10, #1075 // =0x433
; CHECK-SD-NEXT: mov x1, xzr
; CHECK-SD-NEXT: mov x2, xzr
; CHECK-SD-NEXT: sub x8, x10, x8
; CHECK-SD-NEXT: mov x3, xzr
; CHECK-SD-NEXT: lsr x0, x9, x8
; CHECK-SD-NEXT: ret
; CHECK-SD-NEXT: .LBB7_4: // %fp-to-i-if-exp.large
; CHECK-SD-NEXT: sub sp, sp, #64
; CHECK-SD-NEXT: .cfi_def_cfa_offset 64
; CHECK-SD-NEXT: movi v0.2d, #0000000000000000
; CHECK-SD-NEXT: sub x8, x8, #1075
; CHECK-SD-NEXT: str x9, [sp, #32]
; CHECK-SD-NEXT: lsr x9, x8, #3
; CHECK-SD-NEXT: mov x10, sp
; CHECK-SD-NEXT: str xzr, [sp, #56]
; CHECK-SD-NEXT: add x10, x10, #32
; CHECK-SD-NEXT: and x13, x8, #0x3f
; CHECK-SD-NEXT: mvn w17, w8
; CHECK-SD-NEXT: and x9, x9, #0x18
; CHECK-SD-NEXT: eor x13, x13, #0x3f
; CHECK-SD-NEXT: stur q0, [sp, #40]
; CHECK-SD-NEXT: sub x9, x10, x9
; CHECK-SD-NEXT: stp q0, q0, [sp]
; CHECK-SD-NEXT: ldp x11, x10, [x9, #8]
; CHECK-SD-NEXT: ldr x12, [x9]
; CHECK-SD-NEXT: ldr x9, [x9, #24]
; CHECK-SD-NEXT: lsr x16, x12, #1
; CHECK-SD-NEXT: lsl x0, x12, x8
; CHECK-SD-NEXT: lsr x14, x10, #1
; CHECK-SD-NEXT: lsr x15, x11, #1
; CHECK-SD-NEXT: lsl x9, x9, x8
; CHECK-SD-NEXT: lsl x10, x10, x8
; CHECK-SD-NEXT: lsl x11, x11, x8
; CHECK-SD-NEXT: lsr x15, x15, x17
; CHECK-SD-NEXT: lsr x14, x14, x13
; CHECK-SD-NEXT: lsr x13, x16, x13
; CHECK-SD-NEXT: orr x3, x9, x14
; CHECK-SD-NEXT: orr x2, x10, x15
; CHECK-SD-NEXT: orr x1, x11, x13
; CHECK-SD-NEXT: add sp, sp, #64
; CHECK-SD-NEXT: ret
;
; CHECK-GI-LABEL: f64_to_u256:
; CHECK-GI: // %bb.0: // %fp-to-i-entry
; CHECK-GI-NEXT: fmov x8, d0
; CHECK-GI-NEXT: mov x0, xzr
; CHECK-GI-NEXT: mov x1, xzr
; CHECK-GI-NEXT: mov x2, xzr
; CHECK-GI-NEXT: mov x3, xzr
; CHECK-GI-NEXT: ubfx x9, x8, #52, #11
; CHECK-GI-NEXT: cmp x9, #1023
; CHECK-GI-NEXT: b.lo .LBB7_4
; CHECK-GI-NEXT: // %bb.1: // %fp-to-i-if-check.exp.size
; CHECK-GI-NEXT: and x8, x8, #0xfffffffffffff
; CHECK-GI-NEXT: cmp x9, #1075
; CHECK-GI-NEXT: orr x8, x8, #0x10000000000000
; CHECK-GI-NEXT: b.hs .LBB7_3
; CHECK-GI-NEXT: // %bb.2: // %fp-to-i-if-exp.small
; CHECK-GI-NEXT: mov w10, #1075 // =0x433
; CHECK-GI-NEXT: mov x1, xzr
; CHECK-GI-NEXT: mov x2, xzr
; CHECK-GI-NEXT: sub x9, x10, x9
; CHECK-GI-NEXT: mov x3, xzr
; CHECK-GI-NEXT: lsr x0, x8, x9
; CHECK-GI-NEXT: ret
; CHECK-GI-NEXT: .LBB7_3: // %fp-to-i-if-exp.large
; CHECK-GI-NEXT: sub x9, x9, #1075
; CHECK-GI-NEXT: mov w11, #64 // =0x40
; CHECK-GI-NEXT: mov w10, #128 // =0x80
; CHECK-GI-NEXT: sub x12, x9, #64
; CHECK-GI-NEXT: sub x13, x11, x9
; CHECK-GI-NEXT: lsl x14, x8, x9
; CHECK-GI-NEXT: lsr x13, x8, x13
; CHECK-GI-NEXT: lsl x12, x8, x12
; CHECK-GI-NEXT: sub x10, x10, x9
; CHECK-GI-NEXT: cmp x9, #64
; CHECK-GI-NEXT: sub x15, x9, #128
; CHECK-GI-NEXT: lsr x16, x8, x10
; CHECK-GI-NEXT: csel x14, x14, xzr, lo
; CHECK-GI-NEXT: csel x12, x13, x12, lo
; CHECK-GI-NEXT: cmp x9, #0
; CHECK-GI-NEXT: sub x13, x15, #64
; CHECK-GI-NEXT: csel x12, xzr, x12, eq
; CHECK-GI-NEXT: cmp x10, #64
; CHECK-GI-NEXT: sub x11, x11, x15
; CHECK-GI-NEXT: csel x16, x16, xzr, lo
; CHECK-GI-NEXT: cmp x10, #0
; CHECK-GI-NEXT: lsl x10, x8, x15
; CHECK-GI-NEXT: lsr x11, x8, x11
; CHECK-GI-NEXT: lsl x13, x8, x13
; CHECK-GI-NEXT: csel x8, x8, x16, eq
; CHECK-GI-NEXT: cmp x15, #64
; CHECK-GI-NEXT: csel x10, x10, xzr, lo
; CHECK-GI-NEXT: csel x11, x11, x13, lo
; CHECK-GI-NEXT: cmp x15, #0
; CHECK-GI-NEXT: csel x11, xzr, x11, eq
; CHECK-GI-NEXT: cmp x9, #128
; CHECK-GI-NEXT: csel x0, x14, xzr, lo
; CHECK-GI-NEXT: csel x1, x12, xzr, lo
; CHECK-GI-NEXT: csel x8, x8, x10, lo
; CHECK-GI-NEXT: csel x10, xzr, x11, lo
; CHECK-GI-NEXT: cmp x9, #0
; CHECK-GI-NEXT: csel x2, xzr, x8, eq
; CHECK-GI-NEXT: csel x3, xzr, x10, eq
; CHECK-GI-NEXT: .LBB7_4: // %fp-to-i-cleanup
; CHECK-GI-NEXT: ret
%result = fptoui double %val to i256
ret i256 %result
}
define i256 @f32_to_s256_sat(float %val) {
; CHECK-SD-LABEL: f32_to_s256_sat:
; CHECK-SD: // %bb.0: // %fp-to-i-entry
; CHECK-SD-NEXT: fmov w8, s0
; CHECK-SD-NEXT: mov x0, xzr
; CHECK-SD-NEXT: ubfx w10, w8, #23, #8
; CHECK-SD-NEXT: cmp w10, #127
; CHECK-SD-NEXT: b.lo .LBB8_4
; CHECK-SD-NEXT: // %bb.1: // %fp-to-i-entry
; CHECK-SD-NEXT: fcmp s0, s0
; CHECK-SD-NEXT: mov x1, x0
; CHECK-SD-NEXT: mov x2, x0
; CHECK-SD-NEXT: mov x3, x0
; CHECK-SD-NEXT: b.vs .LBB8_8
; CHECK-SD-NEXT: // %bb.2: // %fp-to-i-if-check.saturate
; CHECK-SD-NEXT: cmp w10, #382
; CHECK-SD-NEXT: b.lo .LBB8_5
; CHECK-SD-NEXT: // %bb.3: // %fp-to-i-if-saturate
; CHECK-SD-NEXT: // kill: def $w8 killed $w8 killed $x8 def $x8
; CHECK-SD-NEXT: sbfx x8, x8, #31, #1
; CHECK-SD-NEXT: mvn x0, x8
; CHECK-SD-NEXT: eor x3, x8, #0x7fffffffffffffff
; CHECK-SD-NEXT: mov x1, x0
; CHECK-SD-NEXT: mov x2, x0
; CHECK-SD-NEXT: ret
; CHECK-SD-NEXT: .LBB8_4:
; CHECK-SD-NEXT: mov x1, x0
; CHECK-SD-NEXT: mov x2, x0
; CHECK-SD-NEXT: mov x3, x0
; CHECK-SD-NEXT: ret
; CHECK-SD-NEXT: .LBB8_5: // %fp-to-i-if-check.exp.size
; CHECK-SD-NEXT: sbfx x9, x8, #31, #1
; CHECK-SD-NEXT: mov w11, #8388608 // =0x800000
; CHECK-SD-NEXT: cmp w10, #149
; CHECK-SD-NEXT: bfxil w11, w8, #0, #23
; CHECK-SD-NEXT: orr x8, x9, #0x1
; CHECK-SD-NEXT: b.hi .LBB8_7
; CHECK-SD-NEXT: // %bb.6: // %fp-to-i-if-exp.small
; CHECK-SD-NEXT: mov w12, #150 // =0x96
; CHECK-SD-NEXT: sub w10, w12, w10
; CHECK-SD-NEXT: lsr w10, w11, w10
; CHECK-SD-NEXT: umulh x13, x10, x8
; CHECK-SD-NEXT: umulh x12, x10, x9
; CHECK-SD-NEXT: umulh x11, x9, x10
; CHECK-SD-NEXT: smull x14, w10, w9
; CHECK-SD-NEXT: smull x15, w9, w10
; CHECK-SD-NEXT: smull x9, w9, w10
; CHECK-SD-NEXT: adds x1, x14, x13
; CHECK-SD-NEXT: smull x0, w10, w8
; CHECK-SD-NEXT: adcs x2, x15, x12
; CHECK-SD-NEXT: adc x3, x11, x9
; CHECK-SD-NEXT: ret
; CHECK-SD-NEXT: .LBB8_7: // %fp-to-i-if-exp.large
; CHECK-SD-NEXT: sub sp, sp, #64
; CHECK-SD-NEXT: .cfi_def_cfa_offset 64
; CHECK-SD-NEXT: movi v0.2d, #0000000000000000
; CHECK-SD-NEXT: sub w10, w10, #150
; CHECK-SD-NEXT: str x11, [sp, #32]
; CHECK-SD-NEXT: lsr x11, x10, #3
; CHECK-SD-NEXT: mov x12, sp
; CHECK-SD-NEXT: str xzr, [sp, #56]
; CHECK-SD-NEXT: add x12, x12, #32
; CHECK-SD-NEXT: and x16, x10, #0x3f
; CHECK-SD-NEXT: mvn w2, w10
; CHECK-SD-NEXT: and x11, x11, #0x18
; CHECK-SD-NEXT: eor x16, x16, #0x3f
; CHECK-SD-NEXT: stur q0, [sp, #40]
; CHECK-SD-NEXT: sub x11, x12, x11
; CHECK-SD-NEXT: stp q0, q0, [sp]
; CHECK-SD-NEXT: ldp x12, x15, [x11]
; CHECK-SD-NEXT: ldp x1, x11, [x11, #16]
; CHECK-SD-NEXT: lsl x18, x15, x10
; CHECK-SD-NEXT: lsr x15, x15, #1
; CHECK-SD-NEXT: lsl x13, x12, x10
; CHECK-SD-NEXT: lsr x12, x12, #1
; CHECK-SD-NEXT: lsl x4, x1, x10
; CHECK-SD-NEXT: lsr x1, x1, #1
; CHECK-SD-NEXT: lsr x15, x15, x2
; CHECK-SD-NEXT: lsl x10, x11, x10
; CHECK-SD-NEXT: umulh x14, x13, x8
; CHECK-SD-NEXT: lsr x12, x12, x16
; CHECK-SD-NEXT: lsr x11, x1, x16
; CHECK-SD-NEXT: orr x15, x4, x15
; CHECK-SD-NEXT: mul x0, x13, x9
; CHECK-SD-NEXT: orr x12, x18, x12
; CHECK-SD-NEXT: orr x10, x10, x11
; CHECK-SD-NEXT: umulh x4, x8, x15
; CHECK-SD-NEXT: mul x3, x12, x8
; CHECK-SD-NEXT: umulh x11, x9, x13
; CHECK-SD-NEXT: umulh x18, x12, x8
; CHECK-SD-NEXT: adds x14, x3, x14
; CHECK-SD-NEXT: umulh x17, x13, x9
; CHECK-SD-NEXT: madd x10, x8, x10, x4
; CHECK-SD-NEXT: cinc x18, x18, hs
; CHECK-SD-NEXT: adds x1, x0, x14
; CHECK-SD-NEXT: madd x11, x9, x12, x11
; CHECK-SD-NEXT: mul x16, x12, x9
; CHECK-SD-NEXT: umulh x2, x12, x9
; CHECK-SD-NEXT: madd x10, x9, x15, x10
; CHECK-SD-NEXT: mul x12, x8, x15
; CHECK-SD-NEXT: mul x15, x9, x13
; CHECK-SD-NEXT: madd x9, x9, x13, x11
; CHECK-SD-NEXT: cinc x11, x17, hs
; CHECK-SD-NEXT: adds x11, x18, x11
; CHECK-SD-NEXT: mul x0, x13, x8
; CHECK-SD-NEXT: cset w8, hs
; CHECK-SD-NEXT: adds x11, x16, x11
; CHECK-SD-NEXT: adc x8, x2, x8
; CHECK-SD-NEXT: adds x12, x15, x12
; CHECK-SD-NEXT: adc x9, x9, x10
; CHECK-SD-NEXT: adds x2, x11, x12
; CHECK-SD-NEXT: adc x3, x8, x9
; CHECK-SD-NEXT: add sp, sp, #64
; CHECK-SD-NEXT: .LBB8_8: // %fp-to-i-cleanup
; CHECK-SD-NEXT: ret
;
; CHECK-GI-LABEL: f32_to_s256_sat:
; CHECK-GI: // %bb.0: // %fp-to-i-entry
; CHECK-GI-NEXT: fmov w9, s0
; CHECK-GI-NEXT: ubfx w11, w9, #23, #8
; CHECK-GI-NEXT: cmp w9, #0
; CHECK-GI-NEXT: cset w8, mi
; CHECK-GI-NEXT: cmp w11, #127
; CHECK-GI-NEXT: b.lo .LBB8_4
; CHECK-GI-NEXT: // %bb.1: // %fp-to-i-entry
; CHECK-GI-NEXT: fcmp s0, s0
; CHECK-GI-NEXT: b.vs .LBB8_4
; CHECK-GI-NEXT: // %bb.2: // %fp-to-i-if-check.saturate
; CHECK-GI-NEXT: mov w10, #1 // =0x1
; CHECK-GI-NEXT: tbnz w10, #0, .LBB8_5
; CHECK-GI-NEXT: // %bb.3: // %fp-to-i-if-saturate
; CHECK-GI-NEXT: cmp w9, #0
; CHECK-GI-NEXT: mov w8, wzr
; CHECK-GI-NEXT: cset w9, pl
; CHECK-GI-NEXT: cmp w8, #1
; CHECK-GI-NEXT: mov x8, #-9223372036854775808 // =0x8000000000000000
; CHECK-GI-NEXT: sbfx x0, x9, #0, #1
; CHECK-GI-NEXT: asr x9, x0, #63
; CHECK-GI-NEXT: adcs x1, x9, xzr
; CHECK-GI-NEXT: adcs x2, x9, xzr
; CHECK-GI-NEXT: adc x3, x9, x8
; CHECK-GI-NEXT: ret
; CHECK-GI-NEXT: .LBB8_4:
; CHECK-GI-NEXT: mov x0, xzr
; CHECK-GI-NEXT: mov x1, xzr
; CHECK-GI-NEXT: mov x2, xzr
; CHECK-GI-NEXT: mov x3, xzr
; CHECK-GI-NEXT: ret
; CHECK-GI-NEXT: .LBB8_5: // %fp-to-i-if-check.exp.size
; CHECK-GI-NEXT: sbfx x10, x8, #0, #1
; CHECK-GI-NEXT: and w12, w9, #0x7fffff
; CHECK-GI-NEXT: cmp w11, #150
; CHECK-GI-NEXT: asr x8, x10, #63
; CHECK-GI-NEXT: orr x9, x10, #0x1
; CHECK-GI-NEXT: orr w10, w12, #0x800000
; CHECK-GI-NEXT: b.hs .LBB8_7
; CHECK-GI-NEXT: // %bb.6: // %fp-to-i-if-exp.small
; CHECK-GI-NEXT: mov w12, #150 // =0x96
; CHECK-GI-NEXT: umulh x13, x8, xzr
; CHECK-GI-NEXT: and x16, xzr, #0x1
; CHECK-GI-NEXT: sub w11, w12, w11
; CHECK-GI-NEXT: and x17, xzr, #0x1
; CHECK-GI-NEXT: lsr w10, w10, w11
; CHECK-GI-NEXT: umulh x12, x9, xzr
; CHECK-GI-NEXT: umulh x11, x10, x9
; CHECK-GI-NEXT: smull x14, w10, w8
; CHECK-GI-NEXT: umulh x15, x10, x8
; CHECK-GI-NEXT: adds x1, x14, x11
; CHECK-GI-NEXT: smaddl x11, w10, w8, x12
; CHECK-GI-NEXT: cset w14, hs
; CHECK-GI-NEXT: smaddl x8, w10, w8, x12
; CHECK-GI-NEXT: and x14, x14, #0x1
; CHECK-GI-NEXT: smull x0, w10, w9
; CHECK-GI-NEXT: and x10, xzr, #0x1
; CHECK-GI-NEXT: add x14, x16, x14
; CHECK-GI-NEXT: and x16, xzr, #0x1
; CHECK-GI-NEXT: adds x11, x11, x15
; CHECK-GI-NEXT: add x9, x17, x16
; CHECK-GI-NEXT: cset w12, hs
; CHECK-GI-NEXT: adds x2, x11, x14
; CHECK-GI-NEXT: add x9, x9, x10
; CHECK-GI-NEXT: and x10, x12, #0x1
; CHECK-GI-NEXT: cset w11, hs
; CHECK-GI-NEXT: add x9, x9, x10
; CHECK-GI-NEXT: and x10, x11, #0x1
; CHECK-GI-NEXT: add x8, x8, x13
; CHECK-GI-NEXT: add x9, x9, x10
; CHECK-GI-NEXT: add x8, x8, x15
; CHECK-GI-NEXT: add x3, x8, x9
; CHECK-GI-NEXT: ret
; CHECK-GI-NEXT: .LBB8_7: // %fp-to-i-if-exp.large
; CHECK-GI-NEXT: sub w12, w11, #150
; CHECK-GI-NEXT: mov w13, #64 // =0x40
; CHECK-GI-NEXT: mov w11, #128 // =0x80
; CHECK-GI-NEXT: sub x14, x12, #64
; CHECK-GI-NEXT: sub x15, x13, x12
; CHECK-GI-NEXT: lsl x16, x10, x12
; CHECK-GI-NEXT: lsr x15, x10, x15
; CHECK-GI-NEXT: lsl x14, x10, x14
; CHECK-GI-NEXT: sub x11, x11, x12
; CHECK-GI-NEXT: cmp x12, #64
; CHECK-GI-NEXT: sub x17, x12, #128
; CHECK-GI-NEXT: lsr x18, x10, x11
; CHECK-GI-NEXT: csel x16, x16, xzr, lo
; CHECK-GI-NEXT: csel x14, x15, x14, lo
; CHECK-GI-NEXT: cmp x12, #0
; CHECK-GI-NEXT: sub x15, x17, #64
; CHECK-GI-NEXT: csel x14, xzr, x14, eq
; CHECK-GI-NEXT: cmp x11, #64
; CHECK-GI-NEXT: sub x13, x13, x17
; CHECK-GI-NEXT: csel x18, x18, xzr, lo
; CHECK-GI-NEXT: cmp x11, #0
; CHECK-GI-NEXT: lsl x11, x10, x17
; CHECK-GI-NEXT: lsr x13, x10, x13
; CHECK-GI-NEXT: lsl x15, x10, x15
; CHECK-GI-NEXT: csel x18, x10, x18, eq
; CHECK-GI-NEXT: cmp x17, #64
; CHECK-GI-NEXT: csel x0, x11, xzr, lo
; CHECK-GI-NEXT: csel x10, x13, x15, lo
; CHECK-GI-NEXT: cmp x17, #0
; CHECK-GI-NEXT: csel x13, xzr, x10, eq
; CHECK-GI-NEXT: cmp x12, #128
; CHECK-GI-NEXT: csel x11, x14, xzr, lo
; CHECK-GI-NEXT: csel x10, x16, xzr, lo
; CHECK-GI-NEXT: csel x16, x18, x0, lo
; CHECK-GI-NEXT: mul x14, x11, x9
; CHECK-GI-NEXT: csel x13, xzr, x13, lo
; CHECK-GI-NEXT: cmp x12, #0
; CHECK-GI-NEXT: csel x16, xzr, x16, eq
; CHECK-GI-NEXT: csel x13, xzr, x13, eq
; CHECK-GI-NEXT: mul x15, x10, x8
; CHECK-GI-NEXT: umulh x12, x10, x9
; CHECK-GI-NEXT: mul x17, x16, x9
; CHECK-GI-NEXT: adds x14, x14, x15
; CHECK-GI-NEXT: mul x18, x11, x8
; CHECK-GI-NEXT: cset w2, hs
; CHECK-GI-NEXT: mul x1, x16, x8
; CHECK-GI-NEXT: umulh x0, x11, x9
; CHECK-GI-NEXT: madd x13, x13, x9, x1
; CHECK-GI-NEXT: adds x1, x14, x12
; CHECK-GI-NEXT: and x14, x2, #0x1
; CHECK-GI-NEXT: umulh x3, x10, x8
; CHECK-GI-NEXT: umulh x12, x16, x9
; CHECK-GI-NEXT: cset w16, hs
; CHECK-GI-NEXT: adds x17, x17, x18
; CHECK-GI-NEXT: cset w18, hs
; CHECK-GI-NEXT: adds x15, x17, x15
; CHECK-GI-NEXT: and x16, x16, #0x1
; CHECK-GI-NEXT: and x17, x18, #0x1
; CHECK-GI-NEXT: cset w18, hs
; CHECK-GI-NEXT: madd x13, x11, x8, x13
; CHECK-GI-NEXT: adds x15, x15, x0
; CHECK-GI-NEXT: and x18, x18, #0x1
; CHECK-GI-NEXT: add x14, x14, x16
; CHECK-GI-NEXT: umulh x11, x11, x8
; CHECK-GI-NEXT: add x16, x17, x18
; CHECK-GI-NEXT: cset w17, hs
; CHECK-GI-NEXT: and x17, x17, #0x1
; CHECK-GI-NEXT: adds x15, x15, x3
; CHECK-GI-NEXT: madd x8, x10, x8, x13
; CHECK-GI-NEXT: add x13, x16, x17
; CHECK-GI-NEXT: cset w16, hs
; CHECK-GI-NEXT: adds x2, x15, x14
; CHECK-GI-NEXT: and x14, x16, #0x1
; CHECK-GI-NEXT: cset w15, hs
; CHECK-GI-NEXT: mul x0, x10, x9
; CHECK-GI-NEXT: add x9, x13, x14
; CHECK-GI-NEXT: and x10, x15, #0x1
; CHECK-GI-NEXT: add x11, x12, x11
; CHECK-GI-NEXT: add x9, x9, x10
; CHECK-GI-NEXT: add x10, x11, x3
; CHECK-GI-NEXT: add x9, x10, x9
; CHECK-GI-NEXT: add x3, x8, x9
; CHECK-GI-NEXT: ret
%result = call i256 @llvm.fptosi.sat(float %val)
ret i256 %result
}
define i256 @f32_to_u256_sat(float %val) {
; CHECK-SD-LABEL: f32_to_u256_sat:
; CHECK-SD: // %bb.0: // %fp-to-i-entry
; CHECK-SD-NEXT: fmov w9, s0
; CHECK-SD-NEXT: mov x0, xzr
; CHECK-SD-NEXT: ubfx w8, w9, #23, #8
; CHECK-SD-NEXT: cmp w8, #127
; CHECK-SD-NEXT: b.lo .LBB9_7
; CHECK-SD-NEXT: // %bb.1: // %fp-to-i-entry
; CHECK-SD-NEXT: fcmp s0, s0
; CHECK-SD-NEXT: b.vs .LBB9_7
; CHECK-SD-NEXT: // %bb.2: // %fp-to-i-entry
; CHECK-SD-NEXT: mov x1, x0
; CHECK-SD-NEXT: mov x2, x0
; CHECK-SD-NEXT: mov x3, x0
; CHECK-SD-NEXT: tbnz w9, #31, .LBB9_9
; CHECK-SD-NEXT: // %bb.3: // %fp-to-i-if-check.saturate
; CHECK-SD-NEXT: cmp w8, #382
; CHECK-SD-NEXT: b.ls .LBB9_5
; CHECK-SD-NEXT: // %bb.4:
; CHECK-SD-NEXT: mov x0, #-1 // =0xffffffffffffffff
; CHECK-SD-NEXT: mov x1, #-1 // =0xffffffffffffffff
; CHECK-SD-NEXT: mov x2, #-1 // =0xffffffffffffffff
; CHECK-SD-NEXT: mov x3, #-1 // =0xffffffffffffffff
; CHECK-SD-NEXT: ret
; CHECK-SD-NEXT: .LBB9_5: // %fp-to-i-if-check.exp.size
; CHECK-SD-NEXT: mov w10, #8388608 // =0x800000
; CHECK-SD-NEXT: cmp w8, #149
; CHECK-SD-NEXT: bfxil w10, w9, #0, #23
; CHECK-SD-NEXT: b.hi .LBB9_8
; CHECK-SD-NEXT: // %bb.6: // %fp-to-i-if-exp.small
; CHECK-SD-NEXT: mov w9, #150 // =0x96
; CHECK-SD-NEXT: mov x1, xzr
; CHECK-SD-NEXT: mov x2, xzr
; CHECK-SD-NEXT: sub w8, w9, w8
; CHECK-SD-NEXT: mov x3, xzr
; CHECK-SD-NEXT: lsr w0, w10, w8
; CHECK-SD-NEXT: ret
; CHECK-SD-NEXT: .LBB9_7:
; CHECK-SD-NEXT: mov x1, x0
; CHECK-SD-NEXT: mov x2, x0
; CHECK-SD-NEXT: mov x3, x0
; CHECK-SD-NEXT: ret
; CHECK-SD-NEXT: .LBB9_8: // %fp-to-i-if-exp.large
; CHECK-SD-NEXT: sub sp, sp, #64
; CHECK-SD-NEXT: .cfi_def_cfa_offset 64
; CHECK-SD-NEXT: movi v0.2d, #0000000000000000
; CHECK-SD-NEXT: sub w8, w8, #150
; CHECK-SD-NEXT: str x10, [sp, #32]
; CHECK-SD-NEXT: lsr x9, x8, #3
; CHECK-SD-NEXT: mov x10, sp
; CHECK-SD-NEXT: str xzr, [sp, #56]
; CHECK-SD-NEXT: add x10, x10, #32
; CHECK-SD-NEXT: and x13, x8, #0x3f
; CHECK-SD-NEXT: mvn w17, w8
; CHECK-SD-NEXT: and x9, x9, #0x18
; CHECK-SD-NEXT: eor x13, x13, #0x3f
; CHECK-SD-NEXT: stur q0, [sp, #40]
; CHECK-SD-NEXT: sub x9, x10, x9
; CHECK-SD-NEXT: stp q0, q0, [sp]
; CHECK-SD-NEXT: ldp x11, x10, [x9, #8]
; CHECK-SD-NEXT: ldr x12, [x9]
; CHECK-SD-NEXT: ldr x9, [x9, #24]
; CHECK-SD-NEXT: lsr x16, x12, #1
; CHECK-SD-NEXT: lsl x0, x12, x8
; CHECK-SD-NEXT: lsr x14, x10, #1
; CHECK-SD-NEXT: lsr x15, x11, #1
; CHECK-SD-NEXT: lsl x9, x9, x8
; CHECK-SD-NEXT: lsl x10, x10, x8
; CHECK-SD-NEXT: lsl x11, x11, x8
; CHECK-SD-NEXT: lsr x15, x15, x17
; CHECK-SD-NEXT: lsr x14, x14, x13
; CHECK-SD-NEXT: lsr x13, x16, x13
; CHECK-SD-NEXT: orr x3, x9, x14
; CHECK-SD-NEXT: orr x2, x10, x15
; CHECK-SD-NEXT: orr x1, x11, x13
; CHECK-SD-NEXT: add sp, sp, #64
; CHECK-SD-NEXT: .LBB9_9: // %fp-to-i-cleanup
; CHECK-SD-NEXT: ret
;
; CHECK-GI-LABEL: f32_to_u256_sat:
; CHECK-GI: // %bb.0: // %fp-to-i-entry
; CHECK-GI-NEXT: fmov w8, s0
; CHECK-GI-NEXT: mov x0, xzr
; CHECK-GI-NEXT: ubfx w9, w8, #23, #8
; CHECK-GI-NEXT: cmp w9, #127
; CHECK-GI-NEXT: b.lo .LBB9_7
; CHECK-GI-NEXT: // %bb.1: // %fp-to-i-entry
; CHECK-GI-NEXT: fcmp s0, s0
; CHECK-GI-NEXT: b.vs .LBB9_7
; CHECK-GI-NEXT: // %bb.2: // %fp-to-i-entry
; CHECK-GI-NEXT: mov x1, x0
; CHECK-GI-NEXT: mov x2, x0
; CHECK-GI-NEXT: mov x3, x0
; CHECK-GI-NEXT: tbnz w8, #31, .LBB9_6
; CHECK-GI-NEXT: // %bb.3: // %fp-to-i-if-check.saturate
; CHECK-GI-NEXT: and w8, w8, #0x7fffff
; CHECK-GI-NEXT: cmp w9, #150
; CHECK-GI-NEXT: mov x0, #-1 // =0xffffffffffffffff
; CHECK-GI-NEXT: orr w8, w8, #0x800000
; CHECK-GI-NEXT: mov x1, #-1 // =0xffffffffffffffff
; CHECK-GI-NEXT: mov x2, #-1 // =0xffffffffffffffff
; CHECK-GI-NEXT: mov x3, #-1 // =0xffffffffffffffff
; CHECK-GI-NEXT: b.hs .LBB9_5
; CHECK-GI-NEXT: // %bb.4: // %fp-to-i-if-exp.small
; CHECK-GI-NEXT: mov w10, #150 // =0x96
; CHECK-GI-NEXT: mov x1, xzr
; CHECK-GI-NEXT: mov x2, xzr
; CHECK-GI-NEXT: sub w9, w10, w9
; CHECK-GI-NEXT: mov x3, xzr
; CHECK-GI-NEXT: lsr w0, w8, w9
; CHECK-GI-NEXT: ret
; CHECK-GI-NEXT: .LBB9_5: // %fp-to-i-if-exp.large
; CHECK-GI-NEXT: sub w9, w9, #150
; CHECK-GI-NEXT: mov w11, #64 // =0x40
; CHECK-GI-NEXT: mov w10, #128 // =0x80
; CHECK-GI-NEXT: sub x12, x9, #64
; CHECK-GI-NEXT: sub x13, x11, x9
; CHECK-GI-NEXT: lsl x14, x8, x9
; CHECK-GI-NEXT: lsr x13, x8, x13
; CHECK-GI-NEXT: lsl x12, x8, x12
; CHECK-GI-NEXT: sub x10, x10, x9
; CHECK-GI-NEXT: cmp x9, #64
; CHECK-GI-NEXT: sub x15, x9, #128
; CHECK-GI-NEXT: lsr x16, x8, x10
; CHECK-GI-NEXT: csel x14, x14, xzr, lo
; CHECK-GI-NEXT: csel x12, x13, x12, lo
; CHECK-GI-NEXT: cmp x9, #0
; CHECK-GI-NEXT: sub x13, x15, #64
; CHECK-GI-NEXT: csel x12, xzr, x12, eq
; CHECK-GI-NEXT: cmp x10, #64
; CHECK-GI-NEXT: sub x11, x11, x15
; CHECK-GI-NEXT: csel x16, x16, xzr, lo
; CHECK-GI-NEXT: cmp x10, #0
; CHECK-GI-NEXT: lsl x10, x8, x15
; CHECK-GI-NEXT: lsr x11, x8, x11
; CHECK-GI-NEXT: lsl x13, x8, x13
; CHECK-GI-NEXT: csel x8, x8, x16, eq
; CHECK-GI-NEXT: cmp x15, #64
; CHECK-GI-NEXT: csel x10, x10, xzr, lo
; CHECK-GI-NEXT: csel x11, x11, x13, lo
; CHECK-GI-NEXT: cmp x15, #0
; CHECK-GI-NEXT: csel x11, xzr, x11, eq
; CHECK-GI-NEXT: cmp x9, #128
; CHECK-GI-NEXT: csel x0, x14, xzr, lo
; CHECK-GI-NEXT: csel x1, x12, xzr, lo
; CHECK-GI-NEXT: csel x8, x8, x10, lo
; CHECK-GI-NEXT: csel x10, xzr, x11, lo
; CHECK-GI-NEXT: cmp x9, #0
; CHECK-GI-NEXT: csel x2, xzr, x8, eq
; CHECK-GI-NEXT: csel x3, xzr, x10, eq
; CHECK-GI-NEXT: .LBB9_6: // %fp-to-i-cleanup
; CHECK-GI-NEXT: ret
; CHECK-GI-NEXT: .LBB9_7:
; CHECK-GI-NEXT: mov x1, x0
; CHECK-GI-NEXT: mov x2, x0
; CHECK-GI-NEXT: mov x3, x0
; CHECK-GI-NEXT: ret
%result = call i256 @llvm.fptoui.sat(float %val)
ret i256 %result
}
define i256 @f64_to_s256_sat(double %val) {
; CHECK-SD-LABEL: f64_to_s256_sat:
; CHECK-SD: // %bb.0: // %fp-to-i-entry
; CHECK-SD-NEXT: fmov x9, d0
; CHECK-SD-NEXT: mov x0, xzr
; CHECK-SD-NEXT: ubfx x10, x9, #52, #11
; CHECK-SD-NEXT: cmp x10, #1023
; CHECK-SD-NEXT: b.lo .LBB10_4
; CHECK-SD-NEXT: // %bb.1: // %fp-to-i-entry
; CHECK-SD-NEXT: fcmp d0, d0
; CHECK-SD-NEXT: mov x1, x0
; CHECK-SD-NEXT: mov x2, x0
; CHECK-SD-NEXT: mov x3, x0
; CHECK-SD-NEXT: b.vs .LBB10_8
; CHECK-SD-NEXT: // %bb.2: // %fp-to-i-if-check.saturate
; CHECK-SD-NEXT: asr x8, x9, #63
; CHECK-SD-NEXT: cmp x10, #1278
; CHECK-SD-NEXT: b.lo .LBB10_5
; CHECK-SD-NEXT: // %bb.3: // %fp-to-i-if-saturate
; CHECK-SD-NEXT: mvn x0, x8
; CHECK-SD-NEXT: eor x3, x8, #0x7fffffffffffffff
; CHECK-SD-NEXT: mov x1, x0
; CHECK-SD-NEXT: mov x2, x0
; CHECK-SD-NEXT: ret
; CHECK-SD-NEXT: .LBB10_4:
; CHECK-SD-NEXT: mov x1, x0
; CHECK-SD-NEXT: mov x2, x0
; CHECK-SD-NEXT: mov x3, x0
; CHECK-SD-NEXT: ret
; CHECK-SD-NEXT: .LBB10_5: // %fp-to-i-if-check.exp.size
; CHECK-SD-NEXT: mov x11, #4503599627370496 // =0x10000000000000
; CHECK-SD-NEXT: cmp x10, #1074
; CHECK-SD-NEXT: bfxil x11, x9, #0, #52
; CHECK-SD-NEXT: orr x9, x8, #0x1
; CHECK-SD-NEXT: b.hi .LBB10_7
; CHECK-SD-NEXT: // %bb.6: // %fp-to-i-if-exp.small
; CHECK-SD-NEXT: mov w12, #1075 // =0x433
; CHECK-SD-NEXT: sub x10, x12, x10
; CHECK-SD-NEXT: lsr x10, x11, x10
; CHECK-SD-NEXT: umulh x13, x10, x9
; CHECK-SD-NEXT: mul x14, x10, x8
; CHECK-SD-NEXT: mul x11, x8, x10
; CHECK-SD-NEXT: umulh x12, x8, x10
; CHECK-SD-NEXT: adds x1, x14, x13
; CHECK-SD-NEXT: umulh x8, x10, x8
; CHECK-SD-NEXT: mul x0, x10, x9
; CHECK-SD-NEXT: adcs x2, x11, x8
; CHECK-SD-NEXT: adc x3, x12, x11
; CHECK-SD-NEXT: ret
; CHECK-SD-NEXT: .LBB10_7: // %fp-to-i-if-exp.large
; CHECK-SD-NEXT: sub sp, sp, #64
; CHECK-SD-NEXT: .cfi_def_cfa_offset 64
; CHECK-SD-NEXT: movi v0.2d, #0000000000000000
; CHECK-SD-NEXT: sub x10, x10, #1075
; CHECK-SD-NEXT: str x11, [sp, #32]
; CHECK-SD-NEXT: lsr x11, x10, #3
; CHECK-SD-NEXT: mov x12, sp
; CHECK-SD-NEXT: str xzr, [sp, #56]
; CHECK-SD-NEXT: add x12, x12, #32
; CHECK-SD-NEXT: and x16, x10, #0x3f
; CHECK-SD-NEXT: mvn w2, w10
; CHECK-SD-NEXT: and x11, x11, #0x18
; CHECK-SD-NEXT: eor x16, x16, #0x3f
; CHECK-SD-NEXT: stur q0, [sp, #40]
; CHECK-SD-NEXT: sub x11, x12, x11
; CHECK-SD-NEXT: stp q0, q0, [sp]
; CHECK-SD-NEXT: ldp x12, x15, [x11]
; CHECK-SD-NEXT: ldp x1, x11, [x11, #16]
; CHECK-SD-NEXT: lsl x18, x15, x10
; CHECK-SD-NEXT: lsr x15, x15, #1
; CHECK-SD-NEXT: lsl x13, x12, x10
; CHECK-SD-NEXT: lsr x12, x12, #1
; CHECK-SD-NEXT: lsl x4, x1, x10
; CHECK-SD-NEXT: lsr x1, x1, #1
; CHECK-SD-NEXT: lsr x15, x15, x2
; CHECK-SD-NEXT: lsl x10, x11, x10
; CHECK-SD-NEXT: umulh x14, x13, x9
; CHECK-SD-NEXT: lsr x12, x12, x16
; CHECK-SD-NEXT: lsr x11, x1, x16
; CHECK-SD-NEXT: orr x15, x4, x15
; CHECK-SD-NEXT: mul x0, x13, x8
; CHECK-SD-NEXT: orr x12, x18, x12
; CHECK-SD-NEXT: orr x10, x10, x11
; CHECK-SD-NEXT: umulh x4, x9, x15
; CHECK-SD-NEXT: mul x3, x12, x9
; CHECK-SD-NEXT: umulh x11, x8, x13
; CHECK-SD-NEXT: umulh x18, x12, x9
; CHECK-SD-NEXT: adds x14, x3, x14
; CHECK-SD-NEXT: umulh x17, x13, x8
; CHECK-SD-NEXT: madd x10, x9, x10, x4
; CHECK-SD-NEXT: cinc x18, x18, hs
; CHECK-SD-NEXT: adds x1, x0, x14
; CHECK-SD-NEXT: madd x11, x8, x12, x11
; CHECK-SD-NEXT: mul x16, x12, x8
; CHECK-SD-NEXT: umulh x2, x12, x8
; CHECK-SD-NEXT: madd x10, x8, x15, x10
; CHECK-SD-NEXT: mul x12, x9, x15
; CHECK-SD-NEXT: mul x15, x8, x13
; CHECK-SD-NEXT: madd x8, x8, x13, x11
; CHECK-SD-NEXT: cinc x11, x17, hs
; CHECK-SD-NEXT: adds x11, x18, x11
; CHECK-SD-NEXT: mul x0, x13, x9
; CHECK-SD-NEXT: cset w9, hs
; CHECK-SD-NEXT: adds x11, x16, x11
; CHECK-SD-NEXT: adc x9, x2, x9
; CHECK-SD-NEXT: adds x12, x15, x12
; CHECK-SD-NEXT: adc x8, x8, x10
; CHECK-SD-NEXT: adds x2, x11, x12
; CHECK-SD-NEXT: adc x3, x9, x8
; CHECK-SD-NEXT: add sp, sp, #64
; CHECK-SD-NEXT: .LBB10_8: // %fp-to-i-cleanup
; CHECK-SD-NEXT: ret
;
; CHECK-GI-LABEL: f64_to_s256_sat:
; CHECK-GI: // %bb.0: // %fp-to-i-entry
; CHECK-GI-NEXT: fmov x8, d0
; CHECK-GI-NEXT: ubfx x11, x8, #52, #11
; CHECK-GI-NEXT: cmp x8, #0
; CHECK-GI-NEXT: cset w9, mi
; CHECK-GI-NEXT: cmp x11, #1023
; CHECK-GI-NEXT: b.lo .LBB10_4
; CHECK-GI-NEXT: // %bb.1: // %fp-to-i-entry
; CHECK-GI-NEXT: fcmp d0, d0
; CHECK-GI-NEXT: b.vs .LBB10_4
; CHECK-GI-NEXT: // %bb.2: // %fp-to-i-if-check.saturate
; CHECK-GI-NEXT: cmp x11, #1278
; CHECK-GI-NEXT: b.lo .LBB10_5
; CHECK-GI-NEXT: // %bb.3: // %fp-to-i-if-saturate
; CHECK-GI-NEXT: cmp x8, #0
; CHECK-GI-NEXT: mov w9, wzr
; CHECK-GI-NEXT: cset w8, pl
; CHECK-GI-NEXT: cmp w9, #1
; CHECK-GI-NEXT: mov x9, #-9223372036854775808 // =0x8000000000000000
; CHECK-GI-NEXT: sbfx x0, x8, #0, #1
; CHECK-GI-NEXT: asr x8, x0, #63
; CHECK-GI-NEXT: adcs x1, x8, xzr
; CHECK-GI-NEXT: adcs x2, x8, xzr
; CHECK-GI-NEXT: adc x3, x8, x9
; CHECK-GI-NEXT: ret
; CHECK-GI-NEXT: .LBB10_4:
; CHECK-GI-NEXT: mov x0, xzr
; CHECK-GI-NEXT: mov x1, xzr
; CHECK-GI-NEXT: mov x2, xzr
; CHECK-GI-NEXT: mov x3, xzr
; CHECK-GI-NEXT: ret
; CHECK-GI-NEXT: .LBB10_5: // %fp-to-i-if-check.exp.size
; CHECK-GI-NEXT: sbfx x10, x9, #0, #1
; CHECK-GI-NEXT: and x12, x8, #0xfffffffffffff
; CHECK-GI-NEXT: cmp x11, #1075
; CHECK-GI-NEXT: asr x9, x10, #63
; CHECK-GI-NEXT: orr x8, x10, #0x1
; CHECK-GI-NEXT: orr x10, x12, #0x10000000000000
; CHECK-GI-NEXT: b.hs .LBB10_7
; CHECK-GI-NEXT: // %bb.6: // %fp-to-i-if-exp.small
; CHECK-GI-NEXT: mov w12, #1075 // =0x433
; CHECK-GI-NEXT: umulh x13, x8, xzr
; CHECK-GI-NEXT: and x15, xzr, #0x1
; CHECK-GI-NEXT: sub x11, x12, x11
; CHECK-GI-NEXT: lsr x10, x10, x11
; CHECK-GI-NEXT: mul x11, x10, x9
; CHECK-GI-NEXT: umulh x12, x10, x8
; CHECK-GI-NEXT: umulh x14, x10, x9
; CHECK-GI-NEXT: madd x13, x10, x9, x13
; CHECK-GI-NEXT: adds x1, x11, x12
; CHECK-GI-NEXT: and x12, xzr, #0x1
; CHECK-GI-NEXT: cset w11, hs
; CHECK-GI-NEXT: umulh x9, x9, xzr
; CHECK-GI-NEXT: and x11, x11, #0x1
; CHECK-GI-NEXT: add x11, x12, x11
; CHECK-GI-NEXT: and x12, xzr, #0x1
; CHECK-GI-NEXT: mul x0, x10, x8
; CHECK-GI-NEXT: add x12, x15, x12
; CHECK-GI-NEXT: adds x15, x13, x14
; CHECK-GI-NEXT: and x10, xzr, #0x1
; CHECK-GI-NEXT: cset w8, hs
; CHECK-GI-NEXT: adds x2, x15, x11
; CHECK-GI-NEXT: add x10, x12, x10
; CHECK-GI-NEXT: and x8, x8, #0x1
; CHECK-GI-NEXT: cset w11, hs
; CHECK-GI-NEXT: add x9, x9, x14
; CHECK-GI-NEXT: add x8, x10, x8
; CHECK-GI-NEXT: and x10, x11, #0x1
; CHECK-GI-NEXT: add x9, x13, x9
; CHECK-GI-NEXT: add x8, x8, x10
; CHECK-GI-NEXT: add x3, x9, x8
; CHECK-GI-NEXT: ret
; CHECK-GI-NEXT: .LBB10_7: // %fp-to-i-if-exp.large
; CHECK-GI-NEXT: sub x12, x11, #1075
; CHECK-GI-NEXT: mov w13, #64 // =0x40
; CHECK-GI-NEXT: mov w11, #128 // =0x80
; CHECK-GI-NEXT: sub x14, x12, #64
; CHECK-GI-NEXT: sub x15, x13, x12
; CHECK-GI-NEXT: lsl x16, x10, x12
; CHECK-GI-NEXT: lsr x15, x10, x15
; CHECK-GI-NEXT: lsl x14, x10, x14
; CHECK-GI-NEXT: sub x11, x11, x12
; CHECK-GI-NEXT: cmp x12, #64
; CHECK-GI-NEXT: sub x17, x12, #128
; CHECK-GI-NEXT: lsr x18, x10, x11
; CHECK-GI-NEXT: csel x16, x16, xzr, lo
; CHECK-GI-NEXT: csel x14, x15, x14, lo
; CHECK-GI-NEXT: cmp x12, #0
; CHECK-GI-NEXT: sub x15, x17, #64
; CHECK-GI-NEXT: csel x14, xzr, x14, eq
; CHECK-GI-NEXT: cmp x11, #64
; CHECK-GI-NEXT: sub x13, x13, x17
; CHECK-GI-NEXT: csel x18, x18, xzr, lo
; CHECK-GI-NEXT: cmp x11, #0
; CHECK-GI-NEXT: lsl x11, x10, x17
; CHECK-GI-NEXT: lsr x13, x10, x13
; CHECK-GI-NEXT: lsl x15, x10, x15
; CHECK-GI-NEXT: csel x18, x10, x18, eq
; CHECK-GI-NEXT: cmp x17, #64
; CHECK-GI-NEXT: csel x0, x11, xzr, lo
; CHECK-GI-NEXT: csel x10, x13, x15, lo
; CHECK-GI-NEXT: cmp x17, #0
; CHECK-GI-NEXT: csel x13, xzr, x10, eq
; CHECK-GI-NEXT: cmp x12, #128
; CHECK-GI-NEXT: csel x11, x14, xzr, lo
; CHECK-GI-NEXT: csel x10, x16, xzr, lo
; CHECK-GI-NEXT: csel x16, x18, x0, lo
; CHECK-GI-NEXT: mul x14, x11, x8
; CHECK-GI-NEXT: csel x13, xzr, x13, lo
; CHECK-GI-NEXT: cmp x12, #0
; CHECK-GI-NEXT: csel x16, xzr, x16, eq
; CHECK-GI-NEXT: csel x13, xzr, x13, eq
; CHECK-GI-NEXT: mul x15, x10, x9
; CHECK-GI-NEXT: umulh x12, x10, x8
; CHECK-GI-NEXT: mul x17, x16, x8
; CHECK-GI-NEXT: adds x14, x14, x15
; CHECK-GI-NEXT: mul x18, x11, x9
; CHECK-GI-NEXT: cset w2, hs
; CHECK-GI-NEXT: mul x1, x16, x9
; CHECK-GI-NEXT: umulh x0, x11, x8
; CHECK-GI-NEXT: madd x13, x13, x8, x1
; CHECK-GI-NEXT: adds x1, x14, x12
; CHECK-GI-NEXT: and x14, x2, #0x1
; CHECK-GI-NEXT: umulh x3, x10, x9
; CHECK-GI-NEXT: umulh x12, x16, x8
; CHECK-GI-NEXT: cset w16, hs
; CHECK-GI-NEXT: adds x17, x17, x18
; CHECK-GI-NEXT: cset w18, hs
; CHECK-GI-NEXT: adds x15, x17, x15
; CHECK-GI-NEXT: and x16, x16, #0x1
; CHECK-GI-NEXT: and x17, x18, #0x1
; CHECK-GI-NEXT: cset w18, hs
; CHECK-GI-NEXT: madd x13, x11, x9, x13
; CHECK-GI-NEXT: adds x15, x15, x0
; CHECK-GI-NEXT: and x18, x18, #0x1
; CHECK-GI-NEXT: add x14, x14, x16
; CHECK-GI-NEXT: umulh x11, x11, x9
; CHECK-GI-NEXT: add x16, x17, x18
; CHECK-GI-NEXT: cset w17, hs
; CHECK-GI-NEXT: and x17, x17, #0x1
; CHECK-GI-NEXT: adds x15, x15, x3
; CHECK-GI-NEXT: madd x9, x10, x9, x13
; CHECK-GI-NEXT: add x13, x16, x17
; CHECK-GI-NEXT: cset w16, hs
; CHECK-GI-NEXT: adds x2, x15, x14
; CHECK-GI-NEXT: and x14, x16, #0x1
; CHECK-GI-NEXT: cset w15, hs
; CHECK-GI-NEXT: mul x0, x10, x8
; CHECK-GI-NEXT: add x8, x13, x14
; CHECK-GI-NEXT: and x10, x15, #0x1
; CHECK-GI-NEXT: add x11, x12, x11
; CHECK-GI-NEXT: add x8, x8, x10
; CHECK-GI-NEXT: add x10, x11, x3
; CHECK-GI-NEXT: add x8, x10, x8
; CHECK-GI-NEXT: add x3, x9, x8
; CHECK-GI-NEXT: ret
%result = call i256 @llvm.fptosi.sat(double %val)
ret i256 %result
}
define i256 @f64_to_u256_sat(double %val) {
; CHECK-SD-LABEL: f64_to_u256_sat:
; CHECK-SD: // %bb.0: // %fp-to-i-entry
; CHECK-SD-NEXT: fmov x9, d0
; CHECK-SD-NEXT: mov x0, xzr
; CHECK-SD-NEXT: ubfx x8, x9, #52, #11
; CHECK-SD-NEXT: cmp x8, #1023
; CHECK-SD-NEXT: b.lo .LBB11_7
; CHECK-SD-NEXT: // %bb.1: // %fp-to-i-entry
; CHECK-SD-NEXT: fcmp d0, d0
; CHECK-SD-NEXT: b.vs .LBB11_7
; CHECK-SD-NEXT: // %bb.2: // %fp-to-i-entry
; CHECK-SD-NEXT: mov x1, x0
; CHECK-SD-NEXT: mov x2, x0
; CHECK-SD-NEXT: mov x3, x0
; CHECK-SD-NEXT: tbnz x9, #63, .LBB11_9
; CHECK-SD-NEXT: // %bb.3: // %fp-to-i-if-check.saturate
; CHECK-SD-NEXT: cmp x8, #1278
; CHECK-SD-NEXT: b.ls .LBB11_5
; CHECK-SD-NEXT: // %bb.4:
; CHECK-SD-NEXT: mov x0, #-1 // =0xffffffffffffffff
; CHECK-SD-NEXT: mov x1, #-1 // =0xffffffffffffffff
; CHECK-SD-NEXT: mov x2, #-1 // =0xffffffffffffffff
; CHECK-SD-NEXT: mov x3, #-1 // =0xffffffffffffffff
; CHECK-SD-NEXT: ret
; CHECK-SD-NEXT: .LBB11_5: // %fp-to-i-if-check.exp.size
; CHECK-SD-NEXT: mov x10, #4503599627370496 // =0x10000000000000
; CHECK-SD-NEXT: cmp x8, #1074
; CHECK-SD-NEXT: bfxil x10, x9, #0, #52
; CHECK-SD-NEXT: b.hi .LBB11_8
; CHECK-SD-NEXT: // %bb.6: // %fp-to-i-if-exp.small
; CHECK-SD-NEXT: mov w9, #1075 // =0x433
; CHECK-SD-NEXT: mov x1, xzr
; CHECK-SD-NEXT: mov x2, xzr
; CHECK-SD-NEXT: sub x8, x9, x8
; CHECK-SD-NEXT: mov x3, xzr
; CHECK-SD-NEXT: lsr x0, x10, x8
; CHECK-SD-NEXT: ret
; CHECK-SD-NEXT: .LBB11_7:
; CHECK-SD-NEXT: mov x1, x0
; CHECK-SD-NEXT: mov x2, x0
; CHECK-SD-NEXT: mov x3, x0
; CHECK-SD-NEXT: ret
; CHECK-SD-NEXT: .LBB11_8: // %fp-to-i-if-exp.large
; CHECK-SD-NEXT: sub sp, sp, #64
; CHECK-SD-NEXT: .cfi_def_cfa_offset 64
; CHECK-SD-NEXT: movi v0.2d, #0000000000000000
; CHECK-SD-NEXT: sub x8, x8, #1075
; CHECK-SD-NEXT: str x10, [sp, #32]
; CHECK-SD-NEXT: lsr x9, x8, #3
; CHECK-SD-NEXT: mov x10, sp
; CHECK-SD-NEXT: str xzr, [sp, #56]
; CHECK-SD-NEXT: add x10, x10, #32
; CHECK-SD-NEXT: and x13, x8, #0x3f
; CHECK-SD-NEXT: mvn w17, w8
; CHECK-SD-NEXT: and x9, x9, #0x18
; CHECK-SD-NEXT: eor x13, x13, #0x3f
; CHECK-SD-NEXT: stur q0, [sp, #40]
; CHECK-SD-NEXT: sub x9, x10, x9
; CHECK-SD-NEXT: stp q0, q0, [sp]
; CHECK-SD-NEXT: ldp x11, x10, [x9, #8]
; CHECK-SD-NEXT: ldr x12, [x9]
; CHECK-SD-NEXT: ldr x9, [x9, #24]
; CHECK-SD-NEXT: lsr x16, x12, #1
; CHECK-SD-NEXT: lsl x0, x12, x8
; CHECK-SD-NEXT: lsr x14, x10, #1
; CHECK-SD-NEXT: lsr x15, x11, #1
; CHECK-SD-NEXT: lsl x9, x9, x8
; CHECK-SD-NEXT: lsl x10, x10, x8
; CHECK-SD-NEXT: lsl x11, x11, x8
; CHECK-SD-NEXT: lsr x15, x15, x17
; CHECK-SD-NEXT: lsr x14, x14, x13
; CHECK-SD-NEXT: lsr x13, x16, x13
; CHECK-SD-NEXT: orr x3, x9, x14
; CHECK-SD-NEXT: orr x2, x10, x15
; CHECK-SD-NEXT: orr x1, x11, x13
; CHECK-SD-NEXT: add sp, sp, #64
; CHECK-SD-NEXT: .LBB11_9: // %fp-to-i-cleanup
; CHECK-SD-NEXT: ret
;
; CHECK-GI-LABEL: f64_to_u256_sat:
; CHECK-GI: // %bb.0: // %fp-to-i-entry
; CHECK-GI-NEXT: fmov x8, d0
; CHECK-GI-NEXT: mov x0, xzr
; CHECK-GI-NEXT: ubfx x9, x8, #52, #11
; CHECK-GI-NEXT: cmp x9, #1023
; CHECK-GI-NEXT: b.lo .LBB11_6
; CHECK-GI-NEXT: // %bb.1: // %fp-to-i-entry
; CHECK-GI-NEXT: fcmp d0, d0
; CHECK-GI-NEXT: b.vs .LBB11_6
; CHECK-GI-NEXT: // %bb.2: // %fp-to-i-entry
; CHECK-GI-NEXT: mov x1, x0
; CHECK-GI-NEXT: mov x2, x0
; CHECK-GI-NEXT: mov x3, x0
; CHECK-GI-NEXT: tbnz x8, #63, .LBB11_8
; CHECK-GI-NEXT: // %bb.3: // %fp-to-i-if-check.saturate
; CHECK-GI-NEXT: mov x0, #-1 // =0xffffffffffffffff
; CHECK-GI-NEXT: cmp x9, #1279
; CHECK-GI-NEXT: mov x1, #-1 // =0xffffffffffffffff
; CHECK-GI-NEXT: mov x2, #-1 // =0xffffffffffffffff
; CHECK-GI-NEXT: mov x3, #-1 // =0xffffffffffffffff
; CHECK-GI-NEXT: b.hs .LBB11_8
; CHECK-GI-NEXT: // %bb.4: // %fp-to-i-if-check.exp.size
; CHECK-GI-NEXT: and x8, x8, #0xfffffffffffff
; CHECK-GI-NEXT: cmp x9, #1075
; CHECK-GI-NEXT: orr x8, x8, #0x10000000000000
; CHECK-GI-NEXT: b.hs .LBB11_7
; CHECK-GI-NEXT: // %bb.5: // %fp-to-i-if-exp.small
; CHECK-GI-NEXT: mov w10, #1075 // =0x433
; CHECK-GI-NEXT: mov x1, xzr
; CHECK-GI-NEXT: mov x2, xzr
; CHECK-GI-NEXT: sub x9, x10, x9
; CHECK-GI-NEXT: mov x3, xzr
; CHECK-GI-NEXT: lsr x0, x8, x9
; CHECK-GI-NEXT: ret
; CHECK-GI-NEXT: .LBB11_6:
; CHECK-GI-NEXT: mov x1, x0
; CHECK-GI-NEXT: mov x2, x0
; CHECK-GI-NEXT: mov x3, x0
; CHECK-GI-NEXT: ret
; CHECK-GI-NEXT: .LBB11_7: // %fp-to-i-if-exp.large
; CHECK-GI-NEXT: sub x9, x9, #1075
; CHECK-GI-NEXT: mov w11, #64 // =0x40
; CHECK-GI-NEXT: mov w10, #128 // =0x80
; CHECK-GI-NEXT: sub x12, x9, #64
; CHECK-GI-NEXT: sub x13, x11, x9
; CHECK-GI-NEXT: lsl x14, x8, x9
; CHECK-GI-NEXT: lsr x13, x8, x13
; CHECK-GI-NEXT: lsl x12, x8, x12
; CHECK-GI-NEXT: sub x10, x10, x9
; CHECK-GI-NEXT: cmp x9, #64
; CHECK-GI-NEXT: sub x15, x9, #128
; CHECK-GI-NEXT: lsr x16, x8, x10
; CHECK-GI-NEXT: csel x14, x14, xzr, lo
; CHECK-GI-NEXT: csel x12, x13, x12, lo
; CHECK-GI-NEXT: cmp x9, #0
; CHECK-GI-NEXT: sub x13, x15, #64
; CHECK-GI-NEXT: csel x12, xzr, x12, eq
; CHECK-GI-NEXT: cmp x10, #64
; CHECK-GI-NEXT: sub x11, x11, x15
; CHECK-GI-NEXT: csel x16, x16, xzr, lo
; CHECK-GI-NEXT: cmp x10, #0
; CHECK-GI-NEXT: lsl x10, x8, x15
; CHECK-GI-NEXT: lsr x11, x8, x11
; CHECK-GI-NEXT: lsl x13, x8, x13
; CHECK-GI-NEXT: csel x8, x8, x16, eq
; CHECK-GI-NEXT: cmp x15, #64
; CHECK-GI-NEXT: csel x10, x10, xzr, lo
; CHECK-GI-NEXT: csel x11, x11, x13, lo
; CHECK-GI-NEXT: cmp x15, #0
; CHECK-GI-NEXT: csel x11, xzr, x11, eq
; CHECK-GI-NEXT: cmp x9, #128
; CHECK-GI-NEXT: csel x0, x14, xzr, lo
; CHECK-GI-NEXT: csel x1, x12, xzr, lo
; CHECK-GI-NEXT: csel x8, x8, x10, lo
; CHECK-GI-NEXT: csel x10, xzr, x11, lo
; CHECK-GI-NEXT: cmp x9, #0
; CHECK-GI-NEXT: csel x2, xzr, x8, eq
; CHECK-GI-NEXT: csel x3, xzr, x10, eq
; CHECK-GI-NEXT: .LBB11_8: // %fp-to-i-cleanup
; CHECK-GI-NEXT: ret
%result = call i256 @llvm.fptoui.sat(double %val)
ret i256 %result
}