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llvm/llvm-project.git/refs/heads/main/./llvm/test/CodeGen/AArch64/early-ifcvt-load-to-cond-br.mir
blob: 79d0fdcf5c5bb8a7acadf9e7e2fcde832115c966 [file] [edit]
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
# RUN: llc -mtriple=aarch64 -mcpu=apple-m1 -run-pass=early-ifcvt -verify-machine-dom-info -o - %s | FileCheck %s --check-prefixes=CHECK-COMMON,CHECK-DEFAULT
# RUN: llc -mtriple=aarch64 -mcpu=apple-m1 -run-pass=early-ifcvt -enable-early-ifcvt-data-dependent -verify-machine-dom-info -o - %s | FileCheck %s --check-prefixes=CHECK-COMMON,CHECK-DATA-DEPENDENT
---
name: arg_to_cond_branch
alignment: 4
tracksRegLiveness: true
body: |
; CHECK-COMMON-LABEL: name: arg_to_cond_branch
; CHECK-COMMON: bb.0:
; CHECK-COMMON-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
; CHECK-COMMON-NEXT: liveins: $w0, $w1, $w2
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[COPY:%[0-9]+]]:gpr32common = COPY $w0
; CHECK-COMMON-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
; CHECK-COMMON-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $w2
; CHECK-COMMON-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[COPY]], 100, 0, implicit-def $nzcv
; CHECK-COMMON-NEXT: Bcc 12, %bb.2, implicit $nzcv
; CHECK-COMMON-NEXT: B %bb.1
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.1:
; CHECK-COMMON-NEXT: successors: %bb.2(0x80000000)
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[MADDWrrr:%[0-9]+]]:gpr32 = MADDWrrr [[COPY1]], [[COPY2]], $wzr
; CHECK-COMMON-NEXT: [[MADDWrrr1:%[0-9]+]]:gpr32 = MADDWrrr [[MADDWrrr]], [[COPY1]], $wzr
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.2:
; CHECK-COMMON-NEXT: [[PHI:%[0-9]+]]:gpr32 = PHI [[COPY1]], %bb.0, [[MADDWrrr1]], %bb.1
; CHECK-COMMON-NEXT: $w0 = COPY [[PHI]]
; CHECK-COMMON-NEXT: RET_ReallyLR implicit $w0
bb.1:
successors: %bb.2(0x40000000), %bb.3(0x40000000)
liveins: $w0, $w1, $w2
%0:gpr32common = COPY $w0
%1:gpr32 = COPY $w1
%2:gpr32 = COPY $w2
%3:gpr32 = SUBSWri %0, 100, 0, implicit-def $nzcv
Bcc 12, %bb.3, implicit $nzcv
B %bb.2
bb.2:
successors: %bb.3(0x80000000)
%4:gpr32 = MADDWrrr %1, %2, $wzr
%5:gpr32 = MADDWrrr %4, %1, $wzr
bb.3:
%6:gpr32 = PHI %1, %bb.1, %5, %bb.2
$w0 = COPY %6
RET_ReallyLR implicit $w0
...
---
name: load_from_constant_pool_to_cond_branch
alignment: 4
tracksRegLiveness: true
constants:
- id: 0
value: i32 100
alignment: 4
body: |
; CHECK-COMMON-LABEL: name: load_from_constant_pool_to_cond_branch
; CHECK-COMMON: bb.0:
; CHECK-COMMON-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
; CHECK-COMMON-NEXT: liveins: $w0, $w1, $w2
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
; CHECK-COMMON-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
; CHECK-COMMON-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $w2
; CHECK-COMMON-NEXT: renamable $x8 = ADRP target-flags(aarch64-page) %const.0
; CHECK-COMMON-NEXT: [[LDRWui:%[0-9]+]]:gpr32common = LDRWui killed renamable $x8, target-flags(aarch64-pageoff, aarch64-nc) %const.0 :: (load (s32) from constant-pool)
; CHECK-COMMON-NEXT: [[SUBSWrr:%[0-9]+]]:gpr32 = SUBSWrr [[COPY]], [[LDRWui]], implicit-def $nzcv
; CHECK-COMMON-NEXT: Bcc 12, %bb.2, implicit $nzcv
; CHECK-COMMON-NEXT: B %bb.1
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.1:
; CHECK-COMMON-NEXT: successors: %bb.2(0x80000000)
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[MADDWrrr:%[0-9]+]]:gpr32 = MADDWrrr [[COPY1]], [[COPY2]], $wzr
; CHECK-COMMON-NEXT: [[MADDWrrr1:%[0-9]+]]:gpr32 = MADDWrrr [[MADDWrrr]], [[COPY1]], $wzr
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.2:
; CHECK-COMMON-NEXT: [[PHI:%[0-9]+]]:gpr32 = PHI [[COPY1]], %bb.0, [[MADDWrrr1]], %bb.1
; CHECK-COMMON-NEXT: $w0 = COPY [[PHI]]
; CHECK-COMMON-NEXT: RET_ReallyLR implicit $w0
bb.0:
successors: %bb.1(0x40000000), %bb.2(0x40000000)
liveins: $w0, $w1, $w2
%0:gpr32 = COPY $w0
%1:gpr32 = COPY $w1
%2:gpr32 = COPY $w2
renamable $x8 = ADRP target-flags(aarch64-page) %const.0
%3:gpr32common = LDRWui killed renamable $x8, target-flags(aarch64-pageoff, aarch64-nc) %const.0 :: (load (s32) from constant-pool)
%4:gpr32 = SUBSWrr %0, %3, implicit-def $nzcv
Bcc 12, %bb.2, implicit $nzcv
B %bb.1
bb.1:
successors: %bb.2(0x80000000)
%5:gpr32 = MADDWrrr %1, %2, $wzr
%6:gpr32 = MADDWrrr %5, %1, $wzr
bb.2:
%7:gpr32 = PHI %1, %bb.0, %6, %bb.1
$w0 = COPY %7
RET_ReallyLR implicit $w0
...
---
name: load_from_constant_pool_to_cond_branch_with_cbz
alignment: 4
tracksRegLiveness: true
constants:
- id: 0
value: i32 100
alignment: 4
body: |
; CHECK-COMMON-LABEL: name: load_from_constant_pool_to_cond_branch_with_cbz
; CHECK-COMMON: bb.0:
; CHECK-COMMON-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
; CHECK-COMMON-NEXT: liveins: $w0, $w1
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
; CHECK-COMMON-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
; CHECK-COMMON-NEXT: renamable $x8 = ADRP target-flags(aarch64-page) %const.0
; CHECK-COMMON-NEXT: [[LDRWui:%[0-9]+]]:gpr32common = LDRWui killed renamable $x8, target-flags(aarch64-pageoff, aarch64-nc) %const.0 :: (load (s32) from constant-pool)
; CHECK-COMMON-NEXT: CBZW [[LDRWui]], %bb.2
; CHECK-COMMON-NEXT: B %bb.1
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.1:
; CHECK-COMMON-NEXT: successors: %bb.2(0x80000000)
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[MADDWrrr:%[0-9]+]]:gpr32 = MADDWrrr [[COPY]], [[COPY1]], $wzr
; CHECK-COMMON-NEXT: [[MADDWrrr1:%[0-9]+]]:gpr32 = MADDWrrr [[MADDWrrr]], [[COPY]], $wzr
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.2:
; CHECK-COMMON-NEXT: [[PHI:%[0-9]+]]:gpr32 = PHI [[COPY]], %bb.0, [[MADDWrrr1]], %bb.1
; CHECK-COMMON-NEXT: $w0 = COPY [[PHI]]
; CHECK-COMMON-NEXT: RET_ReallyLR implicit $w0
bb.0:
successors: %bb.1(0x40000000), %bb.2(0x40000000)
liveins: $w0, $w1
%0:gpr32 = COPY $w0
%1:gpr32 = COPY $w1
renamable $x8 = ADRP target-flags(aarch64-page) %const.0
%2:gpr32common = LDRWui killed renamable $x8, target-flags(aarch64-pageoff, aarch64-nc) %const.0 :: (load (s32) from constant-pool)
CBZW %2, %bb.2
B %bb.1
bb.1:
successors: %bb.2(0x80000000)
%3:gpr32 = MADDWrrr %0, %1, $wzr
%4:gpr32 = MADDWrrr %3, %0, $wzr
bb.2:
%5:gpr32 = PHI %0, %bb.0, %4, %bb.1
$w0 = COPY %5
RET_ReallyLR implicit $w0
...
---
name: load_to_cond_branch
alignment: 4
tracksRegLiveness: true
body: |
; CHECK-DEFAULT-LABEL: name: load_to_cond_branch
; CHECK-DEFAULT: bb.0:
; CHECK-DEFAULT-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
; CHECK-DEFAULT-NEXT: liveins: $x0, $w1, $w2
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: [[COPY:%[0-9]+]]:gpr64common = COPY $x0
; CHECK-DEFAULT-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
; CHECK-DEFAULT-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $w2
; CHECK-DEFAULT-NEXT: [[LDRWui:%[0-9]+]]:gpr32common = LDRWui [[COPY]], 0 :: (load (s32))
; CHECK-DEFAULT-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[LDRWui]], 100, 0, implicit-def $nzcv
; CHECK-DEFAULT-NEXT: Bcc 12, %bb.2, implicit $nzcv
; CHECK-DEFAULT-NEXT: B %bb.1
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: bb.1:
; CHECK-DEFAULT-NEXT: successors: %bb.2(0x80000000)
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: [[MADDWrrr:%[0-9]+]]:gpr32 = MADDWrrr [[COPY1]], [[COPY2]], $wzr
; CHECK-DEFAULT-NEXT: [[MADDWrrr1:%[0-9]+]]:gpr32 = MADDWrrr [[MADDWrrr]], [[COPY1]], $wzr
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: bb.2:
; CHECK-DEFAULT-NEXT: [[PHI:%[0-9]+]]:gpr32 = PHI [[COPY1]], %bb.0, [[MADDWrrr1]], %bb.1
; CHECK-DEFAULT-NEXT: $w0 = COPY [[PHI]]
; CHECK-DEFAULT-NEXT: RET_ReallyLR implicit $w0
;
; CHECK-DATA-DEPENDENT-LABEL: name: load_to_cond_branch
; CHECK-DATA-DEPENDENT: bb.0:
; CHECK-DATA-DEPENDENT-NEXT: liveins: $x0, $w1, $w2
; CHECK-DATA-DEPENDENT-NEXT: {{ $}}
; CHECK-DATA-DEPENDENT-NEXT: [[COPY:%[0-9]+]]:gpr64common = COPY $x0
; CHECK-DATA-DEPENDENT-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
; CHECK-DATA-DEPENDENT-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $w2
; CHECK-DATA-DEPENDENT-NEXT: [[LDRWui:%[0-9]+]]:gpr32common = LDRWui [[COPY]], 0 :: (load (s32))
; CHECK-DATA-DEPENDENT-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[LDRWui]], 100, 0, implicit-def $nzcv
; CHECK-DATA-DEPENDENT-NEXT: [[MADDWrrr:%[0-9]+]]:gpr32 = MADDWrrr [[COPY1]], [[COPY2]], $wzr
; CHECK-DATA-DEPENDENT-NEXT: [[MADDWrrr1:%[0-9]+]]:gpr32 = MADDWrrr [[MADDWrrr]], [[COPY1]], $wzr
; CHECK-DATA-DEPENDENT-NEXT: [[CSELWr:%[0-9]+]]:gpr32 = CSELWr [[COPY1]], [[MADDWrrr1]], 12, implicit $nzcv
; CHECK-DATA-DEPENDENT-NEXT: $w0 = COPY [[CSELWr]]
; CHECK-DATA-DEPENDENT-NEXT: RET_ReallyLR implicit $w0
bb.1:
successors: %bb.2(0x40000000), %bb.3(0x40000000)
liveins: $x0, $w1, $w2
%0:gpr64common = COPY $x0
%1:gpr32 = COPY $w1
%2:gpr32 = COPY $w2
%3:gpr32common = LDRWui %0, 0 :: (load (s32))
%4:gpr32 = SUBSWri %3, 100, 0, implicit-def $nzcv
Bcc 12, %bb.3, implicit $nzcv
B %bb.2
bb.2:
successors: %bb.3(0x80000000)
%5:gpr32 = MADDWrrr %1, %2, $wzr
%6:gpr32 = MADDWrrr %5, %1, $wzr
bb.3:
%7:gpr32 = PHI %1, %bb.1, %6, %bb.2
$w0 = COPY %7
RET_ReallyLR implicit $w0
...
---
name: cbz_arg_to_cond_branch
alignment: 4
tracksRegLiveness: true
body: |
; CHECK-COMMON-LABEL: name: cbz_arg_to_cond_branch
; CHECK-COMMON: bb.0:
; CHECK-COMMON-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
; CHECK-COMMON-NEXT: liveins: $w0, $w1, $w2
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
; CHECK-COMMON-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
; CHECK-COMMON-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $w2
; CHECK-COMMON-NEXT: CBZW [[COPY]], %bb.2
; CHECK-COMMON-NEXT: B %bb.1
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.1:
; CHECK-COMMON-NEXT: successors: %bb.2(0x80000000)
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[MADDWrrr:%[0-9]+]]:gpr32 = MADDWrrr [[COPY1]], [[COPY2]], $wzr
; CHECK-COMMON-NEXT: [[MADDWrrr1:%[0-9]+]]:gpr32 = MADDWrrr [[MADDWrrr]], [[COPY1]], $wzr
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.2:
; CHECK-COMMON-NEXT: [[PHI:%[0-9]+]]:gpr32 = PHI [[COPY1]], %bb.0, [[MADDWrrr1]], %bb.1
; CHECK-COMMON-NEXT: $w0 = COPY [[PHI]]
; CHECK-COMMON-NEXT: RET_ReallyLR implicit $w0
bb.0:
successors: %bb.1(0x40000000), %bb.2(0x40000000)
liveins: $w0, $w1, $w2
%0:gpr32 = COPY $w0
%1:gpr32 = COPY $w1
%2:gpr32 = COPY $w2
CBZW %0, %bb.2
B %bb.1
bb.1:
successors: %bb.2(0x80000000)
%3:gpr32 = MADDWrrr %1, %2, $wzr
%4:gpr32 = MADDWrrr %3, %1, $wzr
bb.2:
%5:gpr32 = PHI %1, %bb.0, %4, %bb.1
$w0 = COPY %5
RET_ReallyLR implicit $w0
...
---
name: cbz_load_to_cond_branch
alignment: 4
tracksRegLiveness: true
body: |
; CHECK-DEFAULT-LABEL: name: cbz_load_to_cond_branch
; CHECK-DEFAULT: bb.0:
; CHECK-DEFAULT-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
; CHECK-DEFAULT-NEXT: liveins: $x0, $w1, $w2
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: [[COPY:%[0-9]+]]:gpr64common = COPY $x0
; CHECK-DEFAULT-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
; CHECK-DEFAULT-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $w2
; CHECK-DEFAULT-NEXT: [[LDRWui:%[0-9]+]]:gpr32 = LDRWui [[COPY]], 0 :: (load (s32))
; CHECK-DEFAULT-NEXT: CBZW [[LDRWui]], %bb.2
; CHECK-DEFAULT-NEXT: B %bb.1
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: bb.1:
; CHECK-DEFAULT-NEXT: successors: %bb.2(0x80000000)
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: [[MADDWrrr:%[0-9]+]]:gpr32 = MADDWrrr [[COPY1]], [[COPY2]], $wzr
; CHECK-DEFAULT-NEXT: [[MADDWrrr1:%[0-9]+]]:gpr32 = MADDWrrr [[MADDWrrr]], [[COPY1]], $wzr
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: bb.2:
; CHECK-DEFAULT-NEXT: [[PHI:%[0-9]+]]:gpr32 = PHI [[COPY1]], %bb.0, [[MADDWrrr1]], %bb.1
; CHECK-DEFAULT-NEXT: $w0 = COPY [[PHI]]
; CHECK-DEFAULT-NEXT: RET_ReallyLR implicit $w0
;
; CHECK-DATA-DEPENDENT-LABEL: name: cbz_load_to_cond_branch
; CHECK-DATA-DEPENDENT: bb.0:
; CHECK-DATA-DEPENDENT-NEXT: liveins: $x0, $w1, $w2
; CHECK-DATA-DEPENDENT-NEXT: {{ $}}
; CHECK-DATA-DEPENDENT-NEXT: [[COPY:%[0-9]+]]:gpr64common = COPY $x0
; CHECK-DATA-DEPENDENT-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
; CHECK-DATA-DEPENDENT-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $w2
; CHECK-DATA-DEPENDENT-NEXT: [[LDRWui:%[0-9]+]]:gpr32common = LDRWui [[COPY]], 0 :: (load (s32))
; CHECK-DATA-DEPENDENT-NEXT: [[MADDWrrr:%[0-9]+]]:gpr32 = MADDWrrr [[COPY1]], [[COPY2]], $wzr
; CHECK-DATA-DEPENDENT-NEXT: [[MADDWrrr1:%[0-9]+]]:gpr32 = MADDWrrr [[MADDWrrr]], [[COPY1]], $wzr
; CHECK-DATA-DEPENDENT-NEXT: $wzr = SUBSWri [[LDRWui]], 0, 0, implicit-def $nzcv
; CHECK-DATA-DEPENDENT-NEXT: [[CSELWr:%[0-9]+]]:gpr32 = CSELWr [[COPY1]], [[MADDWrrr1]], 0, implicit $nzcv
; CHECK-DATA-DEPENDENT-NEXT: $w0 = COPY [[CSELWr]]
; CHECK-DATA-DEPENDENT-NEXT: RET_ReallyLR implicit $w0
bb.0:
successors: %bb.1(0x40000000), %bb.2(0x40000000)
liveins: $x0, $w1, $w2
%0:gpr64common = COPY $x0
%1:gpr32 = COPY $w1
%2:gpr32 = COPY $w2
%3:gpr32 = LDRWui %0, 0 :: (load (s32))
CBZW %3, %bb.2
B %bb.1
bb.1:
successors: %bb.2(0x80000000)
%4:gpr32 = MADDWrrr %1, %2, $wzr
%5:gpr32 = MADDWrrr %4, %1, $wzr
bb.2:
%6:gpr32 = PHI %1, %bb.0, %5, %bb.1
$w0 = COPY %6
RET_ReallyLR implicit $w0
...
---
name: tbz_arg_to_cond_branch
alignment: 4
tracksRegLiveness: true
body: |
; CHECK-COMMON-LABEL: name: tbz_arg_to_cond_branch
; CHECK-COMMON: bb.0:
; CHECK-COMMON-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
; CHECK-COMMON-NEXT: liveins: $w0, $w1, $w2
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
; CHECK-COMMON-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
; CHECK-COMMON-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $w2
; CHECK-COMMON-NEXT: TBZW [[COPY]], 0, %bb.2
; CHECK-COMMON-NEXT: B %bb.1
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.1:
; CHECK-COMMON-NEXT: successors: %bb.2(0x80000000)
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[MADDWrrr:%[0-9]+]]:gpr32 = MADDWrrr [[COPY1]], [[COPY2]], $wzr
; CHECK-COMMON-NEXT: [[MADDWrrr1:%[0-9]+]]:gpr32 = MADDWrrr [[MADDWrrr]], [[COPY1]], $wzr
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.2:
; CHECK-COMMON-NEXT: [[PHI:%[0-9]+]]:gpr32 = PHI [[COPY1]], %bb.0, [[MADDWrrr1]], %bb.1
; CHECK-COMMON-NEXT: $w0 = COPY [[PHI]]
; CHECK-COMMON-NEXT: RET_ReallyLR implicit $w0
bb.0:
successors: %bb.1(0x40000000), %bb.2(0x40000000)
liveins: $w0, $w1, $w2
%0:gpr32 = COPY $w0
%1:gpr32 = COPY $w1
%2:gpr32 = COPY $w2
TBZW %0, 0, %bb.2
B %bb.1
bb.1:
successors: %bb.2(0x80000000)
%3:gpr32 = MADDWrrr %1, %2, $wzr
%4:gpr32 = MADDWrrr %3, %1, $wzr
bb.2:
%5:gpr32 = PHI %1, %bb.0, %4, %bb.1
$w0 = COPY %5
RET_ReallyLR implicit $w0
...
---
name: tbz_load_to_cond_branch
alignment: 4
tracksRegLiveness: true
body: |
; CHECK-DEFAULT-LABEL: name: tbz_load_to_cond_branch
; CHECK-DEFAULT: bb.0:
; CHECK-DEFAULT-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
; CHECK-DEFAULT-NEXT: liveins: $x0, $w1, $w2
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: [[COPY:%[0-9]+]]:gpr64common = COPY $x0
; CHECK-DEFAULT-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
; CHECK-DEFAULT-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $w2
; CHECK-DEFAULT-NEXT: [[LDRWui:%[0-9]+]]:gpr32 = LDRWui [[COPY]], 0 :: (load (s32))
; CHECK-DEFAULT-NEXT: TBZW [[LDRWui]], 0, %bb.2
; CHECK-DEFAULT-NEXT: B %bb.1
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: bb.1:
; CHECK-DEFAULT-NEXT: successors: %bb.2(0x80000000)
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: [[MADDWrrr:%[0-9]+]]:gpr32 = MADDWrrr [[COPY1]], [[COPY2]], $wzr
; CHECK-DEFAULT-NEXT: [[MADDWrrr1:%[0-9]+]]:gpr32 = MADDWrrr [[MADDWrrr]], [[COPY1]], $wzr
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: bb.2:
; CHECK-DEFAULT-NEXT: [[PHI:%[0-9]+]]:gpr32 = PHI [[COPY1]], %bb.0, [[MADDWrrr1]], %bb.1
; CHECK-DEFAULT-NEXT: $w0 = COPY [[PHI]]
; CHECK-DEFAULT-NEXT: RET_ReallyLR implicit $w0
;
; CHECK-DATA-DEPENDENT-LABEL: name: tbz_load_to_cond_branch
; CHECK-DATA-DEPENDENT: bb.0:
; CHECK-DATA-DEPENDENT-NEXT: liveins: $x0, $w1, $w2
; CHECK-DATA-DEPENDENT-NEXT: {{ $}}
; CHECK-DATA-DEPENDENT-NEXT: [[COPY:%[0-9]+]]:gpr64common = COPY $x0
; CHECK-DATA-DEPENDENT-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
; CHECK-DATA-DEPENDENT-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $w2
; CHECK-DATA-DEPENDENT-NEXT: [[LDRWui:%[0-9]+]]:gpr32 = LDRWui [[COPY]], 0 :: (load (s32))
; CHECK-DATA-DEPENDENT-NEXT: [[MADDWrrr:%[0-9]+]]:gpr32 = MADDWrrr [[COPY1]], [[COPY2]], $wzr
; CHECK-DATA-DEPENDENT-NEXT: [[MADDWrrr1:%[0-9]+]]:gpr32 = MADDWrrr [[MADDWrrr]], [[COPY1]], $wzr
; CHECK-DATA-DEPENDENT-NEXT: $wzr = ANDSWri [[LDRWui]], 0, implicit-def $nzcv
; CHECK-DATA-DEPENDENT-NEXT: [[CSELWr:%[0-9]+]]:gpr32 = CSELWr [[COPY1]], [[MADDWrrr1]], 0, implicit $nzcv
; CHECK-DATA-DEPENDENT-NEXT: $w0 = COPY [[CSELWr]]
; CHECK-DATA-DEPENDENT-NEXT: RET_ReallyLR implicit $w0
bb.0:
successors: %bb.1(0x40000000), %bb.2(0x40000000)
liveins: $x0, $w1, $w2
%0:gpr64common = COPY $x0
%1:gpr32 = COPY $w1
%2:gpr32 = COPY $w2
%3:gpr32 = LDRWui %0, 0 :: (load (s32))
TBZW %3, 0, %bb.2
B %bb.1
bb.1:
successors: %bb.2(0x80000000)
%4:gpr32 = MADDWrrr %1, %2, $wzr
%5:gpr32 = MADDWrrr %4, %1, $wzr
bb.2:
%6:gpr32 = PHI %1, %bb.0, %5, %bb.1
$w0 = COPY %6
RET_ReallyLR implicit $w0
...
---
name: mixed_cp_and_mem_load_to_cond_branch
alignment: 4
tracksRegLiveness: true
constants:
- id: 0
value: i32 100
alignment: 4
body: |
; CHECK-DEFAULT-LABEL: name: mixed_cp_and_mem_load_to_cond_branch
; CHECK-DEFAULT: bb.0:
; CHECK-DEFAULT-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
; CHECK-DEFAULT-NEXT: liveins: $x0, $w1, $w2
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: [[COPY:%[0-9]+]]:gpr64common = COPY $x0
; CHECK-DEFAULT-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
; CHECK-DEFAULT-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $w2
; CHECK-DEFAULT-NEXT: [[LDRWui:%[0-9]+]]:gpr32 = LDRWui [[COPY]], 0 :: (load (s32))
; CHECK-DEFAULT-NEXT: renamable $x8 = ADRP target-flags(aarch64-page) %const.0
; CHECK-DEFAULT-NEXT: [[LDRWui1:%[0-9]+]]:gpr32common = LDRWui killed renamable $x8, target-flags(aarch64-pageoff, aarch64-nc) %const.0 :: (load (s32) from constant-pool)
; CHECK-DEFAULT-NEXT: [[SUBSWrr:%[0-9]+]]:gpr32 = SUBSWrr [[LDRWui]], [[LDRWui1]], implicit-def $nzcv
; CHECK-DEFAULT-NEXT: Bcc 12, %bb.2, implicit $nzcv
; CHECK-DEFAULT-NEXT: B %bb.1
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: bb.1:
; CHECK-DEFAULT-NEXT: successors: %bb.2(0x80000000)
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: [[MADDWrrr:%[0-9]+]]:gpr32 = MADDWrrr [[COPY1]], [[COPY2]], $wzr
; CHECK-DEFAULT-NEXT: [[MADDWrrr1:%[0-9]+]]:gpr32 = MADDWrrr [[MADDWrrr]], [[COPY1]], $wzr
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: bb.2:
; CHECK-DEFAULT-NEXT: [[PHI:%[0-9]+]]:gpr32 = PHI [[COPY1]], %bb.0, [[MADDWrrr1]], %bb.1
; CHECK-DEFAULT-NEXT: $w0 = COPY [[PHI]]
; CHECK-DEFAULT-NEXT: RET_ReallyLR implicit $w0
;
; CHECK-DATA-DEPENDENT-LABEL: name: mixed_cp_and_mem_load_to_cond_branch
; CHECK-DATA-DEPENDENT: bb.0:
; CHECK-DATA-DEPENDENT-NEXT: liveins: $x0, $w1, $w2
; CHECK-DATA-DEPENDENT-NEXT: {{ $}}
; CHECK-DATA-DEPENDENT-NEXT: [[COPY:%[0-9]+]]:gpr64common = COPY $x0
; CHECK-DATA-DEPENDENT-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
; CHECK-DATA-DEPENDENT-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $w2
; CHECK-DATA-DEPENDENT-NEXT: [[LDRWui:%[0-9]+]]:gpr32 = LDRWui [[COPY]], 0 :: (load (s32))
; CHECK-DATA-DEPENDENT-NEXT: renamable $x8 = ADRP target-flags(aarch64-page) %const.0
; CHECK-DATA-DEPENDENT-NEXT: [[LDRWui1:%[0-9]+]]:gpr32common = LDRWui killed renamable $x8, target-flags(aarch64-pageoff, aarch64-nc) %const.0 :: (load (s32) from constant-pool)
; CHECK-DATA-DEPENDENT-NEXT: [[SUBSWrr:%[0-9]+]]:gpr32 = SUBSWrr [[LDRWui]], [[LDRWui1]], implicit-def $nzcv
; CHECK-DATA-DEPENDENT-NEXT: [[MADDWrrr:%[0-9]+]]:gpr32 = MADDWrrr [[COPY1]], [[COPY2]], $wzr
; CHECK-DATA-DEPENDENT-NEXT: [[MADDWrrr1:%[0-9]+]]:gpr32 = MADDWrrr [[MADDWrrr]], [[COPY1]], $wzr
; CHECK-DATA-DEPENDENT-NEXT: [[CSELWr:%[0-9]+]]:gpr32 = CSELWr [[COPY1]], [[MADDWrrr1]], 12, implicit $nzcv
; CHECK-DATA-DEPENDENT-NEXT: $w0 = COPY [[CSELWr]]
; CHECK-DATA-DEPENDENT-NEXT: RET_ReallyLR implicit $w0
bb.0:
successors: %bb.1(0x40000000), %bb.2(0x40000000)
liveins: $x0, $w1, $w2
%0:gpr64common = COPY $x0
%1:gpr32 = COPY $w1
%2:gpr32 = COPY $w2
%3:gpr32 = LDRWui %0, 0 :: (load (s32))
renamable $x8 = ADRP target-flags(aarch64-page) %const.0
%4:gpr32common = LDRWui killed renamable $x8, target-flags(aarch64-pageoff, aarch64-nc) %const.0 :: (load (s32) from constant-pool)
%5:gpr32 = SUBSWrr %3, %4, implicit-def $nzcv
Bcc 12, %bb.2, implicit $nzcv
B %bb.1
bb.1:
successors: %bb.2(0x80000000)
%6:gpr32 = MADDWrrr %1, %2, $wzr
%7:gpr32 = MADDWrrr %6, %1, $wzr
bb.2:
%8:gpr32 = PHI %1, %bb.0, %7, %bb.1
$w0 = COPY %8
RET_ReallyLR implicit $w0
...
---
name: hot_branch_load_to_cond_branch
alignment: 4
tracksRegLiveness: true
body: |
; CHECK-COMMON-LABEL: name: hot_branch_load_to_cond_branch
; CHECK-COMMON: bb.0:
; CHECK-COMMON-NEXT: successors: %bb.1(0x30000000), %bb.2(0x50000000)
; CHECK-COMMON-NEXT: liveins: $x0, $w1, $w2
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[COPY:%[0-9]+]]:gpr64common = COPY $x0
; CHECK-COMMON-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
; CHECK-COMMON-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $w2
; CHECK-COMMON-NEXT: [[LDRWui:%[0-9]+]]:gpr32common = LDRWui [[COPY]], 0 :: (load (s32))
; CHECK-COMMON-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[LDRWui]], 100, 0, implicit-def $nzcv
; CHECK-COMMON-NEXT: Bcc 12, %bb.2, implicit $nzcv
; CHECK-COMMON-NEXT: B %bb.1
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.1:
; CHECK-COMMON-NEXT: successors: %bb.2(0x80000000)
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[MADDWrrr:%[0-9]+]]:gpr32 = MADDWrrr [[COPY1]], [[COPY2]], $wzr
; CHECK-COMMON-NEXT: [[MADDWrrr1:%[0-9]+]]:gpr32 = MADDWrrr [[MADDWrrr]], [[COPY1]], $wzr
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.2:
; CHECK-COMMON-NEXT: [[PHI:%[0-9]+]]:gpr32 = PHI [[COPY1]], %bb.0, [[MADDWrrr1]], %bb.1
; CHECK-COMMON-NEXT: $w0 = COPY [[PHI]]
; CHECK-COMMON-NEXT: RET_ReallyLR implicit $w0
bb.0:
successors: %bb.1(0x30000000), %bb.2(0x50000000)
liveins: $x0, $w1, $w2
%0:gpr64common = COPY $x0
%1:gpr32 = COPY $w1
%2:gpr32 = COPY $w2
%3:gpr32common = LDRWui %0, 0 :: (load (s32))
%4:gpr32 = SUBSWri %3, 100, 0, implicit-def $nzcv
Bcc 12, %bb.2, implicit $nzcv
B %bb.1
bb.1:
successors: %bb.2(0x80000000)
%5:gpr32 = MADDWrrr %1, %2, $wzr
%6:gpr32 = MADDWrrr %5, %1, $wzr
bb.2:
%7:gpr32 = PHI %1, %bb.0, %6, %bb.1
$w0 = COPY %7
RET_ReallyLR implicit $w0
...
---
name: invariant_load_to_cond_branch
alignment: 4
tracksRegLiveness: true
body: |
; CHECK-COMMON-LABEL: name: invariant_load_to_cond_branch
; CHECK-COMMON: bb.0:
; CHECK-COMMON-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
; CHECK-COMMON-NEXT: liveins: $x0, $w1, $w2
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[COPY:%[0-9]+]]:gpr64common = COPY $x0
; CHECK-COMMON-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
; CHECK-COMMON-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $w2
; CHECK-COMMON-NEXT: [[LDRWui:%[0-9]+]]:gpr32common = LDRWui [[COPY]], 0 :: (dereferenceable invariant load (s32))
; CHECK-COMMON-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[LDRWui]], 100, 0, implicit-def $nzcv
; CHECK-COMMON-NEXT: Bcc 12, %bb.2, implicit $nzcv
; CHECK-COMMON-NEXT: B %bb.1
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.1:
; CHECK-COMMON-NEXT: successors: %bb.2(0x80000000)
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[MADDWrrr:%[0-9]+]]:gpr32 = MADDWrrr [[COPY1]], [[COPY2]], $wzr
; CHECK-COMMON-NEXT: [[MADDWrrr1:%[0-9]+]]:gpr32 = MADDWrrr [[MADDWrrr]], [[COPY1]], $wzr
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.2:
; CHECK-COMMON-NEXT: [[PHI:%[0-9]+]]:gpr32 = PHI [[COPY1]], %bb.0, [[MADDWrrr1]], %bb.1
; CHECK-COMMON-NEXT: $w0 = COPY [[PHI]]
; CHECK-COMMON-NEXT: RET_ReallyLR implicit $w0
bb.0:
successors: %bb.1(0x40000000), %bb.2(0x40000000)
liveins: $x0, $w1, $w2
%0:gpr64common = COPY $x0
%1:gpr32 = COPY $w1
%2:gpr32 = COPY $w2
%3:gpr32common = LDRWui %0, 0 :: (dereferenceable invariant load (s32))
%4:gpr32 = SUBSWri %3, 100, 0, implicit-def $nzcv
Bcc 12, %bb.2, implicit $nzcv
B %bb.1
bb.1:
successors: %bb.2(0x80000000)
%5:gpr32 = MADDWrrr %1, %2, $wzr
%6:gpr32 = MADDWrrr %5, %1, $wzr
bb.2:
%7:gpr32 = PHI %1, %bb.0, %6, %bb.1
$w0 = COPY %7
RET_ReallyLR implicit $w0
...
---
name: load_outside_loop_branch_inside
alignment: 4
tracksRegLiveness: true
body: |
; CHECK-COMMON-LABEL: name: load_outside_loop_branch_inside
; CHECK-COMMON: bb.0:
; CHECK-COMMON-NEXT: successors: %bb.1(0x80000000)
; CHECK-COMMON-NEXT: liveins: $x0, $w1, $w2
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[COPY:%[0-9]+]]:gpr64common = COPY $x0
; CHECK-COMMON-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
; CHECK-COMMON-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $w2
; CHECK-COMMON-NEXT: [[LDRWui:%[0-9]+]]:gpr32common = LDRWui [[COPY]], 0 :: (load (s32))
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.1:
; CHECK-COMMON-NEXT: successors: %bb.2(0x40000000), %bb.3(0x40000000)
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[LDRWui]], 100, 0, implicit-def $nzcv
; CHECK-COMMON-NEXT: Bcc 12, %bb.3, implicit $nzcv
; CHECK-COMMON-NEXT: B %bb.2
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.2:
; CHECK-COMMON-NEXT: successors: %bb.3(0x80000000)
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[MADDWrrr:%[0-9]+]]:gpr32 = MADDWrrr [[COPY1]], [[COPY2]], $wzr
; CHECK-COMMON-NEXT: [[MADDWrrr1:%[0-9]+]]:gpr32 = MADDWrrr [[MADDWrrr]], [[COPY1]], $wzr
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.3:
; CHECK-COMMON-NEXT: successors: %bb.1(0x7c000000), %bb.4(0x04000000)
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[PHI:%[0-9]+]]:gpr32sp = PHI [[COPY1]], %bb.1, [[MADDWrrr1]], %bb.2
; CHECK-COMMON-NEXT: [[SUBSWri1:%[0-9]+]]:gpr32 = SUBSWri [[PHI]], 0, 0, implicit-def $nzcv
; CHECK-COMMON-NEXT: Bcc 12, %bb.1, implicit $nzcv
; CHECK-COMMON-NEXT: B %bb.4
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.4:
; CHECK-COMMON-NEXT: $w0 = COPY [[PHI]]
; CHECK-COMMON-NEXT: RET_ReallyLR implicit $w0
bb.0:
successors: %bb.1(0x80000000)
liveins: $x0, $w1, $w2
%0:gpr64common = COPY $x0
%1:gpr32 = COPY $w1
%2:gpr32 = COPY $w2
%3:gpr32common = LDRWui %0, 0 :: (load (s32))
bb.1:
successors: %bb.2(0x40000000), %bb.3(0x40000000)
%4:gpr32 = SUBSWri %3, 100, 0, implicit-def $nzcv
Bcc 12, %bb.3, implicit $nzcv
B %bb.2
bb.2:
successors: %bb.3(0x80000000)
%5:gpr32 = MADDWrrr %1, %2, $wzr
%6:gpr32 = MADDWrrr %5, %1, $wzr
bb.3:
successors: %bb.1(0x7c000000), %bb.4(0x04000000)
%7:gpr32sp = PHI %1, %bb.1, %6, %bb.2
%8:gpr32 = SUBSWri %7, 0, 0, implicit-def $nzcv
Bcc 12, %bb.1, implicit $nzcv
B %bb.4
bb.4:
$w0 = COPY %7
RET_ReallyLR implicit $w0
...
---
name: load_inside_loop_branch_inside
alignment: 4
tracksRegLiveness: true
body: |
; CHECK-DEFAULT-LABEL: name: load_inside_loop_branch_inside
; CHECK-DEFAULT: bb.0:
; CHECK-DEFAULT-NEXT: successors: %bb.1(0x80000000)
; CHECK-DEFAULT-NEXT: liveins: $x0, $w1, $w2
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: [[COPY:%[0-9]+]]:gpr64common = COPY $x0
; CHECK-DEFAULT-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
; CHECK-DEFAULT-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $w2
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: bb.1:
; CHECK-DEFAULT-NEXT: successors: %bb.2(0x40000000), %bb.3(0x40000000)
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: [[LDRWui:%[0-9]+]]:gpr32common = LDRWui [[COPY]], 0 :: (load (s32))
; CHECK-DEFAULT-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[LDRWui]], 100, 0, implicit-def $nzcv
; CHECK-DEFAULT-NEXT: Bcc 12, %bb.3, implicit $nzcv
; CHECK-DEFAULT-NEXT: B %bb.2
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: bb.2:
; CHECK-DEFAULT-NEXT: successors: %bb.3(0x80000000)
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: [[MADDWrrr:%[0-9]+]]:gpr32 = MADDWrrr [[COPY1]], [[COPY2]], $wzr
; CHECK-DEFAULT-NEXT: [[MADDWrrr1:%[0-9]+]]:gpr32 = MADDWrrr [[MADDWrrr]], [[COPY1]], $wzr
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: bb.3:
; CHECK-DEFAULT-NEXT: successors: %bb.1(0x7c000000), %bb.4(0x04000000)
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: [[PHI:%[0-9]+]]:gpr32sp = PHI [[COPY1]], %bb.1, [[MADDWrrr1]], %bb.2
; CHECK-DEFAULT-NEXT: [[SUBSWri1:%[0-9]+]]:gpr32 = SUBSWri [[PHI]], 0, 0, implicit-def $nzcv
; CHECK-DEFAULT-NEXT: Bcc 12, %bb.1, implicit $nzcv
; CHECK-DEFAULT-NEXT: B %bb.4
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: bb.4:
; CHECK-DEFAULT-NEXT: $w0 = COPY [[PHI]]
; CHECK-DEFAULT-NEXT: RET_ReallyLR implicit $w0
;
; CHECK-DATA-DEPENDENT-LABEL: name: load_inside_loop_branch_inside
; CHECK-DATA-DEPENDENT: bb.0:
; CHECK-DATA-DEPENDENT-NEXT: successors: %bb.1(0x80000000)
; CHECK-DATA-DEPENDENT-NEXT: liveins: $x0, $w1, $w2
; CHECK-DATA-DEPENDENT-NEXT: {{ $}}
; CHECK-DATA-DEPENDENT-NEXT: [[COPY:%[0-9]+]]:gpr64common = COPY $x0
; CHECK-DATA-DEPENDENT-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
; CHECK-DATA-DEPENDENT-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $w2
; CHECK-DATA-DEPENDENT-NEXT: {{ $}}
; CHECK-DATA-DEPENDENT-NEXT: bb.1:
; CHECK-DATA-DEPENDENT-NEXT: successors: %bb.1(0x7c000000), %bb.4(0x04000000)
; CHECK-DATA-DEPENDENT-NEXT: {{ $}}
; CHECK-DATA-DEPENDENT-NEXT: [[LDRWui:%[0-9]+]]:gpr32common = LDRWui [[COPY]], 0 :: (load (s32))
; CHECK-DATA-DEPENDENT-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[LDRWui]], 100, 0, implicit-def $nzcv
; CHECK-DATA-DEPENDENT-NEXT: [[MADDWrrr:%[0-9]+]]:gpr32 = MADDWrrr [[COPY1]], [[COPY2]], $wzr
; CHECK-DATA-DEPENDENT-NEXT: [[MADDWrrr1:%[0-9]+]]:gpr32 = MADDWrrr [[MADDWrrr]], [[COPY1]], $wzr
; CHECK-DATA-DEPENDENT-NEXT: [[CSELWr:%[0-9]+]]:gpr32common = CSELWr [[COPY1]], [[MADDWrrr1]], 12, implicit $nzcv
; CHECK-DATA-DEPENDENT-NEXT: [[SUBSWri1:%[0-9]+]]:gpr32 = SUBSWri [[CSELWr]], 0, 0, implicit-def $nzcv
; CHECK-DATA-DEPENDENT-NEXT: Bcc 12, %bb.1, implicit $nzcv
; CHECK-DATA-DEPENDENT-NEXT: B %bb.4
; CHECK-DATA-DEPENDENT-NEXT: {{ $}}
; CHECK-DATA-DEPENDENT-NEXT: bb.4:
; CHECK-DATA-DEPENDENT-NEXT: $w0 = COPY [[CSELWr]]
; CHECK-DATA-DEPENDENT-NEXT: RET_ReallyLR implicit $w0
bb.0:
successors: %bb.1(0x80000000)
liveins: $x0, $w1, $w2
%0:gpr64common = COPY $x0
%1:gpr32 = COPY $w1
%2:gpr32 = COPY $w2
bb.1:
successors: %bb.2(0x40000000), %bb.3(0x40000000)
%3:gpr32common = LDRWui %0, 0 :: (load (s32))
%4:gpr32 = SUBSWri %3, 100, 0, implicit-def $nzcv
Bcc 12, %bb.3, implicit $nzcv
B %bb.2
bb.2:
successors: %bb.3(0x80000000)
%5:gpr32 = MADDWrrr %1, %2, $wzr
%6:gpr32 = MADDWrrr %5, %1, $wzr
bb.3:
successors: %bb.1(0x7c000000), %bb.4(0x04000000)
%7:gpr32sp = PHI %1, %bb.1, %6, %bb.2
%8:gpr32 = SUBSWri %7, 0, 0, implicit-def $nzcv
Bcc 12, %bb.1, implicit $nzcv
B %bb.4
bb.4:
$w0 = COPY %7
RET_ReallyLR implicit $w0
...
---
name: load_branch_separate_bbs_in_loop
alignment: 4
tracksRegLiveness: true
body: |
; CHECK-DEFAULT-LABEL: name: load_branch_separate_bbs_in_loop
; CHECK-DEFAULT: bb.0:
; CHECK-DEFAULT-NEXT: successors: %bb.1(0x80000000)
; CHECK-DEFAULT-NEXT: liveins: $x0, $w1, $w2
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: [[COPY:%[0-9]+]]:gpr64common = COPY $x0
; CHECK-DEFAULT-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
; CHECK-DEFAULT-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $w2
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: bb.1:
; CHECK-DEFAULT-NEXT: successors: %bb.2(0x80000000)
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: [[LDRWui:%[0-9]+]]:gpr32common = LDRWui [[COPY]], 0 :: (load (s32))
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: bb.2:
; CHECK-DEFAULT-NEXT: successors: %bb.3(0x40000000), %bb.4(0x40000000)
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[LDRWui]], 100, 0, implicit-def $nzcv
; CHECK-DEFAULT-NEXT: Bcc 12, %bb.4, implicit $nzcv
; CHECK-DEFAULT-NEXT: B %bb.3
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: bb.3:
; CHECK-DEFAULT-NEXT: successors: %bb.4(0x80000000)
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: [[MADDWrrr:%[0-9]+]]:gpr32 = MADDWrrr [[COPY1]], [[COPY2]], $wzr
; CHECK-DEFAULT-NEXT: [[MADDWrrr1:%[0-9]+]]:gpr32 = MADDWrrr [[MADDWrrr]], [[COPY1]], $wzr
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: bb.4:
; CHECK-DEFAULT-NEXT: successors: %bb.1(0x7c000000), %bb.5(0x04000000)
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: [[PHI:%[0-9]+]]:gpr32sp = PHI [[COPY1]], %bb.2, [[MADDWrrr1]], %bb.3
; CHECK-DEFAULT-NEXT: [[SUBSWri1:%[0-9]+]]:gpr32 = SUBSWri [[PHI]], 0, 0, implicit-def $nzcv
; CHECK-DEFAULT-NEXT: Bcc 12, %bb.1, implicit $nzcv
; CHECK-DEFAULT-NEXT: B %bb.5
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: bb.5:
; CHECK-DEFAULT-NEXT: $w0 = COPY [[PHI]]
; CHECK-DEFAULT-NEXT: RET_ReallyLR implicit $w0
;
; CHECK-DATA-DEPENDENT-LABEL: name: load_branch_separate_bbs_in_loop
; CHECK-DATA-DEPENDENT: bb.0:
; CHECK-DATA-DEPENDENT-NEXT: successors: %bb.1(0x80000000)
; CHECK-DATA-DEPENDENT-NEXT: liveins: $x0, $w1, $w2
; CHECK-DATA-DEPENDENT-NEXT: {{ $}}
; CHECK-DATA-DEPENDENT-NEXT: [[COPY:%[0-9]+]]:gpr64common = COPY $x0
; CHECK-DATA-DEPENDENT-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
; CHECK-DATA-DEPENDENT-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $w2
; CHECK-DATA-DEPENDENT-NEXT: {{ $}}
; CHECK-DATA-DEPENDENT-NEXT: bb.1:
; CHECK-DATA-DEPENDENT-NEXT: successors: %bb.2(0x80000000)
; CHECK-DATA-DEPENDENT-NEXT: {{ $}}
; CHECK-DATA-DEPENDENT-NEXT: [[LDRWui:%[0-9]+]]:gpr32common = LDRWui [[COPY]], 0 :: (load (s32))
; CHECK-DATA-DEPENDENT-NEXT: {{ $}}
; CHECK-DATA-DEPENDENT-NEXT: bb.2:
; CHECK-DATA-DEPENDENT-NEXT: successors: %bb.1(0x7c000000), %bb.5(0x04000000)
; CHECK-DATA-DEPENDENT-NEXT: {{ $}}
; CHECK-DATA-DEPENDENT-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[LDRWui]], 100, 0, implicit-def $nzcv
; CHECK-DATA-DEPENDENT-NEXT: [[MADDWrrr:%[0-9]+]]:gpr32 = MADDWrrr [[COPY1]], [[COPY2]], $wzr
; CHECK-DATA-DEPENDENT-NEXT: [[MADDWrrr1:%[0-9]+]]:gpr32 = MADDWrrr [[MADDWrrr]], [[COPY1]], $wzr
; CHECK-DATA-DEPENDENT-NEXT: [[CSELWr:%[0-9]+]]:gpr32common = CSELWr [[COPY1]], [[MADDWrrr1]], 12, implicit $nzcv
; CHECK-DATA-DEPENDENT-NEXT: [[SUBSWri1:%[0-9]+]]:gpr32 = SUBSWri [[CSELWr]], 0, 0, implicit-def $nzcv
; CHECK-DATA-DEPENDENT-NEXT: Bcc 12, %bb.1, implicit $nzcv
; CHECK-DATA-DEPENDENT-NEXT: B %bb.5
; CHECK-DATA-DEPENDENT-NEXT: {{ $}}
; CHECK-DATA-DEPENDENT-NEXT: bb.5:
; CHECK-DATA-DEPENDENT-NEXT: $w0 = COPY [[CSELWr]]
; CHECK-DATA-DEPENDENT-NEXT: RET_ReallyLR implicit $w0
bb.0:
successors: %bb.1(0x80000000)
liveins: $x0, $w1, $w2
%0:gpr64common = COPY $x0
%1:gpr32 = COPY $w1
%2:gpr32 = COPY $w2
bb.1:
successors: %bb.2(0x80000000)
%3:gpr32common = LDRWui %0, 0 :: (load (s32))
bb.2:
successors: %bb.3(0x40000000), %bb.4(0x40000000)
%4:gpr32 = SUBSWri %3, 100, 0, implicit-def $nzcv
Bcc 12, %bb.4, implicit $nzcv
B %bb.3
bb.3:
successors: %bb.4(0x80000000)
%5:gpr32 = MADDWrrr %1, %2, $wzr
%6:gpr32 = MADDWrrr %5, %1, $wzr
bb.4:
successors: %bb.1(0x7c000000), %bb.5(0x04000000)
%7:gpr32sp = PHI %1, %bb.2, %6, %bb.3
%8:gpr32 = SUBSWri %7, 0, 0, implicit-def $nzcv
Bcc 12, %bb.1, implicit $nzcv
B %bb.5
bb.5:
$w0 = COPY %7
RET_ReallyLR implicit $w0
...
---
name: call_between_load_and_branch
alignment: 4
tracksRegLiveness: true
body: |
; CHECK-COMMON-LABEL: name: call_between_load_and_branch
; CHECK-COMMON: bb.0:
; CHECK-COMMON-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
; CHECK-COMMON-NEXT: liveins: $x0, $w1, $w2
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[COPY:%[0-9]+]]:gpr64common = COPY $x0
; CHECK-COMMON-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
; CHECK-COMMON-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $w2
; CHECK-COMMON-NEXT: [[LDRWui:%[0-9]+]]:gpr32common = LDRWui [[COPY]], 0 :: (load (s32))
; CHECK-COMMON-NEXT: BL &foo, implicit-def $lr
; CHECK-COMMON-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[LDRWui]], 100, 0, implicit-def $nzcv
; CHECK-COMMON-NEXT: Bcc 12, %bb.2, implicit $nzcv
; CHECK-COMMON-NEXT: B %bb.1
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.1:
; CHECK-COMMON-NEXT: successors: %bb.2(0x80000000)
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[MADDWrrr:%[0-9]+]]:gpr32 = MADDWrrr [[COPY1]], [[COPY2]], $wzr
; CHECK-COMMON-NEXT: [[MADDWrrr1:%[0-9]+]]:gpr32 = MADDWrrr [[MADDWrrr]], [[COPY1]], $wzr
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.2:
; CHECK-COMMON-NEXT: [[PHI:%[0-9]+]]:gpr32 = PHI [[COPY1]], %bb.0, [[MADDWrrr1]], %bb.1
; CHECK-COMMON-NEXT: $w0 = COPY [[PHI]]
; CHECK-COMMON-NEXT: RET_ReallyLR implicit $w0
bb.0:
successors: %bb.1(0x40000000), %bb.2(0x40000000)
liveins: $x0, $w1, $w2
%0:gpr64common = COPY $x0
%1:gpr32 = COPY $w1
%2:gpr32 = COPY $w2
%3:gpr32common = LDRWui %0, 0 :: (load (s32))
BL &foo, implicit-def $lr
%4:gpr32 = SUBSWri %3, 100, 0, implicit-def $nzcv
Bcc 12, %bb.2, implicit $nzcv
B %bb.1
bb.1:
successors: %bb.2(0x80000000)
%5:gpr32 = MADDWrrr %1, %2, $wzr
%6:gpr32 = MADDWrrr %5, %1, $wzr
bb.2:
%7:gpr32 = PHI %1, %bb.0, %6, %bb.1
$w0 = COPY %7
RET_ReallyLR implicit $w0
...
---
name: load_cond_and_branch_pred_bb
alignment: 4
tracksRegLiveness: true
body: |
; CHECK-DEFAULT-LABEL: name: load_cond_and_branch_pred_bb
; CHECK-DEFAULT: bb.0:
; CHECK-DEFAULT-NEXT: successors: %bb.1(0x80000000)
; CHECK-DEFAULT-NEXT: liveins: $x0, $w1, $w2
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: [[COPY:%[0-9]+]]:gpr64common = COPY $x0
; CHECK-DEFAULT-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
; CHECK-DEFAULT-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $w2
; CHECK-DEFAULT-NEXT: [[LDRWui:%[0-9]+]]:gpr32common = LDRWui [[COPY]], 0 :: (load (s32))
; CHECK-DEFAULT-NEXT: B %bb.1
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: bb.1:
; CHECK-DEFAULT-NEXT: successors: %bb.2(0x40000000), %bb.3(0x40000000)
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[LDRWui]], 100, 0, implicit-def $nzcv
; CHECK-DEFAULT-NEXT: Bcc 12, %bb.3, implicit $nzcv
; CHECK-DEFAULT-NEXT: B %bb.2
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: bb.2:
; CHECK-DEFAULT-NEXT: successors: %bb.3(0x80000000)
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: [[MADDWrrr:%[0-9]+]]:gpr32 = MADDWrrr [[COPY1]], [[COPY2]], $wzr
; CHECK-DEFAULT-NEXT: [[MADDWrrr1:%[0-9]+]]:gpr32 = MADDWrrr [[MADDWrrr]], [[COPY1]], $wzr
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: bb.3:
; CHECK-DEFAULT-NEXT: [[PHI:%[0-9]+]]:gpr32 = PHI [[COPY1]], %bb.1, [[MADDWrrr1]], %bb.2
; CHECK-DEFAULT-NEXT: $w0 = COPY [[PHI]]
; CHECK-DEFAULT-NEXT: RET_ReallyLR implicit $w0
;
; CHECK-DATA-DEPENDENT-LABEL: name: load_cond_and_branch_pred_bb
; CHECK-DATA-DEPENDENT: bb.0:
; CHECK-DATA-DEPENDENT-NEXT: successors: %bb.1(0x80000000)
; CHECK-DATA-DEPENDENT-NEXT: liveins: $x0, $w1, $w2
; CHECK-DATA-DEPENDENT-NEXT: {{ $}}
; CHECK-DATA-DEPENDENT-NEXT: [[COPY:%[0-9]+]]:gpr64common = COPY $x0
; CHECK-DATA-DEPENDENT-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
; CHECK-DATA-DEPENDENT-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $w2
; CHECK-DATA-DEPENDENT-NEXT: [[LDRWui:%[0-9]+]]:gpr32common = LDRWui [[COPY]], 0 :: (load (s32))
; CHECK-DATA-DEPENDENT-NEXT: B %bb.1
; CHECK-DATA-DEPENDENT-NEXT: {{ $}}
; CHECK-DATA-DEPENDENT-NEXT: bb.1:
; CHECK-DATA-DEPENDENT-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[LDRWui]], 100, 0, implicit-def $nzcv
; CHECK-DATA-DEPENDENT-NEXT: [[MADDWrrr:%[0-9]+]]:gpr32 = MADDWrrr [[COPY1]], [[COPY2]], $wzr
; CHECK-DATA-DEPENDENT-NEXT: [[MADDWrrr1:%[0-9]+]]:gpr32 = MADDWrrr [[MADDWrrr]], [[COPY1]], $wzr
; CHECK-DATA-DEPENDENT-NEXT: [[CSELWr:%[0-9]+]]:gpr32 = CSELWr [[COPY1]], [[MADDWrrr1]], 12, implicit $nzcv
; CHECK-DATA-DEPENDENT-NEXT: $w0 = COPY [[CSELWr]]
; CHECK-DATA-DEPENDENT-NEXT: RET_ReallyLR implicit $w0
bb.0:
successors: %bb.1(0x80000000)
liveins: $x0, $w1, $w2
%0:gpr64common = COPY $x0
%1:gpr32 = COPY $w1
%2:gpr32 = COPY $w2
%3:gpr32common = LDRWui %0, 0 :: (load (s32))
B %bb.1
bb.1:
successors: %bb.2(0x40000000), %bb.3(0x40000000)
%4:gpr32 = SUBSWri %3, 100, 0, implicit-def $nzcv
Bcc 12, %bb.3, implicit $nzcv
B %bb.2
bb.2:
successors: %bb.3(0x80000000)
%5:gpr32 = MADDWrrr %1, %2, $wzr
%6:gpr32 = MADDWrrr %5, %1, $wzr
bb.3:
%7:gpr32 = PHI %1, %bb.1, %6, %bb.2
$w0 = COPY %7
RET_ReallyLR implicit $w0
...
---
name: load_cond_and_branch_pred_bb_with_call
alignment: 4
tracksRegLiveness: true
body: |
; CHECK-COMMON-LABEL: name: load_cond_and_branch_pred_bb_with_call
; CHECK-COMMON: bb.0:
; CHECK-COMMON-NEXT: successors: %bb.1(0x80000000)
; CHECK-COMMON-NEXT: liveins: $x0, $w1, $w2
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[COPY:%[0-9]+]]:gpr64common = COPY $x0
; CHECK-COMMON-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
; CHECK-COMMON-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $w2
; CHECK-COMMON-NEXT: [[LDRWui:%[0-9]+]]:gpr32common = LDRWui [[COPY]], 0 :: (load (s32))
; CHECK-COMMON-NEXT: BL &foo, implicit-def $lr
; CHECK-COMMON-NEXT: B %bb.1
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.1:
; CHECK-COMMON-NEXT: successors: %bb.2(0x40000000), %bb.3(0x40000000)
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[LDRWui]], 100, 0, implicit-def $nzcv
; CHECK-COMMON-NEXT: Bcc 12, %bb.3, implicit $nzcv
; CHECK-COMMON-NEXT: B %bb.2
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.2:
; CHECK-COMMON-NEXT: successors: %bb.3(0x80000000)
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[MADDWrrr:%[0-9]+]]:gpr32 = MADDWrrr [[COPY1]], [[COPY2]], $wzr
; CHECK-COMMON-NEXT: [[MADDWrrr1:%[0-9]+]]:gpr32 = MADDWrrr [[MADDWrrr]], [[COPY1]], $wzr
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.3:
; CHECK-COMMON-NEXT: [[PHI:%[0-9]+]]:gpr32 = PHI [[COPY1]], %bb.1, [[MADDWrrr1]], %bb.2
; CHECK-COMMON-NEXT: $w0 = COPY [[PHI]]
; CHECK-COMMON-NEXT: RET_ReallyLR implicit $w0
bb.0:
successors: %bb.1(0x80000000)
liveins: $x0, $w1, $w2
%0:gpr64common = COPY $x0
%1:gpr32 = COPY $w1
%2:gpr32 = COPY $w2
%3:gpr32common = LDRWui %0, 0 :: (load (s32))
BL &foo, implicit-def $lr
B %bb.1
bb.1:
successors: %bb.2(0x40000000), %bb.3(0x40000000)
%4:gpr32 = SUBSWri %3, 100, 0, implicit-def $nzcv
Bcc 12, %bb.3, implicit $nzcv
B %bb.2
bb.2:
successors: %bb.3(0x80000000)
%5:gpr32 = MADDWrrr %1, %2, $wzr
%6:gpr32 = MADDWrrr %5, %1, $wzr
bb.3:
%7:gpr32 = PHI %1, %bb.1, %6, %bb.2
$w0 = COPY %7
RET_ReallyLR implicit $w0
...
---
name: load_in_pred_call_in_head
alignment: 4
tracksRegLiveness: true
body: |
; CHECK-COMMON-LABEL: name: load_in_pred_call_in_head
; CHECK-COMMON: bb.0:
; CHECK-COMMON-NEXT: successors: %bb.1(0x80000000)
; CHECK-COMMON-NEXT: liveins: $x0, $w1, $w2
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[COPY:%[0-9]+]]:gpr64common = COPY $x0
; CHECK-COMMON-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
; CHECK-COMMON-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $w2
; CHECK-COMMON-NEXT: [[LDRWui:%[0-9]+]]:gpr32common = LDRWui [[COPY]], 0 :: (load (s32))
; CHECK-COMMON-NEXT: B %bb.1
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.1:
; CHECK-COMMON-NEXT: successors: %bb.2(0x40000000), %bb.3(0x40000000)
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: BL &foo, implicit-def $lr
; CHECK-COMMON-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[LDRWui]], 100, 0, implicit-def $nzcv
; CHECK-COMMON-NEXT: Bcc 12, %bb.3, implicit $nzcv
; CHECK-COMMON-NEXT: B %bb.2
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.2:
; CHECK-COMMON-NEXT: successors: %bb.3(0x80000000)
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[MADDWrrr:%[0-9]+]]:gpr32 = MADDWrrr [[COPY1]], [[COPY2]], $wzr
; CHECK-COMMON-NEXT: [[MADDWrrr1:%[0-9]+]]:gpr32 = MADDWrrr [[MADDWrrr]], [[COPY1]], $wzr
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.3:
; CHECK-COMMON-NEXT: [[PHI:%[0-9]+]]:gpr32 = PHI [[COPY1]], %bb.1, [[MADDWrrr1]], %bb.2
; CHECK-COMMON-NEXT: $w0 = COPY [[PHI]]
; CHECK-COMMON-NEXT: RET_ReallyLR implicit $w0
bb.0:
successors: %bb.1(0x80000000)
liveins: $x0, $w1, $w2
%0:gpr64common = COPY $x0
%1:gpr32 = COPY $w1
%2:gpr32 = COPY $w2
%3:gpr32common = LDRWui %0, 0 :: (load (s32))
B %bb.1
bb.1:
successors: %bb.2(0x40000000), %bb.3(0x40000000)
BL &foo, implicit-def $lr
%4:gpr32 = SUBSWri %3, 100, 0, implicit-def $nzcv
Bcc 12, %bb.3, implicit $nzcv
B %bb.2
bb.2:
successors: %bb.3(0x80000000)
%5:gpr32 = MADDWrrr %1, %2, $wzr
%6:gpr32 = MADDWrrr %5, %1, $wzr
bb.3:
%7:gpr32 = PHI %1, %bb.1, %6, %bb.2
$w0 = COPY %7
RET_ReallyLR implicit $w0
...
---
name: load_in_loop_not_immediate_pred
alignment: 4
tracksRegLiveness: true
body: |
; CHECK-DEFAULT-LABEL: name: load_in_loop_not_immediate_pred
; CHECK-DEFAULT: bb.0:
; CHECK-DEFAULT-NEXT: successors: %bb.1(0x80000000)
; CHECK-DEFAULT-NEXT: liveins: $x0, $w1, $w2
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: [[COPY:%[0-9]+]]:gpr64common = COPY $x0
; CHECK-DEFAULT-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
; CHECK-DEFAULT-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $w2
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: bb.1:
; CHECK-DEFAULT-NEXT: successors: %bb.2(0x80000000)
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: [[LDRWui:%[0-9]+]]:gpr32common = LDRWui [[COPY]], 0 :: (load (s32))
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: bb.2:
; CHECK-DEFAULT-NEXT: successors: %bb.3(0x40000000), %bb.4(0x40000000)
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: [[ADDWri:%[0-9]+]]:gpr32common = ADDWri [[LDRWui]], 1, 0
; CHECK-DEFAULT-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[ADDWri]], 100, 0, implicit-def $nzcv
; CHECK-DEFAULT-NEXT: Bcc 12, %bb.4, implicit $nzcv
; CHECK-DEFAULT-NEXT: B %bb.3
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: bb.3:
; CHECK-DEFAULT-NEXT: successors: %bb.4(0x80000000)
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: [[MADDWrrr:%[0-9]+]]:gpr32 = MADDWrrr [[COPY1]], [[COPY2]], $wzr
; CHECK-DEFAULT-NEXT: [[MADDWrrr1:%[0-9]+]]:gpr32 = MADDWrrr [[MADDWrrr]], [[COPY1]], $wzr
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: bb.4:
; CHECK-DEFAULT-NEXT: successors: %bb.1(0x7c000000), %bb.5(0x04000000)
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: [[PHI:%[0-9]+]]:gpr32sp = PHI [[COPY1]], %bb.2, [[MADDWrrr1]], %bb.3
; CHECK-DEFAULT-NEXT: [[SUBSWri1:%[0-9]+]]:gpr32 = SUBSWri [[PHI]], 0, 0, implicit-def $nzcv
; CHECK-DEFAULT-NEXT: Bcc 12, %bb.1, implicit $nzcv
; CHECK-DEFAULT-NEXT: B %bb.5
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: bb.5:
; CHECK-DEFAULT-NEXT: $w0 = COPY [[PHI]]
; CHECK-DEFAULT-NEXT: RET_ReallyLR implicit $w0
;
; CHECK-DATA-DEPENDENT-LABEL: name: load_in_loop_not_immediate_pred
; CHECK-DATA-DEPENDENT: bb.0:
; CHECK-DATA-DEPENDENT-NEXT: successors: %bb.1(0x80000000)
; CHECK-DATA-DEPENDENT-NEXT: liveins: $x0, $w1, $w2
; CHECK-DATA-DEPENDENT-NEXT: {{ $}}
; CHECK-DATA-DEPENDENT-NEXT: [[COPY:%[0-9]+]]:gpr64common = COPY $x0
; CHECK-DATA-DEPENDENT-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
; CHECK-DATA-DEPENDENT-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $w2
; CHECK-DATA-DEPENDENT-NEXT: {{ $}}
; CHECK-DATA-DEPENDENT-NEXT: bb.1:
; CHECK-DATA-DEPENDENT-NEXT: successors: %bb.2(0x80000000)
; CHECK-DATA-DEPENDENT-NEXT: {{ $}}
; CHECK-DATA-DEPENDENT-NEXT: [[LDRWui:%[0-9]+]]:gpr32common = LDRWui [[COPY]], 0 :: (load (s32))
; CHECK-DATA-DEPENDENT-NEXT: {{ $}}
; CHECK-DATA-DEPENDENT-NEXT: bb.2:
; CHECK-DATA-DEPENDENT-NEXT: successors: %bb.1(0x7c000000), %bb.5(0x04000000)
; CHECK-DATA-DEPENDENT-NEXT: {{ $}}
; CHECK-DATA-DEPENDENT-NEXT: [[ADDWri:%[0-9]+]]:gpr32common = ADDWri [[LDRWui]], 1, 0
; CHECK-DATA-DEPENDENT-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[ADDWri]], 100, 0, implicit-def $nzcv
; CHECK-DATA-DEPENDENT-NEXT: [[MADDWrrr:%[0-9]+]]:gpr32 = MADDWrrr [[COPY1]], [[COPY2]], $wzr
; CHECK-DATA-DEPENDENT-NEXT: [[MADDWrrr1:%[0-9]+]]:gpr32 = MADDWrrr [[MADDWrrr]], [[COPY1]], $wzr
; CHECK-DATA-DEPENDENT-NEXT: [[CSELWr:%[0-9]+]]:gpr32common = CSELWr [[COPY1]], [[MADDWrrr1]], 12, implicit $nzcv
; CHECK-DATA-DEPENDENT-NEXT: [[SUBSWri1:%[0-9]+]]:gpr32 = SUBSWri [[CSELWr]], 0, 0, implicit-def $nzcv
; CHECK-DATA-DEPENDENT-NEXT: Bcc 12, %bb.1, implicit $nzcv
; CHECK-DATA-DEPENDENT-NEXT: B %bb.5
; CHECK-DATA-DEPENDENT-NEXT: {{ $}}
; CHECK-DATA-DEPENDENT-NEXT: bb.5:
; CHECK-DATA-DEPENDENT-NEXT: $w0 = COPY [[CSELWr]]
; CHECK-DATA-DEPENDENT-NEXT: RET_ReallyLR implicit $w0
bb.0:
successors: %bb.1(0x80000000)
liveins: $x0, $w1, $w2
%0:gpr64common = COPY $x0
%1:gpr32 = COPY $w1
%2:gpr32 = COPY $w2
bb.1:
successors: %bb.2(0x80000000)
%3:gpr32common = LDRWui %0, 0 :: (load (s32))
bb.2:
successors: %bb.3(0x40000000), %bb.4(0x40000000)
%4:gpr32common = ADDWri %3, 1, 0
%5:gpr32 = SUBSWri %4, 100, 0, implicit-def $nzcv
Bcc 12, %bb.4, implicit $nzcv
B %bb.3
bb.3:
successors: %bb.4(0x80000000)
%6:gpr32 = MADDWrrr %1, %2, $wzr
%7:gpr32 = MADDWrrr %6, %1, $wzr
bb.4:
successors: %bb.1(0x7c000000), %bb.5(0x04000000)
%8:gpr32sp = PHI %1, %bb.2, %7, %bb.3
%9:gpr32 = SUBSWri %8, 0, 0, implicit-def $nzcv
Bcc 12, %bb.1, implicit $nzcv
B %bb.5
bb.5:
$w0 = COPY %8
RET_ReallyLR implicit $w0
...
---
name: load_in_loop_call_in_intermediate_block
alignment: 4
tracksRegLiveness: true
body: |
; CHECK-COMMON-LABEL: name: load_in_loop_call_in_intermediate_block
; CHECK-COMMON: bb.0:
; CHECK-COMMON-NEXT: successors: %bb.1(0x80000000)
; CHECK-COMMON-NEXT: liveins: $x0, $w1, $w2
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[COPY:%[0-9]+]]:gpr64common = COPY $x0
; CHECK-COMMON-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
; CHECK-COMMON-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $w2
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.1:
; CHECK-COMMON-NEXT: successors: %bb.2(0x80000000)
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[LDRWui:%[0-9]+]]:gpr32common = LDRWui [[COPY]], 0 :: (load (s32))
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.2:
; CHECK-COMMON-NEXT: successors: %bb.3(0x80000000)
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: BL &foo, implicit-def $lr
; CHECK-COMMON-NEXT: [[ADDWri:%[0-9]+]]:gpr32common = ADDWri [[LDRWui]], 1, 0
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.3:
; CHECK-COMMON-NEXT: successors: %bb.4(0x40000000), %bb.5(0x40000000)
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[ADDWri]], 100, 0, implicit-def $nzcv
; CHECK-COMMON-NEXT: Bcc 12, %bb.5, implicit $nzcv
; CHECK-COMMON-NEXT: B %bb.4
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.4:
; CHECK-COMMON-NEXT: successors: %bb.5(0x80000000)
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[MADDWrrr:%[0-9]+]]:gpr32 = MADDWrrr [[COPY1]], [[COPY2]], $wzr
; CHECK-COMMON-NEXT: [[MADDWrrr1:%[0-9]+]]:gpr32 = MADDWrrr [[MADDWrrr]], [[COPY1]], $wzr
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.5:
; CHECK-COMMON-NEXT: successors: %bb.1(0x7c000000), %bb.6(0x04000000)
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[PHI:%[0-9]+]]:gpr32sp = PHI [[COPY1]], %bb.3, [[MADDWrrr1]], %bb.4
; CHECK-COMMON-NEXT: [[SUBSWri1:%[0-9]+]]:gpr32 = SUBSWri [[PHI]], 0, 0, implicit-def $nzcv
; CHECK-COMMON-NEXT: Bcc 12, %bb.1, implicit $nzcv
; CHECK-COMMON-NEXT: B %bb.6
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.6:
; CHECK-COMMON-NEXT: $w0 = COPY [[PHI]]
; CHECK-COMMON-NEXT: RET_ReallyLR implicit $w0
bb.0:
successors: %bb.1(0x80000000)
liveins: $x0, $w1, $w2
%0:gpr64common = COPY $x0
%1:gpr32 = COPY $w1
%2:gpr32 = COPY $w2
bb.1:
successors: %bb.2(0x80000000)
%3:gpr32common = LDRWui %0, 0 :: (load (s32))
bb.2:
successors: %bb.3(0x80000000)
BL &foo, implicit-def $lr
%4:gpr32common = ADDWri %3, 1, 0
bb.3:
successors: %bb.4(0x40000000), %bb.5(0x40000000)
%5:gpr32 = SUBSWri %4, 100, 0, implicit-def $nzcv
Bcc 12, %bb.5, implicit $nzcv
B %bb.4
bb.4:
successors: %bb.5(0x80000000)
%6:gpr32 = MADDWrrr %1, %2, $wzr
%7:gpr32 = MADDWrrr %6, %1, $wzr
bb.5:
successors: %bb.1(0x7c000000), %bb.6(0x04000000)
%8:gpr32sp = PHI %1, %bb.3, %7, %bb.4
%9:gpr32 = SUBSWri %8, 0, 0, implicit-def $nzcv
Bcc 12, %bb.1, implicit $nzcv
B %bb.6
bb.6:
$w0 = COPY %8
RET_ReallyLR implicit $w0
...
---
name: load_to_cond_in_backedge
alignment: 4
tracksRegLiveness: true
registers:
- { id: 0, class: gpr64sp }
- { id: 1, class: gpr32 }
- { id: 2, class: gpr32 }
- { id: 3, class: gpr64 }
- { id: 4, class: gpr32 }
- { id: 5, class: gpr32all }
- { id: 6, class: gpr32 }
body: |
; CHECK-COMMON-LABEL: name: load_to_cond_in_backedge
; CHECK-COMMON: bb.0:
; CHECK-COMMON-NEXT: successors: %bb.1(0x80000000)
; CHECK-COMMON-NEXT: liveins: $x0
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
; CHECK-COMMON-NEXT: [[DEF:%[0-9]+]]:gpr32 = IMPLICIT_DEF
; CHECK-COMMON-NEXT: B %bb.1
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.1:
; CHECK-COMMON-NEXT: successors: %bb.5(0x04000000), %bb.1(0x7c000000)
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[PHI:%[0-9]+]]:gpr32 = PHI undef [[DEF]], %bb.0, %5, %bb.1
; CHECK-COMMON-NEXT: [[LDRHHroW:%[0-9]+]]:gpr32 = LDRHHroW undef [[COPY]], undef [[PHI]], 0, 1 :: (load (s16))
; CHECK-COMMON-NEXT: [[COPY1:%[0-9]+]]:gpr32all = COPY [[LDRHHroW]]
; CHECK-COMMON-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY [[COPY1]]
; CHECK-COMMON-NEXT: Bcc 1, %bb.1, implicit undef $nzcv
; CHECK-COMMON-NEXT: B %bb.5
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.5:
; CHECK-COMMON-NEXT: RET_ReallyLR
bb.0:
successors: %bb.1(0x80000000)
liveins: $x0
%0:gpr64sp = COPY $x0
%1:gpr32 = IMPLICIT_DEF
B %bb.1
bb.1:
successors: %bb.2(0x40000000), %bb.3(0x40000000)
%2:gpr32 = PHI undef %1, %bb.0, %5, %bb.4
%4:gpr32 = LDRHHroW undef %0, undef %2, 0, 1 :: (load (s16))
%5:gpr32all = COPY %4
TBNZW undef %2, 0, %bb.3
B %bb.2
bb.2:
successors: %bb.4(0x80000000)
B %bb.4
bb.3:
successors: %bb.4(0x80000000)
bb.4:
successors: %bb.5(0x04000000), %bb.1(0x7c000000)
%6:gpr32 = PHI undef %5, %bb.3, undef %5, %bb.2
Bcc 1, %bb.1, implicit undef $nzcv
B %bb.5
bb.5:
RET_ReallyLR
...
---
name: load_in_pred_call_in_empty_intermediate_block
alignment: 4
tracksRegLiveness: true
body: |
; CHECK-COMMON-LABEL: name: load_in_pred_call_in_empty_intermediate_block
; CHECK-COMMON: bb.0:
; CHECK-COMMON-NEXT: successors: %bb.1(0x80000000)
; CHECK-COMMON-NEXT: liveins: $x0, $w1, $w2
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[COPY:%[0-9]+]]:gpr64common = COPY $x0
; CHECK-COMMON-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
; CHECK-COMMON-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $w2
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.1:
; CHECK-COMMON-NEXT: successors: %bb.2(0x80000000)
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[LDRWui:%[0-9]+]]:gpr32common = LDRWui [[COPY]], 0 :: (load (s32))
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.2:
; CHECK-COMMON-NEXT: successors: %bb.3(0x80000000)
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: BL &foo, implicit-def $lr
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.3:
; CHECK-COMMON-NEXT: successors: %bb.4(0x40000000), %bb.5(0x40000000)
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[ADDWri:%[0-9]+]]:gpr32common = ADDWri [[LDRWui]], 1, 0
; CHECK-COMMON-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[ADDWri]], 100, 0, implicit-def $nzcv
; CHECK-COMMON-NEXT: Bcc 12, %bb.5, implicit $nzcv
; CHECK-COMMON-NEXT: B %bb.4
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.4:
; CHECK-COMMON-NEXT: successors: %bb.5(0x80000000)
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[MADDWrrr:%[0-9]+]]:gpr32 = MADDWrrr [[COPY1]], [[COPY2]], $wzr
; CHECK-COMMON-NEXT: [[MADDWrrr1:%[0-9]+]]:gpr32 = MADDWrrr [[MADDWrrr]], [[COPY1]], $wzr
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.5:
; CHECK-COMMON-NEXT: successors: %bb.6(0x80000000)
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[PHI:%[0-9]+]]:gpr32sp = PHI [[COPY1]], %bb.3, [[MADDWrrr1]], %bb.4
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.6:
; CHECK-COMMON-NEXT: $w0 = COPY [[PHI]]
; CHECK-COMMON-NEXT: RET_ReallyLR implicit $w0
bb.0:
successors: %bb.1(0x80000000)
liveins: $x0, $w1, $w2
%0:gpr64common = COPY $x0
%1:gpr32 = COPY $w1
%2:gpr32 = COPY $w2
bb.1:
successors: %bb.2(0x80000000)
%3:gpr32common = LDRWui %0, 0 :: (load (s32))
bb.2:
successors: %bb.3(0x80000000)
BL &foo, implicit-def $lr
bb.3:
successors: %bb.4(0x40000000), %bb.5(0x40000000)
%4:gpr32common = ADDWri %3, 1, 0
%5:gpr32 = SUBSWri %4, 100, 0, implicit-def $nzcv
Bcc 12, %bb.5, implicit $nzcv
B %bb.4
bb.4:
successors: %bb.5(0x80000000)
%6:gpr32 = MADDWrrr %1, %2, $wzr
%7:gpr32 = MADDWrrr %6, %1, $wzr
bb.5:
successors: %bb.6(0x80000000)
%8:gpr32sp = PHI %1, %bb.3, %7, %bb.4
bb.6:
$w0 = COPY %8
RET_ReallyLR implicit $w0
...
---
name: load_in_pred_diamond_call_in_one_arm
alignment: 4
tracksRegLiveness: true
body: |
; CHECK-COMMON-LABEL: name: load_in_pred_diamond_call_in_one_arm
; CHECK-COMMON: bb.0:
; CHECK-COMMON-NEXT: successors: %bb.1(0x80000000)
; CHECK-COMMON-NEXT: liveins: $x0, $w1, $w2
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[COPY:%[0-9]+]]:gpr64common = COPY $x0
; CHECK-COMMON-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
; CHECK-COMMON-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $w2
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.1:
; CHECK-COMMON-NEXT: successors: %bb.2(0x40000000), %bb.3(0x40000000)
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[LDRWui:%[0-9]+]]:gpr32common = LDRWui [[COPY]], 0 :: (load (s32))
; CHECK-COMMON-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[LDRWui]], 0, 0, implicit-def $nzcv
; CHECK-COMMON-NEXT: Bcc 0, %bb.2, implicit $nzcv
; CHECK-COMMON-NEXT: B %bb.3
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.2:
; CHECK-COMMON-NEXT: successors: %bb.4(0x80000000)
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: BL &foo, implicit-def $lr
; CHECK-COMMON-NEXT: B %bb.4
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.3:
; CHECK-COMMON-NEXT: successors: %bb.4(0x80000000)
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: B %bb.4
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.4:
; CHECK-COMMON-NEXT: successors: %bb.5(0x40000000), %bb.6(0x40000000)
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[ADDWri:%[0-9]+]]:gpr32common = ADDWri [[LDRWui]], 1, 0
; CHECK-COMMON-NEXT: [[SUBSWri1:%[0-9]+]]:gpr32 = SUBSWri [[ADDWri]], 100, 0, implicit-def $nzcv
; CHECK-COMMON-NEXT: Bcc 12, %bb.6, implicit $nzcv
; CHECK-COMMON-NEXT: B %bb.5
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.5:
; CHECK-COMMON-NEXT: successors: %bb.6(0x80000000)
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[MADDWrrr:%[0-9]+]]:gpr32 = MADDWrrr [[COPY1]], [[COPY2]], $wzr
; CHECK-COMMON-NEXT: [[MADDWrrr1:%[0-9]+]]:gpr32 = MADDWrrr [[MADDWrrr]], [[COPY1]], $wzr
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.6:
; CHECK-COMMON-NEXT: [[PHI:%[0-9]+]]:gpr32 = PHI [[COPY1]], %bb.4, [[MADDWrrr1]], %bb.5
; CHECK-COMMON-NEXT: $w0 = COPY [[PHI]]
; CHECK-COMMON-NEXT: RET_ReallyLR implicit $w0
bb.0:
successors: %bb.1(0x80000000)
liveins: $x0, $w1, $w2
%0:gpr64common = COPY $x0
%1:gpr32 = COPY $w1
%2:gpr32 = COPY $w2
bb.1:
successors: %bb.2(0x40000000), %bb.3(0x40000000)
%3:gpr32common = LDRWui %0, 0 :: (load (s32))
%10:gpr32 = SUBSWri %3, 0, 0, implicit-def $nzcv
Bcc 0, %bb.2, implicit $nzcv
B %bb.3
bb.2:
successors: %bb.4(0x80000000)
BL &foo, implicit-def $lr
B %bb.4
bb.3:
successors: %bb.4(0x80000000)
B %bb.4
bb.4:
successors: %bb.5(0x40000000), %bb.6(0x40000000)
%4:gpr32common = ADDWri %3, 1, 0
%5:gpr32 = SUBSWri %4, 100, 0, implicit-def $nzcv
Bcc 12, %bb.6, implicit $nzcv
B %bb.5
bb.5:
successors: %bb.6(0x80000000)
%6:gpr32 = MADDWrrr %1, %2, $wzr
%7:gpr32 = MADDWrrr %6, %1, $wzr
bb.6:
%8:gpr32 = PHI %1, %bb.4, %7, %bb.5
$w0 = COPY %8
RET_ReallyLR implicit $w0
...
---
name: load_in_pred_call_on_unreachable_path
alignment: 4
tracksRegLiveness: true
body: |
; CHECK-DEFAULT-LABEL: name: load_in_pred_call_on_unreachable_path
; CHECK-DEFAULT: bb.0:
; CHECK-DEFAULT-NEXT: successors: %bb.1(0x80000000)
; CHECK-DEFAULT-NEXT: liveins: $x0, $w1, $w2
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: [[COPY:%[0-9]+]]:gpr64common = COPY $x0
; CHECK-DEFAULT-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
; CHECK-DEFAULT-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $w2
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: bb.1:
; CHECK-DEFAULT-NEXT: successors: %bb.2(0x40000000), %bb.3(0x40000000)
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: [[LDRWui:%[0-9]+]]:gpr32common = LDRWui [[COPY]], 0 :: (load (s32))
; CHECK-DEFAULT-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[LDRWui]], 0, 0, implicit-def $nzcv
; CHECK-DEFAULT-NEXT: Bcc 0, %bb.2, implicit $nzcv
; CHECK-DEFAULT-NEXT: B %bb.3
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: bb.2:
; CHECK-DEFAULT-NEXT: successors:
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: BL &foo, implicit-def $lr
; CHECK-DEFAULT-NEXT: BRK 1
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: bb.3:
; CHECK-DEFAULT-NEXT: successors: %bb.4(0x40000000), %bb.5(0x40000000)
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: [[ADDWri:%[0-9]+]]:gpr32common = ADDWri [[LDRWui]], 1, 0
; CHECK-DEFAULT-NEXT: [[SUBSWri1:%[0-9]+]]:gpr32 = SUBSWri [[ADDWri]], 100, 0, implicit-def $nzcv
; CHECK-DEFAULT-NEXT: Bcc 12, %bb.5, implicit $nzcv
; CHECK-DEFAULT-NEXT: B %bb.4
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: bb.4:
; CHECK-DEFAULT-NEXT: successors: %bb.5(0x80000000)
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: [[MADDWrrr:%[0-9]+]]:gpr32 = MADDWrrr [[COPY1]], [[COPY2]], $wzr
; CHECK-DEFAULT-NEXT: [[MADDWrrr1:%[0-9]+]]:gpr32 = MADDWrrr [[MADDWrrr]], [[COPY1]], $wzr
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: bb.5:
; CHECK-DEFAULT-NEXT: [[PHI:%[0-9]+]]:gpr32 = PHI [[COPY1]], %bb.3, [[MADDWrrr1]], %bb.4
; CHECK-DEFAULT-NEXT: $w0 = COPY [[PHI]]
; CHECK-DEFAULT-NEXT: RET_ReallyLR implicit $w0
;
; CHECK-DATA-DEPENDENT-LABEL: name: load_in_pred_call_on_unreachable_path
; CHECK-DATA-DEPENDENT: bb.0:
; CHECK-DATA-DEPENDENT-NEXT: successors: %bb.1(0x80000000)
; CHECK-DATA-DEPENDENT-NEXT: liveins: $x0, $w1, $w2
; CHECK-DATA-DEPENDENT-NEXT: {{ $}}
; CHECK-DATA-DEPENDENT-NEXT: [[COPY:%[0-9]+]]:gpr64common = COPY $x0
; CHECK-DATA-DEPENDENT-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
; CHECK-DATA-DEPENDENT-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $w2
; CHECK-DATA-DEPENDENT-NEXT: {{ $}}
; CHECK-DATA-DEPENDENT-NEXT: bb.1:
; CHECK-DATA-DEPENDENT-NEXT: successors: %bb.2(0x40000000), %bb.3(0x40000000)
; CHECK-DATA-DEPENDENT-NEXT: {{ $}}
; CHECK-DATA-DEPENDENT-NEXT: [[LDRWui:%[0-9]+]]:gpr32common = LDRWui [[COPY]], 0 :: (load (s32))
; CHECK-DATA-DEPENDENT-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[LDRWui]], 0, 0, implicit-def $nzcv
; CHECK-DATA-DEPENDENT-NEXT: Bcc 0, %bb.2, implicit $nzcv
; CHECK-DATA-DEPENDENT-NEXT: B %bb.3
; CHECK-DATA-DEPENDENT-NEXT: {{ $}}
; CHECK-DATA-DEPENDENT-NEXT: bb.2:
; CHECK-DATA-DEPENDENT-NEXT: successors:
; CHECK-DATA-DEPENDENT-NEXT: {{ $}}
; CHECK-DATA-DEPENDENT-NEXT: BL &foo, implicit-def $lr
; CHECK-DATA-DEPENDENT-NEXT: BRK 1
; CHECK-DATA-DEPENDENT-NEXT: {{ $}}
; CHECK-DATA-DEPENDENT-NEXT: bb.3:
; CHECK-DATA-DEPENDENT-NEXT: [[ADDWri:%[0-9]+]]:gpr32common = ADDWri [[LDRWui]], 1, 0
; CHECK-DATA-DEPENDENT-NEXT: [[SUBSWri1:%[0-9]+]]:gpr32 = SUBSWri [[ADDWri]], 100, 0, implicit-def $nzcv
; CHECK-DATA-DEPENDENT-NEXT: [[MADDWrrr:%[0-9]+]]:gpr32 = MADDWrrr [[COPY1]], [[COPY2]], $wzr
; CHECK-DATA-DEPENDENT-NEXT: [[MADDWrrr1:%[0-9]+]]:gpr32 = MADDWrrr [[MADDWrrr]], [[COPY1]], $wzr
; CHECK-DATA-DEPENDENT-NEXT: [[CSELWr:%[0-9]+]]:gpr32 = CSELWr [[COPY1]], [[MADDWrrr1]], 12, implicit $nzcv
; CHECK-DATA-DEPENDENT-NEXT: $w0 = COPY [[CSELWr]]
; CHECK-DATA-DEPENDENT-NEXT: RET_ReallyLR implicit $w0
bb.0:
successors: %bb.1(0x80000000)
liveins: $x0, $w1, $w2
%0:gpr64common = COPY $x0
%1:gpr32 = COPY $w1
%2:gpr32 = COPY $w2
bb.1:
successors: %bb.2(0x40000000), %bb.3(0x40000000)
%3:gpr32common = LDRWui %0, 0 :: (load (s32))
%10:gpr32 = SUBSWri %3, 0, 0, implicit-def $nzcv
Bcc 0, %bb.2, implicit $nzcv
B %bb.3
bb.2:
successors:
BL &foo, implicit-def $lr
BRK 1
bb.3:
successors: %bb.4(0x40000000), %bb.5(0x40000000)
%4:gpr32common = ADDWri %3, 1, 0
%5:gpr32 = SUBSWri %4, 100, 0, implicit-def $nzcv
Bcc 12, %bb.5, implicit $nzcv
B %bb.4
bb.4:
successors: %bb.5(0x80000000)
%6:gpr32 = MADDWrrr %1, %2, $wzr
%7:gpr32 = MADDWrrr %6, %1, $wzr
bb.5:
%8:gpr32 = PHI %1, %bb.3, %7, %bb.4
$w0 = COPY %8
RET_ReallyLR implicit $w0
...
---
name: call_in_block_with_early_exit_before_condition
alignment: 4
tracksRegLiveness: true
body: |
; CHECK-COMMON-LABEL: name: call_in_block_with_early_exit_before_condition
; CHECK-COMMON: bb.0:
; CHECK-COMMON-NEXT: successors: %bb.1(0x80000000)
; CHECK-COMMON-NEXT: liveins: $x0, $w1, $w2
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[COPY:%[0-9]+]]:gpr64common = COPY $x0
; CHECK-COMMON-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
; CHECK-COMMON-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $w2
; CHECK-COMMON-NEXT: [[LDRWui:%[0-9]+]]:gpr32common = LDRWui [[COPY]], 0 :: (load (s32))
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.1:
; CHECK-COMMON-NEXT: successors: %bb.2(0x40000000), %bb.3(0x40000000)
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: BL &foo, implicit-def $lr
; CHECK-COMMON-NEXT: [[SUBSWrr:%[0-9]+]]:gpr32 = SUBSWrr [[COPY1]], [[COPY2]], implicit-def $nzcv
; CHECK-COMMON-NEXT: Bcc 0, %bb.2, implicit $nzcv
; CHECK-COMMON-NEXT: B %bb.3
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.2:
; CHECK-COMMON-NEXT: $w0 = COPY [[COPY1]]
; CHECK-COMMON-NEXT: RET_ReallyLR implicit $w0
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.3:
; CHECK-COMMON-NEXT: successors: %bb.4(0x40000000), %bb.5(0x40000000)
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[ADDWri:%[0-9]+]]:gpr32common = ADDWri [[LDRWui]], 1, 0
; CHECK-COMMON-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[ADDWri]], 100, 0, implicit-def $nzcv
; CHECK-COMMON-NEXT: Bcc 12, %bb.5, implicit $nzcv
; CHECK-COMMON-NEXT: B %bb.4
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.4:
; CHECK-COMMON-NEXT: successors: %bb.5(0x80000000)
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[MADDWrrr:%[0-9]+]]:gpr32 = MADDWrrr [[COPY1]], [[COPY2]], $wzr
; CHECK-COMMON-NEXT: [[MADDWrrr1:%[0-9]+]]:gpr32 = MADDWrrr [[MADDWrrr]], [[COPY1]], $wzr
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.5:
; CHECK-COMMON-NEXT: [[PHI:%[0-9]+]]:gpr32 = PHI [[COPY1]], %bb.3, [[MADDWrrr1]], %bb.4
; CHECK-COMMON-NEXT: $w0 = COPY [[PHI]]
; CHECK-COMMON-NEXT: RET_ReallyLR implicit $w0
bb.0:
successors: %bb.1(0x80000000)
liveins: $x0, $w1, $w2
%0:gpr64common = COPY $x0
%1:gpr32 = COPY $w1
%2:gpr32 = COPY $w2
%3:gpr32common = LDRWui %0, 0 :: (load (s32))
bb.1:
successors: %bb.2(0x40000000), %bb.3(0x40000000)
BL &foo, implicit-def $lr
%10:gpr32 = SUBSWrr %1, %2, implicit-def $nzcv
Bcc 0, %bb.2, implicit $nzcv
B %bb.3
bb.2:
$w0 = COPY %1
RET_ReallyLR implicit $w0
bb.3:
successors: %bb.4(0x40000000), %bb.5(0x40000000)
%4:gpr32common = ADDWri %3, 1, 0
%5:gpr32 = SUBSWri %4, 100, 0, implicit-def $nzcv
Bcc 12, %bb.5, implicit $nzcv
B %bb.4
bb.4:
successors: %bb.5(0x80000000)
%6:gpr32 = MADDWrrr %1, %2, $wzr
%7:gpr32 = MADDWrrr %6, %1, $wzr
bb.5:
%8:gpr32 = PHI %1, %bb.3, %7, %bb.4
$w0 = COPY %8
RET_ReallyLR implicit $w0
...
---
name: call_in_block_before_load
alignment: 4
tracksRegLiveness: true
body: |
; CHECK-DEFAULT-LABEL: name: call_in_block_before_load
; CHECK-DEFAULT: bb.0:
; CHECK-DEFAULT-NEXT: successors: %bb.1(0x80000000)
; CHECK-DEFAULT-NEXT: liveins: $x0, $w1, $w2
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: [[COPY:%[0-9]+]]:gpr64common = COPY $x0
; CHECK-DEFAULT-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
; CHECK-DEFAULT-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $w2
; CHECK-DEFAULT-NEXT: BL &foo, implicit-def $lr
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: bb.1:
; CHECK-DEFAULT-NEXT: successors: %bb.2(0x80000000)
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: [[LDRWui:%[0-9]+]]:gpr32common = LDRWui [[COPY]], 0 :: (load (s32))
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: bb.2:
; CHECK-DEFAULT-NEXT: successors: %bb.3(0x40000000), %bb.4(0x40000000)
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[LDRWui]], 100, 0, implicit-def $nzcv
; CHECK-DEFAULT-NEXT: Bcc 12, %bb.4, implicit $nzcv
; CHECK-DEFAULT-NEXT: B %bb.3
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: bb.3:
; CHECK-DEFAULT-NEXT: successors: %bb.4(0x80000000)
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: [[MADDWrrr:%[0-9]+]]:gpr32 = MADDWrrr [[COPY1]], [[COPY2]], $wzr
; CHECK-DEFAULT-NEXT: [[MADDWrrr1:%[0-9]+]]:gpr32 = MADDWrrr [[MADDWrrr]], [[COPY1]], $wzr
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: bb.4:
; CHECK-DEFAULT-NEXT: [[PHI:%[0-9]+]]:gpr32 = PHI [[COPY1]], %bb.2, [[MADDWrrr1]], %bb.3
; CHECK-DEFAULT-NEXT: $w0 = COPY [[PHI]]
; CHECK-DEFAULT-NEXT: RET_ReallyLR implicit $w0
;
; CHECK-DATA-DEPENDENT-LABEL: name: call_in_block_before_load
; CHECK-DATA-DEPENDENT: bb.0:
; CHECK-DATA-DEPENDENT-NEXT: successors: %bb.1(0x80000000)
; CHECK-DATA-DEPENDENT-NEXT: liveins: $x0, $w1, $w2
; CHECK-DATA-DEPENDENT-NEXT: {{ $}}
; CHECK-DATA-DEPENDENT-NEXT: [[COPY:%[0-9]+]]:gpr64common = COPY $x0
; CHECK-DATA-DEPENDENT-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
; CHECK-DATA-DEPENDENT-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $w2
; CHECK-DATA-DEPENDENT-NEXT: BL &foo, implicit-def $lr
; CHECK-DATA-DEPENDENT-NEXT: {{ $}}
; CHECK-DATA-DEPENDENT-NEXT: bb.1:
; CHECK-DATA-DEPENDENT-NEXT: successors: %bb.2(0x80000000)
; CHECK-DATA-DEPENDENT-NEXT: {{ $}}
; CHECK-DATA-DEPENDENT-NEXT: [[LDRWui:%[0-9]+]]:gpr32common = LDRWui [[COPY]], 0 :: (load (s32))
; CHECK-DATA-DEPENDENT-NEXT: {{ $}}
; CHECK-DATA-DEPENDENT-NEXT: bb.2:
; CHECK-DATA-DEPENDENT-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[LDRWui]], 100, 0, implicit-def $nzcv
; CHECK-DATA-DEPENDENT-NEXT: [[MADDWrrr:%[0-9]+]]:gpr32 = MADDWrrr [[COPY1]], [[COPY2]], $wzr
; CHECK-DATA-DEPENDENT-NEXT: [[MADDWrrr1:%[0-9]+]]:gpr32 = MADDWrrr [[MADDWrrr]], [[COPY1]], $wzr
; CHECK-DATA-DEPENDENT-NEXT: [[CSELWr:%[0-9]+]]:gpr32 = CSELWr [[COPY1]], [[MADDWrrr1]], 12, implicit $nzcv
; CHECK-DATA-DEPENDENT-NEXT: $w0 = COPY [[CSELWr]]
; CHECK-DATA-DEPENDENT-NEXT: RET_ReallyLR implicit $w0
bb.0:
successors: %bb.1(0x80000000)
liveins: $x0, $w1, $w2
%0:gpr64common = COPY $x0
%1:gpr32 = COPY $w1
%2:gpr32 = COPY $w2
BL &foo, implicit-def $lr
bb.1:
successors: %bb.2(0x80000000)
%3:gpr32common = LDRWui %0, 0 :: (load (s32))
bb.2:
successors: %bb.3(0x40000000), %bb.4(0x40000000)
%4:gpr32 = SUBSWri %3, 100, 0, implicit-def $nzcv
Bcc 12, %bb.4, implicit $nzcv
B %bb.3
bb.3:
successors: %bb.4(0x80000000)
%5:gpr32 = MADDWrrr %1, %2, $wzr
%6:gpr32 = MADDWrrr %5, %1, $wzr
bb.4:
%7:gpr32 = PHI %1, %bb.2, %6, %bb.3
$w0 = COPY %7
RET_ReallyLR implicit $w0
...
---
name: load_in_pred_call_in_block_behind_load
alignment: 4
tracksRegLiveness: true
body: |
; CHECK-DEFAULT-LABEL: name: load_in_pred_call_in_block_behind_load
; CHECK-DEFAULT: bb.0:
; CHECK-DEFAULT-NEXT: successors: %bb.1(0x80000000)
; CHECK-DEFAULT-NEXT: liveins: $x0, $w1, $w2
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: [[COPY:%[0-9]+]]:gpr64common = COPY $x0
; CHECK-DEFAULT-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
; CHECK-DEFAULT-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $w2
; CHECK-DEFAULT-NEXT: B %bb.1
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: bb.1:
; CHECK-DEFAULT-NEXT: successors: %bb.2(0x80000000)
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: B %bb.2
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: bb.2:
; CHECK-DEFAULT-NEXT: successors: %bb.3(0x40000000), %bb.4(0x40000000)
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: [[LDRWui:%[0-9]+]]:gpr32common = LDRWui [[COPY]], 0 :: (load (s32))
; CHECK-DEFAULT-NEXT: [[SUBSWrr:%[0-9]+]]:gpr32 = SUBSWrr [[COPY1]], [[COPY2]], implicit-def $nzcv
; CHECK-DEFAULT-NEXT: Bcc 0, %bb.3, implicit $nzcv
; CHECK-DEFAULT-NEXT: B %bb.4
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: bb.3:
; CHECK-DEFAULT-NEXT: successors: %bb.1(0x80000000)
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: BL &foo, implicit-def $lr
; CHECK-DEFAULT-NEXT: B %bb.1
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: bb.4:
; CHECK-DEFAULT-NEXT: successors: %bb.5(0x40000000), %bb.6(0x40000000)
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: [[ADDWri:%[0-9]+]]:gpr32common = ADDWri [[LDRWui]], 1, 0
; CHECK-DEFAULT-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[ADDWri]], 100, 0, implicit-def $nzcv
; CHECK-DEFAULT-NEXT: Bcc 12, %bb.6, implicit $nzcv
; CHECK-DEFAULT-NEXT: B %bb.5
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: bb.5:
; CHECK-DEFAULT-NEXT: successors: %bb.6(0x80000000)
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: [[MADDWrrr:%[0-9]+]]:gpr32 = MADDWrrr [[COPY1]], [[COPY2]], $wzr
; CHECK-DEFAULT-NEXT: [[MADDWrrr1:%[0-9]+]]:gpr32 = MADDWrrr [[MADDWrrr]], [[COPY1]], $wzr
; CHECK-DEFAULT-NEXT: {{ $}}
; CHECK-DEFAULT-NEXT: bb.6:
; CHECK-DEFAULT-NEXT: [[PHI:%[0-9]+]]:gpr32 = PHI [[COPY1]], %bb.4, [[MADDWrrr1]], %bb.5
; CHECK-DEFAULT-NEXT: $w0 = COPY [[PHI]]
; CHECK-DEFAULT-NEXT: RET_ReallyLR implicit $w0
;
; CHECK-DATA-DEPENDENT-LABEL: name: load_in_pred_call_in_block_behind_load
; CHECK-DATA-DEPENDENT: bb.0:
; CHECK-DATA-DEPENDENT-NEXT: successors: %bb.1(0x80000000)
; CHECK-DATA-DEPENDENT-NEXT: liveins: $x0, $w1, $w2
; CHECK-DATA-DEPENDENT-NEXT: {{ $}}
; CHECK-DATA-DEPENDENT-NEXT: [[COPY:%[0-9]+]]:gpr64common = COPY $x0
; CHECK-DATA-DEPENDENT-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
; CHECK-DATA-DEPENDENT-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $w2
; CHECK-DATA-DEPENDENT-NEXT: B %bb.1
; CHECK-DATA-DEPENDENT-NEXT: {{ $}}
; CHECK-DATA-DEPENDENT-NEXT: bb.1:
; CHECK-DATA-DEPENDENT-NEXT: successors: %bb.2(0x80000000)
; CHECK-DATA-DEPENDENT-NEXT: {{ $}}
; CHECK-DATA-DEPENDENT-NEXT: B %bb.2
; CHECK-DATA-DEPENDENT-NEXT: {{ $}}
; CHECK-DATA-DEPENDENT-NEXT: bb.2:
; CHECK-DATA-DEPENDENT-NEXT: successors: %bb.3(0x40000000), %bb.4(0x40000000)
; CHECK-DATA-DEPENDENT-NEXT: {{ $}}
; CHECK-DATA-DEPENDENT-NEXT: [[LDRWui:%[0-9]+]]:gpr32common = LDRWui [[COPY]], 0 :: (load (s32))
; CHECK-DATA-DEPENDENT-NEXT: [[SUBSWrr:%[0-9]+]]:gpr32 = SUBSWrr [[COPY1]], [[COPY2]], implicit-def $nzcv
; CHECK-DATA-DEPENDENT-NEXT: Bcc 0, %bb.3, implicit $nzcv
; CHECK-DATA-DEPENDENT-NEXT: B %bb.4
; CHECK-DATA-DEPENDENT-NEXT: {{ $}}
; CHECK-DATA-DEPENDENT-NEXT: bb.3:
; CHECK-DATA-DEPENDENT-NEXT: successors: %bb.1(0x80000000)
; CHECK-DATA-DEPENDENT-NEXT: {{ $}}
; CHECK-DATA-DEPENDENT-NEXT: BL &foo, implicit-def $lr
; CHECK-DATA-DEPENDENT-NEXT: B %bb.1
; CHECK-DATA-DEPENDENT-NEXT: {{ $}}
; CHECK-DATA-DEPENDENT-NEXT: bb.4:
; CHECK-DATA-DEPENDENT-NEXT: [[ADDWri:%[0-9]+]]:gpr32common = ADDWri [[LDRWui]], 1, 0
; CHECK-DATA-DEPENDENT-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[ADDWri]], 100, 0, implicit-def $nzcv
; CHECK-DATA-DEPENDENT-NEXT: [[MADDWrrr:%[0-9]+]]:gpr32 = MADDWrrr [[COPY1]], [[COPY2]], $wzr
; CHECK-DATA-DEPENDENT-NEXT: [[MADDWrrr1:%[0-9]+]]:gpr32 = MADDWrrr [[MADDWrrr]], [[COPY1]], $wzr
; CHECK-DATA-DEPENDENT-NEXT: [[CSELWr:%[0-9]+]]:gpr32 = CSELWr [[COPY1]], [[MADDWrrr1]], 12, implicit $nzcv
; CHECK-DATA-DEPENDENT-NEXT: $w0 = COPY [[CSELWr]]
; CHECK-DATA-DEPENDENT-NEXT: RET_ReallyLR implicit $w0
bb.0:
successors: %bb.1(0x80000000)
liveins: $x0, $w1, $w2
%0:gpr64common = COPY $x0
%1:gpr32 = COPY $w1
%2:gpr32 = COPY $w2
B %bb.1
bb.1:
successors: %bb.2(0x80000000)
B %bb.2
bb.2:
successors: %bb.3(0x40000000), %bb.4(0x40000000)
%3:gpr32common = LDRWui %0, 0 :: (load (s32))
%10:gpr32 = SUBSWrr %1, %2, implicit-def $nzcv
Bcc 0, %bb.3, implicit $nzcv
B %bb.4
bb.3:
successors: %bb.1(0x80000000)
BL &foo, implicit-def $lr
B %bb.1
bb.4:
successors: %bb.5(0x40000000), %bb.6(0x40000000)
%4:gpr32common = ADDWri %3, 1, 0
%5:gpr32 = SUBSWri %4, 100, 0, implicit-def $nzcv
Bcc 12, %bb.6, implicit $nzcv
B %bb.5
bb.5:
successors: %bb.6(0x80000000)
%6:gpr32 = MADDWrrr %1, %2, $wzr
%7:gpr32 = MADDWrrr %6, %1, $wzr
bb.6:
%8:gpr32 = PHI %1, %bb.4, %7, %bb.5
$w0 = COPY %8
RET_ReallyLR implicit $w0
...
---
name: load_in_pred_call_in_chained_diamond_arm
alignment: 4
tracksRegLiveness: true
body: |
; CHECK-COMMON-LABEL: name: load_in_pred_call_in_chained_diamond_arm
; CHECK-COMMON: bb.0:
; CHECK-COMMON-NEXT: successors: %bb.1(0x80000000)
; CHECK-COMMON-NEXT: liveins: $x0, $w1, $w2
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[COPY:%[0-9]+]]:gpr64common = COPY $x0
; CHECK-COMMON-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
; CHECK-COMMON-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $w2
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.1:
; CHECK-COMMON-NEXT: successors: %bb.2(0x40000000), %bb.3(0x40000000)
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[LDRWui:%[0-9]+]]:gpr32common = LDRWui [[COPY]], 0 :: (load (s32))
; CHECK-COMMON-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[LDRWui]], 0, 0, implicit-def $nzcv
; CHECK-COMMON-NEXT: Bcc 0, %bb.2, implicit $nzcv
; CHECK-COMMON-NEXT: B %bb.3
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.2:
; CHECK-COMMON-NEXT: successors: %bb.4(0x80000000)
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: B %bb.4
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.3:
; CHECK-COMMON-NEXT: successors: %bb.4(0x80000000)
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: B %bb.4
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.4:
; CHECK-COMMON-NEXT: successors: %bb.5(0x40000000), %bb.6(0x40000000)
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[SUBSWrr:%[0-9]+]]:gpr32 = SUBSWrr [[COPY1]], [[COPY2]], implicit-def $nzcv
; CHECK-COMMON-NEXT: Bcc 0, %bb.5, implicit $nzcv
; CHECK-COMMON-NEXT: B %bb.6
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.5:
; CHECK-COMMON-NEXT: successors: %bb.7(0x80000000)
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: BL &foo, implicit-def $lr
; CHECK-COMMON-NEXT: B %bb.7
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.6:
; CHECK-COMMON-NEXT: successors: %bb.7(0x80000000)
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: B %bb.7
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.7:
; CHECK-COMMON-NEXT: successors: %bb.8(0x40000000), %bb.9(0x40000000)
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[ADDWri:%[0-9]+]]:gpr32common = ADDWri [[LDRWui]], 1, 0
; CHECK-COMMON-NEXT: [[SUBSWri1:%[0-9]+]]:gpr32 = SUBSWri [[ADDWri]], 100, 0, implicit-def $nzcv
; CHECK-COMMON-NEXT: Bcc 12, %bb.9, implicit $nzcv
; CHECK-COMMON-NEXT: B %bb.8
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.8:
; CHECK-COMMON-NEXT: successors: %bb.9(0x80000000)
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[MADDWrrr:%[0-9]+]]:gpr32 = MADDWrrr [[COPY1]], [[COPY2]], $wzr
; CHECK-COMMON-NEXT: [[MADDWrrr1:%[0-9]+]]:gpr32 = MADDWrrr [[MADDWrrr]], [[COPY1]], $wzr
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.9:
; CHECK-COMMON-NEXT: [[PHI:%[0-9]+]]:gpr32 = PHI [[COPY1]], %bb.7, [[MADDWrrr1]], %bb.8
; CHECK-COMMON-NEXT: $w0 = COPY [[PHI]]
; CHECK-COMMON-NEXT: RET_ReallyLR implicit $w0
bb.0:
successors: %bb.1(0x80000000)
liveins: $x0, $w1, $w2
%0:gpr64common = COPY $x0
%1:gpr32 = COPY $w1
%2:gpr32 = COPY $w2
bb.1:
successors: %bb.2(0x40000000), %bb.3(0x40000000)
%3:gpr32common = LDRWui %0, 0 :: (load (s32))
%10:gpr32 = SUBSWri %3, 0, 0, implicit-def $nzcv
Bcc 0, %bb.2, implicit $nzcv
B %bb.3
bb.2:
successors: %bb.4(0x80000000)
B %bb.4
bb.3:
successors: %bb.4(0x80000000)
B %bb.4
bb.4:
successors: %bb.5(0x40000000), %bb.6(0x40000000)
%11:gpr32 = SUBSWrr %1, %2, implicit-def $nzcv
Bcc 0, %bb.5, implicit $nzcv
B %bb.6
bb.5:
successors: %bb.7(0x80000000)
BL &foo, implicit-def $lr
B %bb.7
bb.6:
successors: %bb.7(0x80000000)
B %bb.7
bb.7:
successors: %bb.8(0x40000000), %bb.9(0x40000000)
%4:gpr32common = ADDWri %3, 1, 0
%5:gpr32 = SUBSWri %4, 100, 0, implicit-def $nzcv
Bcc 12, %bb.9, implicit $nzcv
B %bb.8
bb.8:
successors: %bb.9(0x80000000)
%6:gpr32 = MADDWrrr %1, %2, $wzr
%7:gpr32 = MADDWrrr %6, %1, $wzr
bb.9:
%8:gpr32 = PHI %1, %bb.7, %7, %bb.8
$w0 = COPY %8
RET_ReallyLR implicit $w0
...
---
name: call_between_load_and_cbz
alignment: 4
tracksRegLiveness: true
body: |
; CHECK-COMMON-LABEL: name: call_between_load_and_cbz
; CHECK-COMMON: bb.0:
; CHECK-COMMON-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
; CHECK-COMMON-NEXT: liveins: $x0, $w1, $w2
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[COPY:%[0-9]+]]:gpr64common = COPY $x0
; CHECK-COMMON-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
; CHECK-COMMON-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $w2
; CHECK-COMMON-NEXT: [[LDRWui:%[0-9]+]]:gpr32 = LDRWui [[COPY]], 0 :: (load (s32))
; CHECK-COMMON-NEXT: BL &foo, implicit-def $lr
; CHECK-COMMON-NEXT: CBZW [[LDRWui]], %bb.2
; CHECK-COMMON-NEXT: B %bb.1
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.1:
; CHECK-COMMON-NEXT: successors: %bb.2(0x80000000)
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[MADDWrrr:%[0-9]+]]:gpr32 = MADDWrrr [[COPY1]], [[COPY2]], $wzr
; CHECK-COMMON-NEXT: [[MADDWrrr1:%[0-9]+]]:gpr32 = MADDWrrr [[MADDWrrr]], [[COPY1]], $wzr
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.2:
; CHECK-COMMON-NEXT: [[PHI:%[0-9]+]]:gpr32 = PHI [[COPY1]], %bb.0, [[MADDWrrr1]], %bb.1
; CHECK-COMMON-NEXT: $w0 = COPY [[PHI]]
; CHECK-COMMON-NEXT: RET_ReallyLR implicit $w0
bb.0:
successors: %bb.1(0x40000000), %bb.2(0x40000000)
liveins: $x0, $w1, $w2
%0:gpr64common = COPY $x0
%1:gpr32 = COPY $w1
%2:gpr32 = COPY $w2
%3:gpr32 = LDRWui %0, 0 :: (load (s32))
BL &foo, implicit-def $lr
CBZW %3, %bb.2
B %bb.1
bb.1:
successors: %bb.2(0x80000000)
%4:gpr32 = MADDWrrr %1, %2, $wzr
%5:gpr32 = MADDWrrr %4, %1, $wzr
bb.2:
%6:gpr32 = PHI %1, %bb.0, %5, %bb.1
$w0 = COPY %6
RET_ReallyLR implicit $w0
...
---
name: cbz_cond_def_in_pred_call_in_head
alignment: 4
tracksRegLiveness: true
body: |
; CHECK-COMMON-LABEL: name: cbz_cond_def_in_pred_call_in_head
; CHECK-COMMON: bb.0:
; CHECK-COMMON-NEXT: successors: %bb.1(0x80000000)
; CHECK-COMMON-NEXT: liveins: $x0, $w1, $w2
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[COPY:%[0-9]+]]:gpr64common = COPY $x0
; CHECK-COMMON-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
; CHECK-COMMON-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $w2
; CHECK-COMMON-NEXT: [[LDRWui:%[0-9]+]]:gpr32 = LDRWui [[COPY]], 0 :: (load (s32))
; CHECK-COMMON-NEXT: [[MADDWrrr:%[0-9]+]]:gpr32 = MADDWrrr [[LDRWui]], [[LDRWui]], $wzr
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.1:
; CHECK-COMMON-NEXT: successors: %bb.2(0x40000000), %bb.3(0x40000000)
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: BL &foo, implicit-def $lr
; CHECK-COMMON-NEXT: CBZW [[MADDWrrr]], %bb.3
; CHECK-COMMON-NEXT: B %bb.2
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.2:
; CHECK-COMMON-NEXT: successors: %bb.3(0x80000000)
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[MADDWrrr1:%[0-9]+]]:gpr32 = MADDWrrr [[COPY1]], [[COPY2]], $wzr
; CHECK-COMMON-NEXT: [[MADDWrrr2:%[0-9]+]]:gpr32 = MADDWrrr [[MADDWrrr1]], [[COPY1]], $wzr
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.3:
; CHECK-COMMON-NEXT: [[PHI:%[0-9]+]]:gpr32 = PHI [[COPY1]], %bb.1, [[MADDWrrr2]], %bb.2
; CHECK-COMMON-NEXT: $w0 = COPY [[PHI]]
; CHECK-COMMON-NEXT: RET_ReallyLR implicit $w0
bb.0:
successors: %bb.1(0x80000000)
liveins: $x0, $w1, $w2
%0:gpr64common = COPY $x0
%1:gpr32 = COPY $w1
%2:gpr32 = COPY $w2
%3:gpr32 = LDRWui %0, 0 :: (load (s32))
%4:gpr32 = MADDWrrr %3, %3, $wzr
bb.1:
successors: %bb.2(0x40000000), %bb.3(0x40000000)
BL &foo, implicit-def $lr
CBZW %4, %bb.3
B %bb.2
bb.2:
successors: %bb.3(0x80000000)
%5:gpr32 = MADDWrrr %1, %2, $wzr
%6:gpr32 = MADDWrrr %5, %1, $wzr
bb.3:
%7:gpr32 = PHI %1, %bb.1, %6, %bb.2
$w0 = COPY %7
RET_ReallyLR implicit $w0
...
---
name: call_before_load_carried_by_phi
alignment: 4
tracksRegLiveness: true
body: |
; CHECK-COMMON-LABEL: name: call_before_load_carried_by_phi
; CHECK-COMMON: bb.0:
; CHECK-COMMON-NEXT: successors: %bb.1(0x80000000)
; CHECK-COMMON-NEXT: liveins: $x0, $w1, $w2
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[COPY:%[0-9]+]]:gpr64common = COPY $x0
; CHECK-COMMON-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
; CHECK-COMMON-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $w2
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.1:
; CHECK-COMMON-NEXT: successors: %bb.2(0x80000000)
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[PHI:%[0-9]+]]:gpr32common = PHI [[COPY1]], %bb.0, %4, %bb.5
; CHECK-COMMON-NEXT: BL &foo, implicit-def $lr
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.2:
; CHECK-COMMON-NEXT: successors: %bb.3(0x80000000)
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[LDRWui:%[0-9]+]]:gpr32common = LDRWui [[COPY]], 0 :: (load (s32))
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.3:
; CHECK-COMMON-NEXT: successors: %bb.4(0x40000000), %bb.5(0x40000000)
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[MADDWrrr:%[0-9]+]]:gpr32common = MADDWrrr [[PHI]], [[PHI]], $wzr
; CHECK-COMMON-NEXT: [[MADDWrrr1:%[0-9]+]]:gpr32common = MADDWrrr [[MADDWrrr]], [[MADDWrrr]], $wzr
; CHECK-COMMON-NEXT: [[MADDWrrr2:%[0-9]+]]:gpr32common = MADDWrrr [[MADDWrrr1]], [[MADDWrrr1]], $wzr
; CHECK-COMMON-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[MADDWrrr2]], 100, 0, implicit-def $nzcv
; CHECK-COMMON-NEXT: Bcc 12, %bb.5, implicit $nzcv
; CHECK-COMMON-NEXT: B %bb.4
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.4:
; CHECK-COMMON-NEXT: successors: %bb.5(0x80000000)
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[MADDWrrr3:%[0-9]+]]:gpr32 = MADDWrrr [[COPY1]], [[COPY2]], $wzr
; CHECK-COMMON-NEXT: [[MADDWrrr4:%[0-9]+]]:gpr32 = MADDWrrr [[MADDWrrr3]], [[COPY1]], $wzr
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.5:
; CHECK-COMMON-NEXT: successors: %bb.1(0x7c000000), %bb.6(0x04000000)
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[PHI1:%[0-9]+]]:gpr32sp = PHI [[COPY1]], %bb.3, [[MADDWrrr4]], %bb.4
; CHECK-COMMON-NEXT: [[SUBSWri1:%[0-9]+]]:gpr32 = SUBSWri [[PHI1]], 0, 0, implicit-def $nzcv
; CHECK-COMMON-NEXT: Bcc 12, %bb.1, implicit $nzcv
; CHECK-COMMON-NEXT: B %bb.6
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.6:
; CHECK-COMMON-NEXT: $w0 = COPY [[PHI1]]
; CHECK-COMMON-NEXT: RET_ReallyLR implicit $w0
bb.0:
successors: %bb.1(0x80000000)
liveins: $x0, $w1, $w2
%0:gpr64common = COPY $x0
%1:gpr32 = COPY $w1
%2:gpr32 = COPY $w2
bb.1:
successors: %bb.2(0x80000000)
%3:gpr32common = PHI %1, %bb.0, %4, %bb.5
BL &foo, implicit-def $lr
bb.2:
successors: %bb.3(0x80000000)
%4:gpr32common = LDRWui %0, 0 :: (load (s32))
bb.3:
successors: %bb.4(0x40000000), %bb.5(0x40000000)
%5:gpr32common = MADDWrrr %3, %3, $wzr
%6:gpr32common = MADDWrrr %5, %5, $wzr
%7:gpr32common = MADDWrrr %6, %6, $wzr
%8:gpr32 = SUBSWri %7, 100, 0, implicit-def $nzcv
Bcc 12, %bb.5, implicit $nzcv
B %bb.4
bb.4:
successors: %bb.5(0x80000000)
%9:gpr32 = MADDWrrr %1, %2, $wzr
%10:gpr32 = MADDWrrr %9, %1, $wzr
bb.5:
successors: %bb.1(0x7c000000), %bb.6(0x04000000)
%11:gpr32sp = PHI %1, %bb.3, %10, %bb.4
%12:gpr32 = SUBSWri %11, 0, 0, implicit-def $nzcv
Bcc 12, %bb.1, implicit $nzcv
B %bb.6
bb.6:
$w0 = COPY %11
RET_ReallyLR implicit $w0
...
---
name: two_regions_share_call_block
alignment: 4
tracksRegLiveness: true
body: |
; CHECK-COMMON-LABEL: name: two_regions_share_call_block
; CHECK-COMMON: bb.0:
; CHECK-COMMON-NEXT: successors: %bb.1(0x80000000)
; CHECK-COMMON-NEXT: liveins: $x0, $w1, $w2
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[COPY:%[0-9]+]]:gpr64common = COPY $x0
; CHECK-COMMON-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
; CHECK-COMMON-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $w2
; CHECK-COMMON-NEXT: [[LDRWui:%[0-9]+]]:gpr32common = LDRWui [[COPY]], 0 :: (load (s32))
; CHECK-COMMON-NEXT: [[LDRWui1:%[0-9]+]]:gpr32common = LDRWui [[COPY]], 1 :: (load (s32))
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.1:
; CHECK-COMMON-NEXT: successors: %bb.2(0x40000000), %bb.5(0x40000000)
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: BL &foo, implicit-def $lr
; CHECK-COMMON-NEXT: [[SUBSWrr:%[0-9]+]]:gpr32 = SUBSWrr [[COPY1]], [[COPY2]], implicit-def $nzcv
; CHECK-COMMON-NEXT: Bcc 0, %bb.5, implicit $nzcv
; CHECK-COMMON-NEXT: B %bb.2
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.2:
; CHECK-COMMON-NEXT: successors: %bb.3(0x40000000), %bb.4(0x40000000)
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[ADDWri:%[0-9]+]]:gpr32common = ADDWri [[LDRWui]], 1, 0
; CHECK-COMMON-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[ADDWri]], 100, 0, implicit-def $nzcv
; CHECK-COMMON-NEXT: Bcc 12, %bb.4, implicit $nzcv
; CHECK-COMMON-NEXT: B %bb.3
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.3:
; CHECK-COMMON-NEXT: successors: %bb.4(0x80000000)
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[MADDWrrr:%[0-9]+]]:gpr32 = MADDWrrr [[COPY1]], [[COPY2]], $wzr
; CHECK-COMMON-NEXT: [[MADDWrrr1:%[0-9]+]]:gpr32 = MADDWrrr [[MADDWrrr]], [[COPY1]], $wzr
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.4:
; CHECK-COMMON-NEXT: [[PHI:%[0-9]+]]:gpr32 = PHI [[COPY1]], %bb.2, [[MADDWrrr1]], %bb.3
; CHECK-COMMON-NEXT: $w0 = COPY [[PHI]]
; CHECK-COMMON-NEXT: RET_ReallyLR implicit $w0
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.5:
; CHECK-COMMON-NEXT: successors: %bb.6(0x40000000), %bb.7(0x40000000)
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[ADDWri1:%[0-9]+]]:gpr32common = ADDWri [[LDRWui1]], 1, 0
; CHECK-COMMON-NEXT: [[SUBSWri1:%[0-9]+]]:gpr32 = SUBSWri [[ADDWri1]], 100, 0, implicit-def $nzcv
; CHECK-COMMON-NEXT: Bcc 12, %bb.7, implicit $nzcv
; CHECK-COMMON-NEXT: B %bb.6
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.6:
; CHECK-COMMON-NEXT: successors: %bb.7(0x80000000)
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: [[MADDWrrr2:%[0-9]+]]:gpr32 = MADDWrrr [[COPY1]], [[COPY2]], $wzr
; CHECK-COMMON-NEXT: [[MADDWrrr3:%[0-9]+]]:gpr32 = MADDWrrr [[MADDWrrr2]], [[COPY1]], $wzr
; CHECK-COMMON-NEXT: {{ $}}
; CHECK-COMMON-NEXT: bb.7:
; CHECK-COMMON-NEXT: [[PHI1:%[0-9]+]]:gpr32 = PHI [[COPY1]], %bb.5, [[MADDWrrr3]], %bb.6
; CHECK-COMMON-NEXT: $w0 = COPY [[PHI1]]
; CHECK-COMMON-NEXT: RET_ReallyLR implicit $w0
bb.0:
successors: %bb.1(0x80000000)
liveins: $x0, $w1, $w2
%0:gpr64common = COPY $x0
%1:gpr32 = COPY $w1
%2:gpr32 = COPY $w2
%3:gpr32common = LDRWui %0, 0 :: (load (s32))
%4:gpr32common = LDRWui %0, 1 :: (load (s32))
bb.1:
successors: %bb.2(0x40000000), %bb.5(0x40000000)
BL &foo, implicit-def $lr
%5:gpr32 = SUBSWrr %1, %2, implicit-def $nzcv
Bcc 0, %bb.5, implicit $nzcv
B %bb.2
bb.2:
successors: %bb.3(0x40000000), %bb.4(0x40000000)
%6:gpr32common = ADDWri %3, 1, 0
%7:gpr32 = SUBSWri %6, 100, 0, implicit-def $nzcv
Bcc 12, %bb.4, implicit $nzcv
B %bb.3
bb.3:
successors: %bb.4(0x80000000)
%8:gpr32 = MADDWrrr %1, %2, $wzr
%9:gpr32 = MADDWrrr %8, %1, $wzr
bb.4:
%10:gpr32 = PHI %1, %bb.2, %9, %bb.3
$w0 = COPY %10
RET_ReallyLR implicit $w0
bb.5:
successors: %bb.6(0x40000000), %bb.7(0x40000000)
%11:gpr32common = ADDWri %4, 1, 0
%12:gpr32 = SUBSWri %11, 100, 0, implicit-def $nzcv
Bcc 12, %bb.7, implicit $nzcv
B %bb.6
bb.6:
successors: %bb.7(0x80000000)
%13:gpr32 = MADDWrrr %1, %2, $wzr
%14:gpr32 = MADDWrrr %13, %1, $wzr
bb.7:
%15:gpr32 = PHI %1, %bb.5, %14, %bb.6
$w0 = COPY %15
RET_ReallyLR implicit $w0
...