llvm/test/Analysis/ValueTracking/knownbits-pext.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -passes=instcombine -S < %s | FileCheck %s

; pext(x, 0b00001111) produces a 4-bit result; bit 4 and above are always zero.
define i1 @pext_high_bits_zero(i8 %x) nounwind {
; CHECK-LABEL: @pext_high_bits_zero(
; CHECK-NEXT:    ret i1 true
;
  %pext = call i8 @llvm.pext.i8(i8 %x, i8 15)
  %and = and i8 %pext, 240
  %r = icmp eq i8 %and, 0
  ret i1 %r
}

; Vector: pext(x, 0b00001111) produces a 4-bit result; bit 4 and above are zero.
define <2 x i1> @pext_high_bits_zero_vector(<2 x i8> %x) nounwind {
; CHECK-LABEL: @pext_high_bits_zero_vector(
; CHECK-NEXT:    ret <2 x i1> splat (i1 true)
;
  %pext = call <2 x i8> @llvm.pext.v2i8(<2 x i8> %x, <2 x i8> splat (i8 15))
  %and = and <2 x i8> %pext, splat (i8 240)
  %r = icmp eq <2 x i8> %and, zeroinitializer
  ret <2 x i1> %r
}

; pext(x, 0b11001100) can produce up to 4 bits; bits 4..7 are zero.
define i1 @pext_sparse_mask_high_zero(i8 %x) nounwind {
; CHECK-LABEL: @pext_sparse_mask_high_zero(
; CHECK-NEXT:    ret i1 true
;
  %pext = call i8 @llvm.pext.i8(i8 %x, i8 204)
  %and = and i8 %pext, 240
  %r = icmp eq i8 %and, 0
  ret i1 %r
}

define <2 x i1> @pext_sparse_mask_high_zero_vector(<2 x i8> %x) nounwind {
; CHECK-LABEL: @pext_sparse_mask_high_zero_vector(
; CHECK-NEXT:    ret <2 x i1> splat (i1 true)
;
  %pext = call <2 x i8> @llvm.pext.v2i8(<2 x i8> %x, <2 x i8> splat (i8 -52))
  %and = and <2 x i8> %pext, splat (i8 240)
  %r = icmp eq <2 x i8> %and, zeroinitializer
  ret <2 x i1> %r
}

; pext(x, 0) -> all bits zero: the result is always zero.
define i1 @pext_zero_mask_known_zero(i8 %x) nounwind {
; CHECK-LABEL: @pext_zero_mask_known_zero(
; CHECK-NEXT:    ret i1 true
;
  %pext = call i8 @llvm.pext.i8(i8 %x, i8 0)
  %r = icmp eq i8 %pext, 0
  ret i1 %r
}

define <2 x i1> @pext_zero_mask_known_zero_vector(<2 x i8> %x) nounwind {
; CHECK-LABEL: @pext_zero_mask_known_zero_vector(
; CHECK-NEXT:    ret <2 x i1> splat (i1 true)
;
  %pext = call <2 x i8> @llvm.pext.v2i8(<2 x i8> %x, <2 x i8> zeroinitializer)
  %r = icmp eq <2 x i8> %pext, zeroinitializer
  ret <2 x i1> %r
}

; Negative: pext(x, 0b11001100) can have bits 0-3 set; can't prove bit 0 is zero.
define i1 @pext_low_bits_not_known(i8 %x) nounwind {
; CHECK-LABEL: @pext_low_bits_not_known(
; CHECK-NEXT:    [[PEXT:%.*]] = call i8 @llvm.pext.i8(i8 [[X:%.*]], i8 -52)
; CHECK-NEXT:    [[AND:%.*]] = and i8 [[PEXT]], 1
; CHECK-NEXT:    [[R:%.*]] = icmp eq i8 [[AND]], 0
; CHECK-NEXT:    ret i1 [[R]]
;
  %pext = call i8 @llvm.pext.i8(i8 %x, i8 204)
  %and = and i8 %pext, 1
  %r = icmp eq i8 %and, 0
  ret i1 %r
}

define <2 x i1> @pext_low_bits_not_known_vector(<2 x i8> %x) nounwind {
; CHECK-LABEL: @pext_low_bits_not_known_vector(
; CHECK-NEXT:    [[PEXT:%.*]] = call <2 x i8> @llvm.pext.v2i8(<2 x i8> [[X:%.*]], <2 x i8> splat (i8 -52))
; CHECK-NEXT:    [[AND:%.*]] = and <2 x i8> [[PEXT]], splat (i8 1)
; CHECK-NEXT:    [[R:%.*]] = icmp eq <2 x i8> [[AND]], zeroinitializer
; CHECK-NEXT:    ret <2 x i1> [[R]]
;
  %pext = call <2 x i8> @llvm.pext.v2i8(<2 x i8> %x, <2 x i8> splat (i8 -52))
  %and = and <2 x i8> %pext, splat (i8 1)
  %r = icmp eq <2 x i8> %and, zeroinitializer
  ret <2 x i1> %r
}