[mips] Fix decoding of microMIPS JALX instruction
microMIPS jump and link exchange instruction stores a target in a
26-bits field. Despite other microMIPS JAL instructions these bits
are target address shifted right 2 bits [1]. The patch fixes the
JALX instruction decoding and uses 2-bit shift.
[1] MIPS Architecture for Programmers Volume II-B: The microMIPS32 Instruction Set
Differential Revision: https://reviews.llvm.org/D67320
git-svn-id: https://llvm.org/svn/llvm-project/lld/trunk@371428 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/test/ELF/mips-micro-cross-calls.s b/test/ELF/mips-micro-cross-calls.s
index fc9dd0a..1368bda 100644
--- a/test/ELF/mips-micro-cross-calls.s
+++ b/test/ELF/mips-micro-cross-calls.s
@@ -22,9 +22,9 @@
# REG-NEXT: 20034: 08 00 80 11 j 131140 <bar>
# MICRO: micro:
-# MICRO-NEXT: 20010: f0 00 80 00 jalx 65536
+# MICRO-NEXT: 20010: f0 00 80 00 jalx 131072 <__start>
# MICRO-NEXT: 20014: 00 00 00 00 nop
-# MICRO-NEXT: 20018: f0 00 80 0c jalx 65560
+# MICRO-NEXT: 20018: f0 00 80 0c jalx 131120 <__LA25Thunk_bar>
# MICRO: __microLA25Thunk_foo:
# MICRO-NEXT: 20020: 41 b9 00 02 lui $25, 2
