commit a144fc0c0ab604f8eeb8cbf35d8edc12f8c38a0e
author Tobias Grosser <tobias@grosser.es> Wed Feb 03 21:43:09 2016 +0000
committer Tobias Grosser <tobias@grosser.es> Wed Feb 03 21:43:09 2016 +0000
tree 85a7dfbb4d319ef96afa071145ff16e4276ddea7
parent d0477426262a8da7d66f75c58ea1d0f382f57d9b

Merged: https://llvm.org/svn/llvm-project/polly/trunk@258802

[FIX] Build correct domain for non-affine region SCoPs

git-svn-id: https://llvm.org/svn/llvm-project/polly/branches/release_38@259710 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Analysis/ScopInfo.cpp

diff --git a/lib/Analysis/ScopInfo.cpp b/lib/Analysis/ScopInfo.cpp
index a527d67..304bdba 100644
--- a/lib/Analysis/ScopInfo.cpp
+++ b/lib/Analysis/ScopInfo.cpp
@@ -2035,11 +2035,12 @@
 
 void Scop::buildDomains(Region *R) {
 
+  bool IsOnlyNonAffineRegion = SD.isNonAffineSubRegion(R, R);
   auto *EntryBB = R->getEntry();
-  int LD = getRelativeLoopDepth(LI.getLoopFor(EntryBB));
+  auto *L = IsOnlyNonAffineRegion ? nullptr : LI.getLoopFor(EntryBB);
+  int LD = getRelativeLoopDepth(L);
   auto *S = isl_set_universe(isl_space_set_alloc(getIslCtx(), 0, LD + 1));
 
-  Loop *L = LI.getLoopFor(EntryBB);
   while (LD-- >= 0) {
     S = addDomainDimId(S, LD + 1, L);
     L = L->getParentLoop();
@@ -2047,7 +2048,7 @@
 
   DomainMap[EntryBB] = S;
 
-  if (SD.isNonAffineSubRegion(R, R))
+  if (IsOnlyNonAffineRegion)
     return;
 
   buildDomainsWithBranchConstraints(R);

test/ScopInfo/non-affine-region-with-loop.ll

diff --git a/test/ScopInfo/non-affine-region-with-loop.ll b/test/ScopInfo/non-affine-region-with-loop.ll
new file mode 100644
index 0000000..a447e09
--- /dev/null
+++ b/test/ScopInfo/non-affine-region-with-loop.ll
@@ -0,0 +1,41 @@
+; RUN: opt %loadPolly -polly-allow-nonaffine-loops -polly-scops -analyze < %s | FileCheck %s
+; RUN: opt %loadPolly -polly-allow-nonaffine-loops -polly-codegen -analyze
+;
+; CHECK:      Domain :=
+; CHECK-NEXT:   { Stmt_loop2__TO__loop[] };
+;
+define void @foo(i64* %A, i64 %p) {
+entry:
+  br label %loop
+
+loop:
+  %indvar.3 = phi i64 [0, %entry], [%indvar.3, %loop], [%indvar.next.3, %next2], [%indvar.next.3, %cond]
+  %indvar = phi i64 [0, %entry], [%indvar.next, %loop], [0, %next2], [0, %cond]
+  %indvar.next = add i64 %indvar, 1
+  fence seq_cst
+  %cmp = icmp eq i64 %indvar, 100
+  br i1 %cmp, label %next, label %loop
+
+next:
+  %indvar.next.3 = add i64 %indvar.3, 1
+  %cmp.3 = icmp eq i64 %indvar, 100
+  br i1 %cmp.3, label %loop2, label %exit
+
+loop2:
+  %indvar.2 = phi i64 [0, %next], [%indvar.next.2, %loop2], [0, %cond]
+  %indvar.next.2 = add i64 %indvar.2, 1
+  %prod = mul i64 %indvar.2, %indvar.2
+  store i64 %indvar, i64* %A
+  %cmp.2 = icmp eq i64 %prod, 100
+  br i1 %cmp.2, label %loop2, label %next2
+
+next2:
+  %cmp.4 = icmp eq i64 %p, 100
+  br i1 %cmp.4, label %loop, label %cond
+
+cond:
+  br i1 false, label %loop, label %loop2
+
+exit:
+  ret void
+}