[RISCV] Add implied zero offset load/store alias patterns

Allow load/store instructions with implied zero offset for compatibility with
GNU assembler.

Differential Revision: https://reviews.llvm.org/D57141
Patch by James Clarke.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354581 91177308-0d34-0410-b5e6-96231b3b80d8
12 files changed