[AVX512] Add avx512cd+vl runs to vector-tzcnt-128/256 tests to show using the vplzcntd/q instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266860 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/test/CodeGen/X86/vector-tzcnt-256.ll b/test/CodeGen/X86/vector-tzcnt-256.ll
index a9ee27c..5c8eff0 100644
--- a/test/CodeGen/X86/vector-tzcnt-256.ll
+++ b/test/CodeGen/X86/vector-tzcnt-256.ll
@@ -1,6 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512cd,+avx512vl | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX512CDVL
define <4 x i64> @testv4i64(<4 x i64> %in) nounwind {
; AVX1-LABEL: testv4i64:
@@ -51,6 +52,23 @@
; AVX2-NEXT: vpaddb %ymm3, %ymm0, %ymm0
; AVX2-NEXT: vpsadbw %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
+;
+; AVX512CDVL-LABEL: testv4i64:
+; AVX512CDVL: # BB#0:
+; AVX512CDVL-NEXT: vpxor %ymm1, %ymm1, %ymm1
+; AVX512CDVL-NEXT: vpsubq %ymm0, %ymm1, %ymm2
+; AVX512CDVL-NEXT: vpandq %ymm2, %ymm0, %ymm0
+; AVX512CDVL-NEXT: vpsubq {{.*}}(%rip){1to4}, %ymm0, %ymm0
+; AVX512CDVL-NEXT: vmovdqa64 {{.*#+}} ymm2 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
+; AVX512CDVL-NEXT: vpandq %ymm2, %ymm0, %ymm3
+; AVX512CDVL-NEXT: vmovdqa64 {{.*#+}} ymm4 = [0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4,0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4]
+; AVX512CDVL-NEXT: vpshufb %ymm3, %ymm4, %ymm3
+; AVX512CDVL-NEXT: vpsrlw $4, %ymm0, %ymm0
+; AVX512CDVL-NEXT: vpandq %ymm2, %ymm0, %ymm0
+; AVX512CDVL-NEXT: vpshufb %ymm0, %ymm4, %ymm0
+; AVX512CDVL-NEXT: vpaddb %ymm3, %ymm0, %ymm0
+; AVX512CDVL-NEXT: vpsadbw %ymm1, %ymm0, %ymm0
+; AVX512CDVL-NEXT: retq
%out = call <4 x i64> @llvm.cttz.v4i64(<4 x i64> %in, i1 0)
ret <4 x i64> %out
}
@@ -104,6 +122,16 @@
; AVX2-NEXT: vpaddb %ymm3, %ymm0, %ymm0
; AVX2-NEXT: vpsadbw %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
+;
+; AVX512CDVL-LABEL: testv4i64u:
+; AVX512CDVL: # BB#0:
+; AVX512CDVL-NEXT: vpxor %ymm1, %ymm1, %ymm1
+; AVX512CDVL-NEXT: vpsubq %ymm0, %ymm1, %ymm1
+; AVX512CDVL-NEXT: vpandq %ymm1, %ymm0, %ymm0
+; AVX512CDVL-NEXT: vplzcntq %ymm0, %ymm0
+; AVX512CDVL-NEXT: vpbroadcastq {{.*}}(%rip), %ymm1
+; AVX512CDVL-NEXT: vpsubq %ymm0, %ymm1, %ymm0
+; AVX512CDVL-NEXT: retq
%out = call <4 x i64> @llvm.cttz.v4i64(<4 x i64> %in, i1 -1)
ret <4 x i64> %out
}
@@ -169,6 +197,27 @@
; AVX2-NEXT: vpsadbw %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vpackuswb %ymm2, %ymm0, %ymm0
; AVX2-NEXT: retq
+;
+; AVX512CDVL-LABEL: testv8i32:
+; AVX512CDVL: # BB#0:
+; AVX512CDVL-NEXT: vpxor %ymm1, %ymm1, %ymm1
+; AVX512CDVL-NEXT: vpsubd %ymm0, %ymm1, %ymm2
+; AVX512CDVL-NEXT: vpandd %ymm2, %ymm0, %ymm0
+; AVX512CDVL-NEXT: vpsubd {{.*}}(%rip){1to8}, %ymm0, %ymm0
+; AVX512CDVL-NEXT: vmovdqa64 {{.*#+}} ymm2 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
+; AVX512CDVL-NEXT: vpandq %ymm2, %ymm0, %ymm3
+; AVX512CDVL-NEXT: vmovdqa64 {{.*#+}} ymm4 = [0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4,0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4]
+; AVX512CDVL-NEXT: vpshufb %ymm3, %ymm4, %ymm3
+; AVX512CDVL-NEXT: vpsrlw $4, %ymm0, %ymm0
+; AVX512CDVL-NEXT: vpandq %ymm2, %ymm0, %ymm0
+; AVX512CDVL-NEXT: vpshufb %ymm0, %ymm4, %ymm0
+; AVX512CDVL-NEXT: vpaddb %ymm3, %ymm0, %ymm0
+; AVX512CDVL-NEXT: vpunpckhdq {{.*#+}} ymm2 = ymm0[2],ymm1[2],ymm0[3],ymm1[3],ymm0[6],ymm1[6],ymm0[7],ymm1[7]
+; AVX512CDVL-NEXT: vpsadbw %ymm1, %ymm2, %ymm2
+; AVX512CDVL-NEXT: vpunpckldq {{.*#+}} ymm0 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[4],ymm1[4],ymm0[5],ymm1[5]
+; AVX512CDVL-NEXT: vpsadbw %ymm1, %ymm0, %ymm0
+; AVX512CDVL-NEXT: vpackuswb %ymm2, %ymm0, %ymm0
+; AVX512CDVL-NEXT: retq
%out = call <8 x i32> @llvm.cttz.v8i32(<8 x i32> %in, i1 0)
ret <8 x i32> %out
}
@@ -234,6 +283,16 @@
; AVX2-NEXT: vpsadbw %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vpackuswb %ymm2, %ymm0, %ymm0
; AVX2-NEXT: retq
+;
+; AVX512CDVL-LABEL: testv8i32u:
+; AVX512CDVL: # BB#0:
+; AVX512CDVL-NEXT: vpxor %ymm1, %ymm1, %ymm1
+; AVX512CDVL-NEXT: vpsubd %ymm0, %ymm1, %ymm1
+; AVX512CDVL-NEXT: vpandd %ymm1, %ymm0, %ymm0
+; AVX512CDVL-NEXT: vplzcntd %ymm0, %ymm0
+; AVX512CDVL-NEXT: vpbroadcastd {{.*}}(%rip), %ymm1
+; AVX512CDVL-NEXT: vpsubd %ymm0, %ymm1, %ymm0
+; AVX512CDVL-NEXT: retq
%out = call <8 x i32> @llvm.cttz.v8i32(<8 x i32> %in, i1 -1)
ret <8 x i32> %out
}
@@ -292,6 +351,25 @@
; AVX2-NEXT: vpaddb %ymm0, %ymm1, %ymm0
; AVX2-NEXT: vpsrlw $8, %ymm0, %ymm0
; AVX2-NEXT: retq
+;
+; AVX512CDVL-LABEL: testv16i16:
+; AVX512CDVL: # BB#0:
+; AVX512CDVL-NEXT: vpxor %ymm1, %ymm1, %ymm1
+; AVX512CDVL-NEXT: vpsubw %ymm0, %ymm1, %ymm1
+; AVX512CDVL-NEXT: vpandq %ymm1, %ymm0, %ymm0
+; AVX512CDVL-NEXT: vpsubw {{.*}}(%rip), %ymm0, %ymm0
+; AVX512CDVL-NEXT: vmovdqa64 {{.*#+}} ymm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
+; AVX512CDVL-NEXT: vpandq %ymm1, %ymm0, %ymm2
+; AVX512CDVL-NEXT: vmovdqa64 {{.*#+}} ymm3 = [0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4,0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4]
+; AVX512CDVL-NEXT: vpshufb %ymm2, %ymm3, %ymm2
+; AVX512CDVL-NEXT: vpsrlw $4, %ymm0, %ymm0
+; AVX512CDVL-NEXT: vpandq %ymm1, %ymm0, %ymm0
+; AVX512CDVL-NEXT: vpshufb %ymm0, %ymm3, %ymm0
+; AVX512CDVL-NEXT: vpaddb %ymm2, %ymm0, %ymm0
+; AVX512CDVL-NEXT: vpsllw $8, %ymm0, %ymm1
+; AVX512CDVL-NEXT: vpaddb %ymm0, %ymm1, %ymm0
+; AVX512CDVL-NEXT: vpsrlw $8, %ymm0, %ymm0
+; AVX512CDVL-NEXT: retq
%out = call <16 x i16> @llvm.cttz.v16i16(<16 x i16> %in, i1 0)
ret <16 x i16> %out
}
@@ -350,6 +428,25 @@
; AVX2-NEXT: vpaddb %ymm0, %ymm1, %ymm0
; AVX2-NEXT: vpsrlw $8, %ymm0, %ymm0
; AVX2-NEXT: retq
+;
+; AVX512CDVL-LABEL: testv16i16u:
+; AVX512CDVL: # BB#0:
+; AVX512CDVL-NEXT: vpxor %ymm1, %ymm1, %ymm1
+; AVX512CDVL-NEXT: vpsubw %ymm0, %ymm1, %ymm1
+; AVX512CDVL-NEXT: vpandq %ymm1, %ymm0, %ymm0
+; AVX512CDVL-NEXT: vpsubw {{.*}}(%rip), %ymm0, %ymm0
+; AVX512CDVL-NEXT: vmovdqa64 {{.*#+}} ymm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
+; AVX512CDVL-NEXT: vpandq %ymm1, %ymm0, %ymm2
+; AVX512CDVL-NEXT: vmovdqa64 {{.*#+}} ymm3 = [0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4,0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4]
+; AVX512CDVL-NEXT: vpshufb %ymm2, %ymm3, %ymm2
+; AVX512CDVL-NEXT: vpsrlw $4, %ymm0, %ymm0
+; AVX512CDVL-NEXT: vpandq %ymm1, %ymm0, %ymm0
+; AVX512CDVL-NEXT: vpshufb %ymm0, %ymm3, %ymm0
+; AVX512CDVL-NEXT: vpaddb %ymm2, %ymm0, %ymm0
+; AVX512CDVL-NEXT: vpsllw $8, %ymm0, %ymm1
+; AVX512CDVL-NEXT: vpaddb %ymm0, %ymm1, %ymm0
+; AVX512CDVL-NEXT: vpsrlw $8, %ymm0, %ymm0
+; AVX512CDVL-NEXT: retq
%out = call <16 x i16> @llvm.cttz.v16i16(<16 x i16> %in, i1 -1)
ret <16 x i16> %out
}
@@ -399,6 +496,22 @@
; AVX2-NEXT: vpshufb %ymm0, %ymm3, %ymm0
; AVX2-NEXT: vpaddb %ymm2, %ymm0, %ymm0
; AVX2-NEXT: retq
+;
+; AVX512CDVL-LABEL: testv32i8:
+; AVX512CDVL: # BB#0:
+; AVX512CDVL-NEXT: vpxor %ymm1, %ymm1, %ymm1
+; AVX512CDVL-NEXT: vpsubb %ymm0, %ymm1, %ymm1
+; AVX512CDVL-NEXT: vpandq %ymm1, %ymm0, %ymm0
+; AVX512CDVL-NEXT: vpsubb {{.*}}(%rip), %ymm0, %ymm0
+; AVX512CDVL-NEXT: vmovdqa64 {{.*#+}} ymm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
+; AVX512CDVL-NEXT: vpandq %ymm1, %ymm0, %ymm2
+; AVX512CDVL-NEXT: vmovdqa64 {{.*#+}} ymm3 = [0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4,0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4]
+; AVX512CDVL-NEXT: vpshufb %ymm2, %ymm3, %ymm2
+; AVX512CDVL-NEXT: vpsrlw $4, %ymm0, %ymm0
+; AVX512CDVL-NEXT: vpandq %ymm1, %ymm0, %ymm0
+; AVX512CDVL-NEXT: vpshufb %ymm0, %ymm3, %ymm0
+; AVX512CDVL-NEXT: vpaddb %ymm2, %ymm0, %ymm0
+; AVX512CDVL-NEXT: retq
%out = call <32 x i8> @llvm.cttz.v32i8(<32 x i8> %in, i1 0)
ret <32 x i8> %out
}
@@ -448,78 +561,174 @@
; AVX2-NEXT: vpshufb %ymm0, %ymm3, %ymm0
; AVX2-NEXT: vpaddb %ymm2, %ymm0, %ymm0
; AVX2-NEXT: retq
+;
+; AVX512CDVL-LABEL: testv32i8u:
+; AVX512CDVL: # BB#0:
+; AVX512CDVL-NEXT: vpxor %ymm1, %ymm1, %ymm1
+; AVX512CDVL-NEXT: vpsubb %ymm0, %ymm1, %ymm1
+; AVX512CDVL-NEXT: vpandq %ymm1, %ymm0, %ymm0
+; AVX512CDVL-NEXT: vpsubb {{.*}}(%rip), %ymm0, %ymm0
+; AVX512CDVL-NEXT: vmovdqa64 {{.*#+}} ymm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
+; AVX512CDVL-NEXT: vpandq %ymm1, %ymm0, %ymm2
+; AVX512CDVL-NEXT: vmovdqa64 {{.*#+}} ymm3 = [0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4,0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4]
+; AVX512CDVL-NEXT: vpshufb %ymm2, %ymm3, %ymm2
+; AVX512CDVL-NEXT: vpsrlw $4, %ymm0, %ymm0
+; AVX512CDVL-NEXT: vpandq %ymm1, %ymm0, %ymm0
+; AVX512CDVL-NEXT: vpshufb %ymm0, %ymm3, %ymm0
+; AVX512CDVL-NEXT: vpaddb %ymm2, %ymm0, %ymm0
+; AVX512CDVL-NEXT: retq
%out = call <32 x i8> @llvm.cttz.v32i8(<32 x i8> %in, i1 -1)
ret <32 x i8> %out
}
define <4 x i64> @foldv4i64() nounwind {
-; ALL-LABEL: foldv4i64:
-; ALL: # BB#0:
-; ALL-NEXT: vmovaps {{.*#+}} ymm0 = [8,0,64,0]
-; ALL-NEXT: retq
+; AVX1-LABEL: foldv4i64:
+; AVX1: # BB#0:
+; AVX1-NEXT: vmovaps {{.*#+}} ymm0 = [8,0,64,0]
+; AVX1-NEXT: retq
+;
+; AVX2-LABEL: foldv4i64:
+; AVX2: # BB#0:
+; AVX2-NEXT: vmovaps {{.*#+}} ymm0 = [8,0,64,0]
+; AVX2-NEXT: retq
+;
+; AVX512CDVL-LABEL: foldv4i64:
+; AVX512CDVL: # BB#0:
+; AVX512CDVL-NEXT: vmovdqa64 {{.*#+}} ymm0 = [8,0,64,0]
+; AVX512CDVL-NEXT: retq
%out = call <4 x i64> @llvm.cttz.v4i64(<4 x i64> <i64 256, i64 -1, i64 0, i64 255>, i1 0)
ret <4 x i64> %out
}
define <4 x i64> @foldv4i64u() nounwind {
-; ALL-LABEL: foldv4i64u:
-; ALL: # BB#0:
-; ALL-NEXT: vmovaps {{.*#+}} ymm0 = [8,0,64,0]
-; ALL-NEXT: retq
+; AVX1-LABEL: foldv4i64u:
+; AVX1: # BB#0:
+; AVX1-NEXT: vmovaps {{.*#+}} ymm0 = [8,0,64,0]
+; AVX1-NEXT: retq
+;
+; AVX2-LABEL: foldv4i64u:
+; AVX2: # BB#0:
+; AVX2-NEXT: vmovaps {{.*#+}} ymm0 = [8,0,64,0]
+; AVX2-NEXT: retq
+;
+; AVX512CDVL-LABEL: foldv4i64u:
+; AVX512CDVL: # BB#0:
+; AVX512CDVL-NEXT: vmovdqa64 {{.*#+}} ymm0 = [8,0,64,0]
+; AVX512CDVL-NEXT: retq
%out = call <4 x i64> @llvm.cttz.v4i64(<4 x i64> <i64 256, i64 -1, i64 0, i64 255>, i1 -1)
ret <4 x i64> %out
}
define <8 x i32> @foldv8i32() nounwind {
-; ALL-LABEL: foldv8i32:
-; ALL: # BB#0:
-; ALL-NEXT: vmovaps {{.*#+}} ymm0 = [8,0,32,0,16,0,3,3]
-; ALL-NEXT: retq
+; AVX1-LABEL: foldv8i32:
+; AVX1: # BB#0:
+; AVX1-NEXT: vmovaps {{.*#+}} ymm0 = [8,0,32,0,16,0,3,3]
+; AVX1-NEXT: retq
+;
+; AVX2-LABEL: foldv8i32:
+; AVX2: # BB#0:
+; AVX2-NEXT: vmovaps {{.*#+}} ymm0 = [8,0,32,0,16,0,3,3]
+; AVX2-NEXT: retq
+;
+; AVX512CDVL-LABEL: foldv8i32:
+; AVX512CDVL: # BB#0:
+; AVX512CDVL-NEXT: vmovdqa32 {{.*#+}} ymm0 = [8,0,32,0,16,0,3,3]
+; AVX512CDVL-NEXT: retq
%out = call <8 x i32> @llvm.cttz.v8i32(<8 x i32> <i32 256, i32 -1, i32 0, i32 255, i32 -65536, i32 7, i32 24, i32 88>, i1 0)
ret <8 x i32> %out
}
define <8 x i32> @foldv8i32u() nounwind {
-; ALL-LABEL: foldv8i32u:
-; ALL: # BB#0:
-; ALL-NEXT: vmovaps {{.*#+}} ymm0 = [8,0,32,0,16,0,3,3]
-; ALL-NEXT: retq
+; AVX1-LABEL: foldv8i32u:
+; AVX1: # BB#0:
+; AVX1-NEXT: vmovaps {{.*#+}} ymm0 = [8,0,32,0,16,0,3,3]
+; AVX1-NEXT: retq
+;
+; AVX2-LABEL: foldv8i32u:
+; AVX2: # BB#0:
+; AVX2-NEXT: vmovaps {{.*#+}} ymm0 = [8,0,32,0,16,0,3,3]
+; AVX2-NEXT: retq
+;
+; AVX512CDVL-LABEL: foldv8i32u:
+; AVX512CDVL: # BB#0:
+; AVX512CDVL-NEXT: vmovdqa32 {{.*#+}} ymm0 = [8,0,32,0,16,0,3,3]
+; AVX512CDVL-NEXT: retq
%out = call <8 x i32> @llvm.cttz.v8i32(<8 x i32> <i32 256, i32 -1, i32 0, i32 255, i32 -65536, i32 7, i32 24, i32 88>, i1 -1)
ret <8 x i32> %out
}
define <16 x i16> @foldv16i16() nounwind {
-; ALL-LABEL: foldv16i16:
-; ALL: # BB#0:
-; ALL-NEXT: vmovaps {{.*#+}} ymm0 = [8,0,16,0,16,0,3,3,1,1,0,1,2,3,4,5]
-; ALL-NEXT: retq
+; AVX1-LABEL: foldv16i16:
+; AVX1: # BB#0:
+; AVX1-NEXT: vmovaps {{.*#+}} ymm0 = [8,0,16,0,16,0,3,3,1,1,0,1,2,3,4,5]
+; AVX1-NEXT: retq
+;
+; AVX2-LABEL: foldv16i16:
+; AVX2: # BB#0:
+; AVX2-NEXT: vmovaps {{.*#+}} ymm0 = [8,0,16,0,16,0,3,3,1,1,0,1,2,3,4,5]
+; AVX2-NEXT: retq
+;
+; AVX512CDVL-LABEL: foldv16i16:
+; AVX512CDVL: # BB#0:
+; AVX512CDVL-NEXT: vmovdqa64 {{.*#+}} ymm0 = [8,0,16,0,16,0,3,3,1,1,0,1,2,3,4,5]
+; AVX512CDVL-NEXT: retq
%out = call <16 x i16> @llvm.cttz.v16i16(<16 x i16> <i16 256, i16 -1, i16 0, i16 255, i16 -65536, i16 7, i16 24, i16 88, i16 -2, i16 254, i16 1, i16 2, i16 4, i16 8, i16 16, i16 32>, i1 0)
ret <16 x i16> %out
}
define <16 x i16> @foldv16i16u() nounwind {
-; ALL-LABEL: foldv16i16u:
-; ALL: # BB#0:
-; ALL-NEXT: vmovaps {{.*#+}} ymm0 = [8,0,16,0,16,0,3,3,1,1,0,1,2,3,4,5]
-; ALL-NEXT: retq
+; AVX1-LABEL: foldv16i16u:
+; AVX1: # BB#0:
+; AVX1-NEXT: vmovaps {{.*#+}} ymm0 = [8,0,16,0,16,0,3,3,1,1,0,1,2,3,4,5]
+; AVX1-NEXT: retq
+;
+; AVX2-LABEL: foldv16i16u:
+; AVX2: # BB#0:
+; AVX2-NEXT: vmovaps {{.*#+}} ymm0 = [8,0,16,0,16,0,3,3,1,1,0,1,2,3,4,5]
+; AVX2-NEXT: retq
+;
+; AVX512CDVL-LABEL: foldv16i16u:
+; AVX512CDVL: # BB#0:
+; AVX512CDVL-NEXT: vmovdqa64 {{.*#+}} ymm0 = [8,0,16,0,16,0,3,3,1,1,0,1,2,3,4,5]
+; AVX512CDVL-NEXT: retq
%out = call <16 x i16> @llvm.cttz.v16i16(<16 x i16> <i16 256, i16 -1, i16 0, i16 255, i16 -65536, i16 7, i16 24, i16 88, i16 -2, i16 254, i16 1, i16 2, i16 4, i16 8, i16 16, i16 32>, i1 -1)
ret <16 x i16> %out
}
define <32 x i8> @foldv32i8() nounwind {
-; ALL-LABEL: foldv32i8:
-; ALL: # BB#0:
-; ALL-NEXT: vmovaps {{.*#+}} ymm0 = [8,0,8,0,8,0,3,3,1,1,0,1,2,3,4,5,6,7,8,8,7,6,5,4,3,2,1,0,0,0,0,0]
-; ALL-NEXT: retq
+; AVX1-LABEL: foldv32i8:
+; AVX1: # BB#0:
+; AVX1-NEXT: vmovaps {{.*#+}} ymm0 = [8,0,8,0,8,0,3,3,1,1,0,1,2,3,4,5,6,7,8,8,7,6,5,4,3,2,1,0,0,0,0,0]
+; AVX1-NEXT: retq
+;
+; AVX2-LABEL: foldv32i8:
+; AVX2: # BB#0:
+; AVX2-NEXT: vmovaps {{.*#+}} ymm0 = [8,0,8,0,8,0,3,3,1,1,0,1,2,3,4,5,6,7,8,8,7,6,5,4,3,2,1,0,0,0,0,0]
+; AVX2-NEXT: retq
+;
+; AVX512CDVL-LABEL: foldv32i8:
+; AVX512CDVL: # BB#0:
+; AVX512CDVL-NEXT: vmovdqa64 {{.*#+}} ymm0 = [8,0,8,0,8,0,3,3,1,1,0,1,2,3,4,5,6,7,8,8,7,6,5,4,3,2,1,0,0,0,0,0]
+; AVX512CDVL-NEXT: retq
%out = call <32 x i8> @llvm.cttz.v32i8(<32 x i8> <i8 256, i8 -1, i8 0, i8 255, i8 -65536, i8 7, i8 24, i8 88, i8 -2, i8 254, i8 1, i8 2, i8 4, i8 8, i8 16, i8 32, i8 64, i8 128, i8 256, i8 -256, i8 -128, i8 -64, i8 -32, i8 -16, i8 -8, i8 -4, i8 -2, i8 -1, i8 3, i8 5, i8 7, i8 127>, i1 0)
ret <32 x i8> %out
}
define <32 x i8> @foldv32i8u() nounwind {
-; ALL-LABEL: foldv32i8u:
-; ALL: # BB#0:
-; ALL-NEXT: vmovaps {{.*#+}} ymm0 = [8,0,8,0,8,0,3,3,1,1,0,1,2,3,4,5,6,7,8,8,7,6,5,4,3,2,1,0,0,0,0,0]
-; ALL-NEXT: retq
+; AVX1-LABEL: foldv32i8u:
+; AVX1: # BB#0:
+; AVX1-NEXT: vmovaps {{.*#+}} ymm0 = [8,0,8,0,8,0,3,3,1,1,0,1,2,3,4,5,6,7,8,8,7,6,5,4,3,2,1,0,0,0,0,0]
+; AVX1-NEXT: retq
+;
+; AVX2-LABEL: foldv32i8u:
+; AVX2: # BB#0:
+; AVX2-NEXT: vmovaps {{.*#+}} ymm0 = [8,0,8,0,8,0,3,3,1,1,0,1,2,3,4,5,6,7,8,8,7,6,5,4,3,2,1,0,0,0,0,0]
+; AVX2-NEXT: retq
+;
+; AVX512CDVL-LABEL: foldv32i8u:
+; AVX512CDVL: # BB#0:
+; AVX512CDVL-NEXT: vmovdqa64 {{.*#+}} ymm0 = [8,0,8,0,8,0,3,3,1,1,0,1,2,3,4,5,6,7,8,8,7,6,5,4,3,2,1,0,0,0,0,0]
+; AVX512CDVL-NEXT: retq
%out = call <32 x i8> @llvm.cttz.v32i8(<32 x i8> <i8 256, i8 -1, i8 0, i8 255, i8 -65536, i8 7, i8 24, i8 88, i8 -2, i8 254, i8 1, i8 2, i8 4, i8 8, i8 16, i8 32, i8 64, i8 128, i8 256, i8 -256, i8 -128, i8 -64, i8 -32, i8 -16, i8 -8, i8 -4, i8 -2, i8 -1, i8 3, i8 5, i8 7, i8 127>, i1 -1)
ret <32 x i8> %out
}
