commit 8f5f7f9cb15387ddb010894c17e788b3116fe26d
author Reid Kleckner <rnk@google.com> Wed Feb 14 00:33:00 2018 +0000
committer Reid Kleckner <rnk@google.com> Wed Feb 14 00:33:00 2018 +0000
tree bbc20647d72a268e9c73ee47e47c12a085f443d4
parent 4e5fddc22a28e0e59d6409a98fb22eba32d0eae7

Merging r324645:
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r324645 | dwmw2 | 2018-02-08 12:06:05 -0800 (Thu, 08 Feb 2018) | 5 lines

[X86] Support 'V' register operand modifier

This allows the register name to be printed without the leading '%'.
This can be used for emitting calls to the retpoline thunks from inline
asm.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_50@325089 91177308-0d34-0410-b5e6-96231b3b80d8