[X86][AVX2] Hide VPBLENDD instructions behind AVX2 predicate

This was the cause of the regression in D57888 - the commuted load pattern wasn't hidden by the predicate so once we enabled v4i32 blends on SSE41+ targets then isel was incorrectly matched against AVX2+ instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354358 91177308-0d34-0410-b5e6-96231b3b80d8
1 file changed