ed761d68673372e6405a73e08e375ac0219fad82 - llvm

commit	ed761d68673372e6405a73e08e375ac0219fad82	[log] [tgz]
author	Alex Bradbury <asb@lowrisc.org>	Wed Mar 13 16:33:45 2019 +0000
committer	Alex Bradbury <asb@lowrisc.org>	Wed Mar 13 16:33:45 2019 +0000
tree	e6a521a1acb943079126f1b4c5bc5e68d7eb0018
parent	752b9de47d1eacab1c208cfddd3fa7631ec66845 [diff]

[RISCV] Only mark fp as reserved if the function has a dedicated frame pointer

This follows similar logic in the ARM and Mips backends, and allows the free
use of s0 in functions without a dedicated frame pointer. The changes in
callee-saved-gprs.ll most clearly show the effect of this patch.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@356063 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/RISCV/RISCVRegisterInfo.cpp[diff]
test/CodeGen/RISCV/atomic-rmw.ll[diff]
test/CodeGen/RISCV/bswap-ctlz-cttz-ctpop.ll[diff]
test/CodeGen/RISCV/callee-saved-gprs.ll[diff]
test/CodeGen/RISCV/calling-conv-ilp32-ilp32f-common.ll[diff]
test/CodeGen/RISCV/calling-conv-ilp32-ilp32f-ilp32d-common.ll[diff]
test/CodeGen/RISCV/calling-conv-ilp32.ll[diff]
test/CodeGen/RISCV/calling-conv-lp64-lp64f-common.ll[diff]
test/CodeGen/RISCV/calling-conv-lp64.ll[diff]
test/CodeGen/RISCV/calls.ll[diff]
test/CodeGen/RISCV/double-intrinsics.ll[diff]
test/CodeGen/RISCV/double-mem.ll[diff]
test/CodeGen/RISCV/float-br-fcmp.ll[diff]
test/CodeGen/RISCV/float-intrinsics.ll[diff]
test/CodeGen/RISCV/float-mem.ll[diff]
test/CodeGen/RISCV/large-stack.ll[diff]
test/CodeGen/RISCV/remat.ll[diff]
test/CodeGen/RISCV/rv32i-rv64i-float-double.ll[diff]
test/CodeGen/RISCV/umulo-128-legalisation-lowering.ll[diff]
test/CodeGen/RISCV/vararg.ll[diff]

20 files changed

tree: e6a521a1acb943079126f1b4c5bc5e68d7eb0018