| # RUN: llc -mtriple=thumbv8.1m.main %s -run-pass=arm-low-overhead-loops -o - |
| # CHECK: bb.1.for.body.preheader: |
| # CHECK: $lr = t2DLS |
| # CHECK-NOT: t2LoopDec |
| # CHECK: bb.6.for.inc: |
| # CHECK: $lr = t2LEUpdate renamable $lr, %bb.2 |
| |
| --- | |
| target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64" |
| target triple = "thumbv8.1m.main-unknown-unknown" |
| |
| ; Function Attrs: norecurse nounwind readonly |
| define dso_local arm_aapcscc i32 @search(i8* nocapture readonly %c, i32 %N) local_unnamed_addr #0 { |
| entry: |
| %cmp11 = icmp eq i32 %N, 0 |
| br i1 %cmp11, label %for.cond.cleanup, label %for.body.preheader |
| |
| for.body.preheader: |
| call void @llvm.set.loop.iterations.i32(i32 %N) |
| br label %for.body |
| |
| for.cond.cleanup: |
| %found.0.lcssa = phi i32 [ 0, %entry ], [ %found.1, %for.inc ] |
| %spaces.0.lcssa = phi i32 [ 0, %entry ], [ %spaces.1, %for.inc ] |
| %sub = sub nsw i32 %found.0.lcssa, %spaces.0.lcssa |
| ret i32 %sub |
| |
| for.body: |
| %lsr.iv1 = phi i8* [ %c, %for.body.preheader ], [ %scevgep, %for.inc ] |
| %spaces.013 = phi i32 [ %spaces.1, %for.inc ], [ 0, %for.body.preheader ] |
| %found.012 = phi i32 [ %found.1, %for.inc ], [ 0, %for.body.preheader ] |
| %0 = phi i32 [ %N, %for.body.preheader ], [ %3, %for.inc ] |
| %1 = load i8, i8* %lsr.iv1, align 1 |
| %2 = zext i8 %1 to i32 |
| switch i32 %2, label %for.inc [ |
| i32 108, label %sw.bb |
| i32 111, label %sw.bb |
| i32 112, label %sw.bb |
| i32 32, label %sw.bb1 |
| ] |
| |
| sw.bb: |
| %inc = add nsw i32 %found.012, 1 |
| br label %for.inc |
| |
| sw.bb1: |
| %inc2 = add nsw i32 %spaces.013, 1 |
| br label %for.inc |
| |
| for.inc: |
| %found.1 = phi i32 [ %found.012, %for.body ], [ %found.012, %sw.bb1 ], [ %inc, %sw.bb ] |
| %spaces.1 = phi i32 [ %spaces.013, %for.body ], [ %inc2, %sw.bb1 ], [ %spaces.013, %sw.bb ] |
| %scevgep = getelementptr i8, i8* %lsr.iv1, i32 1 |
| %3 = call i32 @llvm.loop.decrement.reg.i32.i32.i32(i32 %0, i32 1) |
| %4 = icmp ne i32 %3, 0 |
| br i1 %4, label %for.body, label %for.cond.cleanup |
| } |
| |
| declare void @llvm.set.loop.iterations.i32(i32) #1 |
| declare i32 @llvm.loop.decrement.reg.i32.i32.i32(i32, i32) #1 |
| declare void @llvm.stackprotector(i8*, i8**) #2 |
| |
| attributes #0 = { norecurse nounwind readonly "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+armv8.1-m.main,+hwdiv,+ras,+soft-float,+strict-align,+thumb-mode,-crypto,-d32,-dotprod,-fp-armv8,-fp-armv8d16,-fp-armv8d16sp,-fp-armv8sp,-fp16,-fp16fml,-fp64,-fpregs,-fullfp16,-neon,-vfp2,-vfp2d16,-vfp2d16sp,-vfp2sp,-vfp3,-vfp3d16,-vfp3d16sp,-vfp3sp,-vfp4,-vfp4d16,-vfp4d16sp,-vfp4sp" "unsafe-fp-math"="false" "use-soft-float"="true" } |
| attributes #1 = { noduplicate nounwind } |
| attributes #2 = { nounwind } |
| |
| ... |
| --- |
| name: search |
| alignment: 1 |
| exposesReturnsTwice: false |
| legalized: false |
| regBankSelected: false |
| selected: false |
| failedISel: false |
| tracksRegLiveness: true |
| hasWinCFI: false |
| registers: [] |
| liveins: |
| - { reg: '$r0', virtual-reg: '' } |
| - { reg: '$r1', virtual-reg: '' } |
| frameInfo: |
| isFrameAddressTaken: false |
| isReturnAddressTaken: false |
| hasStackMap: false |
| hasPatchPoint: false |
| stackSize: 16 |
| offsetAdjustment: -8 |
| maxAlignment: 4 |
| adjustsStack: false |
| hasCalls: false |
| stackProtector: '' |
| maxCallFrameSize: 0 |
| cvBytesOfCalleeSavedRegisters: 0 |
| hasOpaqueSPAdjustment: false |
| hasVAStart: false |
| hasMustTailInVarArgFunc: false |
| localFrameSize: 0 |
| savePoint: '' |
| restorePoint: '' |
| fixedStack: [] |
| stack: |
| - { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4, |
| stack-id: default, callee-saved-register: '$lr', callee-saved-restored: false, |
| debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } |
| - { id: 1, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4, |
| stack-id: default, callee-saved-register: '$r7', callee-saved-restored: true, |
| debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } |
| - { id: 2, name: '', type: spill-slot, offset: -12, size: 4, alignment: 4, |
| stack-id: default, callee-saved-register: '$r6', callee-saved-restored: true, |
| debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } |
| - { id: 3, name: '', type: spill-slot, offset: -16, size: 4, alignment: 4, |
| stack-id: default, callee-saved-register: '$r4', callee-saved-restored: true, |
| debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } |
| constants: [] |
| machineFunctionInfo: {} |
| body: | |
| bb.0.entry: |
| successors: %bb.1(0x30000000), %bb.3(0x50000000) |
| liveins: $r0, $r1, $r4, $r6, $lr |
| |
| $sp = frame-setup t2STMDB_UPD $sp, 14, $noreg, killed $r4, killed $r6, $r7, killed $lr |
| frame-setup CFI_INSTRUCTION def_cfa_offset 16 |
| frame-setup CFI_INSTRUCTION offset $lr, -4 |
| frame-setup CFI_INSTRUCTION offset $r7, -8 |
| frame-setup CFI_INSTRUCTION offset $r6, -12 |
| frame-setup CFI_INSTRUCTION offset $r4, -16 |
| $r7 = frame-setup t2ADDri $sp, 8, 14, $noreg, $noreg |
| frame-setup CFI_INSTRUCTION def_cfa $r7, 8 |
| t2CMPri $r1, 0, 14, $noreg, implicit-def $cpsr |
| t2Bcc %bb.1, 0, killed $cpsr |
| |
| bb.3.for.body.preheader: |
| successors: %bb.4(0x80000000) |
| liveins: $r0, $r1 |
| |
| $lr = tMOVr $r1, 14, $noreg |
| t2DoLoopStart killed $r1 |
| renamable $r1 = t2MOVi 0, 14, $noreg, $noreg |
| renamable $r12 = t2MOVi 1, 14, $noreg, $noreg |
| renamable $r2 = t2MOVi 0, 14, $noreg, $noreg |
| |
| bb.4.for.body: |
| successors: %bb.5(0x26666665), %bb.6(0x5999999b) |
| liveins: $lr, $r0, $r1, $r2, $r12 |
| |
| renamable $r3 = t2LDRBi12 renamable $r0, 0, 14, $noreg :: (load 1 from %ir.lsr.iv1) |
| renamable $r4 = t2SUBri renamable $r3, 108, 14, $noreg, $noreg |
| renamable $lr = t2LoopDec killed renamable $lr, 1 |
| t2CMPri renamable $r4, 4, 14, $noreg, implicit-def $cpsr |
| t2Bcc %bb.5, 8, killed $cpsr |
| |
| bb.6.for.body: |
| successors: %bb.7(0x6db6db6e), %bb.5(0x12492492) |
| liveins: $lr, $r0, $r1, $r2, $r3, $r4, $r12 |
| |
| renamable $r4 = t2LSLrr renamable $r12, killed renamable $r4, 14, $noreg, $noreg |
| t2TSTri killed renamable $r4, 25, 14, $noreg, implicit-def $cpsr |
| t2Bcc %bb.5, 0, killed $cpsr |
| |
| bb.7.sw.bb: |
| successors: %bb.8(0x80000000) |
| liveins: $lr, $r0, $r1, $r2, $r12 |
| |
| renamable $r2 = nsw t2ADDri killed renamable $r2, 1, 14, $noreg, $noreg |
| t2B %bb.8, 14, $noreg |
| |
| bb.5.for.body: |
| successors: %bb.8(0x80000000) |
| liveins: $lr, $r0, $r1, $r2, $r3, $r12 |
| |
| t2CMPri killed renamable $r3, 32, 14, $noreg, implicit-def $cpsr |
| BUNDLE implicit-def dead $itstate, implicit-def $r1, implicit killed $r1, implicit killed $cpsr { |
| t2IT 0, 8, implicit-def $itstate |
| renamable $r1 = nsw t2ADDri killed renamable $r1, 1, 0, killed $cpsr, $noreg, implicit $r1, implicit internal killed $itstate |
| } |
| |
| bb.8.for.inc: |
| successors: %bb.4(0x7c000000), %bb.2(0x04000000) |
| liveins: $lr, $r0, $r1, $r2, $r12 |
| |
| renamable $r0 = t2ADDri killed renamable $r0, 1, 14, $noreg, $noreg |
| t2LoopEnd renamable $lr, %bb.4 |
| t2B %bb.2, 14, $noreg |
| |
| bb.2.for.cond.cleanup: |
| liveins: $r1, $r2 |
| |
| renamable $r0 = nsw t2SUBrr killed renamable $r2, killed renamable $r1, 14, $noreg, $noreg |
| $sp = t2LDMIA_RET $sp, 14, $noreg, def $r4, def $r6, def $r7, def $pc, implicit killed $r0 |
| |
| bb.1: |
| renamable $r2 = t2MOVi 0, 14, $noreg, $noreg |
| renamable $r1 = t2MOVi 0, 14, $noreg, $noreg |
| renamable $r0 = nsw t2SUBrr killed renamable $r2, killed renamable $r1, 14, $noreg, $noreg |
| $sp = t2LDMIA_RET $sp, 14, $noreg, def $r4, def $r6, def $r7, def $pc, implicit killed $r0 |
| |
| ... |
