Fix build of MiBench on FreeBSD RISC-V

Unlike other architectures the RISC-V headers on FreeBSD don't expose the
macros used here (since RISC-V does not provide floating-point traps).
This patch checks for the presence of FP_X_INV before using it.

Reviewed By: dim
Differential Revision: https://reviews.llvm.org/D89557
diff --git a/MultiSource/Benchmarks/MiBench/consumer-lame/lame.c b/MultiSource/Benchmarks/MiBench/consumer-lame/lame.c
index 3f51444..eb1c260 100644
--- a/MultiSource/Benchmarks/MiBench/consumer-lame/lame.c
+++ b/MultiSource/Benchmarks/MiBench/consumer-lame/lame.c
@@ -1202,9 +1202,9 @@
 {
 
   /*
-   *  Disable floating point exepctions
+   *  Disable floating point exceptions
    */
-#ifdef __FreeBSD__
+#if defined(__FreeBSD__) && defined(FP_X_INV) && defined(FP_X_DZ)
   {
   /* seet floating point mask to the Linux default */
   fp_except_t mask;