[mlir][AMDGPU] Updated `PermlaneSwapOp` to select correct val (#157586)

* as per the instruction description, updated `PermlaneSwapOp` to select
correct val
* updated corresponding lit tests

Issue it resolves: the block reduction was failing otherwise as we were
selecting the `{0}` always.

---------

Signed-off-by: xintin <gaurav.verma@amd.com>
GitOrigin-RevId: a2a9601ea49afff950f9267b378b30ef799d6ad9
3 files changed
tree: ce9c4d1f374b75b1f311d6474c1f253413fe64d6
  1. benchmark/
  2. cmake/
  3. docs/
  4. examples/
  5. include/
  6. lib/
  7. python/
  8. test/
  9. tools/
  10. unittests/
  11. utils/
  12. .clang-format
  13. .clang-tidy
  14. CMakeLists.txt
  15. LICENSE.TXT
  16. Maintainers.md
  17. README.md
README.md

Multi-Level Intermediate Representation

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