)]}'
{
  "commit": "d3c5b241b5a30d3471dc2c851185217915026c19",
  "tree": "ce9c4d1f374b75b1f311d6474c1f253413fe64d6",
  "parents": [
    "2db4cec5762f2ee4297c14ba047cc5c91c731f09"
  ],
  "author": {
    "name": "Gaurav Verma",
    "email": "48321602+xintin@users.noreply.github.com",
    "time": "Fri Sep 12 04:45:56 2025 -0700"
  },
  "committer": {
    "name": "Copybara-Service",
    "email": "copybara-worker@google.com",
    "time": "Fri Sep 12 04:50:39 2025 -0700"
  },
  "message": "[mlir][AMDGPU] Updated `PermlaneSwapOp` to select correct val (#157586)\n\n* as per the instruction description, updated `PermlaneSwapOp` to select\ncorrect val\n* updated corresponding lit tests\n\nIssue it resolves: the block reduction was failing otherwise as we were\nselecting the `{0}` always.\n\n---------\n\nSigned-off-by: xintin \u003cgaurav.verma@amd.com\u003e\nGitOrigin-RevId: a2a9601ea49afff950f9267b378b30ef799d6ad9\n",
  "tree_diff": [
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      "old_mode": 33188,
      "old_path": "lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp",
      "new_id": "0078eed8b7a6791a33fd34cb48a8613150c4da6e",
      "new_mode": 33188,
      "new_path": "lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp"
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      "old_mode": 33188,
      "old_path": "test/Conversion/AMDGPUToROCDL/permlane.mlir",
      "new_id": "a92321da8f357dbbd4e5972d7ae2edf8f72444c5",
      "new_mode": 33261,
      "new_path": "test/Conversion/AMDGPUToROCDL/permlane.mlir"
    },
    {
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}