cc8f1e1597f88ccc2a5e118f40409b35ace35c08 - llvm-project/llvm

commit: cc8f1e1597f88ccc2a5e118f40409b35ace35c08
[log]
author: Pavel Iliin <Pavel.Iliin@arm.com>
Tue Jul 14 19:36:56 2020 +0100
committer: Copybara-Service <copybara-worker@google.com>
Tue Oct 27 04:47:40 2020 -0700
tree: aa4f8b6dba0340b90f29f7a58e5e1eb8689d42fb
parent: 259e8afad1d9f2f407ab57ff8043a6a093bff55c [diff]

[ARM] VBIT/VBIF support added.

Vector bitwise selects are matched by pseudo VBSP instruction
and expanded to VBSL/VBIT/VBIF after register allocation
depend on operands registers to minimize extra copies.

GitOrigin-RevId: b9a6fb64281b6836e565ee39fb0d543bf184fd88

19 files changed

tree: aa4f8b6dba0340b90f29f7a58e5e1eb8689d42fb