commit 987467f60324556215f561a70faef3ed353598c3
author Craig Topper <craig.topper@sifive.com> Thu Apr 18 08:01:56 2024 -0700
committer Copybara-Service <copybara-worker@google.com> Thu Apr 18 08:06:17 2024 -0700
tree e6e4cae6ccba99f8af02c52bdae88c4bdf39934c
parent 110b54ded003707ac0ff8de355fff0f5b6606954

[RISCV] Remove IsEABI from RISCVZC::getStackAdjBase. (#89177)

The usage of IsEABI was only valid for RV32E. For RV64E, the stack
adjust
base needs to be 32 when ra,s0-s1 are being saved. Since it takes more
than 16 bytes to save 3 64-bit registers.

The spec lists the rv32e behavior explicitly, but not rv64e. My
assumption is that the only thing that changes with rv64e is which
registers can be used in the register list, but not how the register
list affects the stack_adj_base.

GitOrigin-RevId: cd0c94bb8558b6e26313694da18006a840521903