[lld] LLVM_FALLTHROUGH => [[fallthrough]]. NFC
With C++17 there is no Clang pedantic warning or MSVC C5051.
GitOrigin-RevId: ec04e45c0358aa47c4696e474c350b9d56e42923
diff --git a/COFF/Driver.cpp b/COFF/Driver.cpp
index 155e4ca..fac5e2f 100644
--- a/COFF/Driver.cpp
+++ b/COFF/Driver.cpp
@@ -232,7 +232,7 @@
"import library?");
break;
}
- LLVM_FALLTHROUGH;
+ [[fallthrough]];
default:
error(mbref.getBufferIdentifier() + ": unknown file type");
break;
diff --git a/ELF/Arch/AArch64.cpp b/ELF/Arch/AArch64.cpp
index fc564ab..974830c 100644
--- a/ELF/Arch/AArch64.cpp
+++ b/ELF/Arch/AArch64.cpp
@@ -375,7 +375,7 @@
case R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
case R_AARCH64_TLSDESC_ADR_PAGE21:
checkInt(loc, val, 33, rel);
- LLVM_FALLTHROUGH;
+ [[fallthrough]];
case R_AARCH64_ADR_PREL_PG_HI21_NC:
write32AArch64Addr(loc, val >> 12);
break;
@@ -392,7 +392,7 @@
// transformation by placing a R_AARCH64_JUMP26 relocation at the offset of
// the instruction we want to patch.
write32le(loc, 0x14000000);
- LLVM_FALLTHROUGH;
+ [[fallthrough]];
case R_AARCH64_CALL26:
checkInt(loc, val, 28, rel);
or32le(loc, (val & 0x0FFFFFFC) >> 2);
@@ -436,19 +436,19 @@
break;
case R_AARCH64_MOVW_UABS_G0:
checkUInt(loc, val, 16, rel);
- LLVM_FALLTHROUGH;
+ [[fallthrough]];
case R_AARCH64_MOVW_UABS_G0_NC:
or32le(loc, (val & 0xFFFF) << 5);
break;
case R_AARCH64_MOVW_UABS_G1:
checkUInt(loc, val, 32, rel);
- LLVM_FALLTHROUGH;
+ [[fallthrough]];
case R_AARCH64_MOVW_UABS_G1_NC:
or32le(loc, (val & 0xFFFF0000) >> 11);
break;
case R_AARCH64_MOVW_UABS_G2:
checkUInt(loc, val, 48, rel);
- LLVM_FALLTHROUGH;
+ [[fallthrough]];
case R_AARCH64_MOVW_UABS_G2_NC:
or32le(loc, (val & 0xFFFF00000000) >> 27);
break;
@@ -459,7 +459,7 @@
case R_AARCH64_MOVW_SABS_G0:
case R_AARCH64_TLSLE_MOVW_TPREL_G0:
checkInt(loc, val, 17, rel);
- LLVM_FALLTHROUGH;
+ [[fallthrough]];
case R_AARCH64_MOVW_PREL_G0_NC:
case R_AARCH64_TLSLE_MOVW_TPREL_G0_NC:
writeSMovWImm(loc, val);
@@ -468,7 +468,7 @@
case R_AARCH64_MOVW_SABS_G1:
case R_AARCH64_TLSLE_MOVW_TPREL_G1:
checkInt(loc, val, 33, rel);
- LLVM_FALLTHROUGH;
+ [[fallthrough]];
case R_AARCH64_MOVW_PREL_G1_NC:
case R_AARCH64_TLSLE_MOVW_TPREL_G1_NC:
writeSMovWImm(loc, val >> 16);
@@ -477,7 +477,7 @@
case R_AARCH64_MOVW_SABS_G2:
case R_AARCH64_TLSLE_MOVW_TPREL_G2:
checkInt(loc, val, 49, rel);
- LLVM_FALLTHROUGH;
+ [[fallthrough]];
case R_AARCH64_MOVW_PREL_G2_NC:
writeSMovWImm(loc, val >> 32);
break;
diff --git a/ELF/Arch/ARM.cpp b/ELF/Arch/ARM.cpp
index 425c458..f7d4c3b 100644
--- a/ELF/Arch/ARM.cpp
+++ b/ELF/Arch/ARM.cpp
@@ -311,7 +311,7 @@
// Otherwise we need to interwork if STT_FUNC Symbol has bit 0 set (Thumb).
if (s.isFunc() && expr == R_PC && (s.getVA() & 1))
return true;
- LLVM_FALLTHROUGH;
+ [[fallthrough]];
case R_ARM_CALL: {
uint64_t dst = (expr == R_PLT_PC) ? s.getPltVA() : s.getVA();
return !inBranchRange(type, branchAddr, dst + a);
@@ -322,7 +322,7 @@
// Otherwise we need to interwork if STT_FUNC Symbol has bit 0 clear (ARM).
if (expr == R_PLT_PC || (s.isFunc() && (s.getVA() & 1) == 0))
return true;
- LLVM_FALLTHROUGH;
+ [[fallthrough]];
case R_ARM_THM_CALL: {
uint64_t dst = (expr == R_PLT_PC) ? s.getPltVA() : s.getVA();
return !inBranchRange(type, branchAddr, dst + a);
@@ -550,7 +550,7 @@
write32le(loc, 0xeb000000 | (read32le(loc) & 0x00ffffff));
// fall through as BL encoding is shared with B
}
- LLVM_FALLTHROUGH;
+ [[fallthrough]];
case R_ARM_JUMP24:
case R_ARM_PC24:
case R_ARM_PLT32:
@@ -617,7 +617,7 @@
}
}
// Fall through as rest of encoding is the same as B.W
- LLVM_FALLTHROUGH;
+ [[fallthrough]];
case R_ARM_THM_JUMP24:
// Encoding B T4, BL T1, BLX T2: Val = S:I1:I2:imm10:imm11:0
checkInt(loc, val, 25, rel);
@@ -809,7 +809,7 @@
((lo & 0x7ff) << 1)); // imm11:0
break;
}
- LLVM_FALLTHROUGH;
+ [[fallthrough]];
case R_ARM_THM_JUMP24: {
// Encoding B T4, BL T1, BLX T2: A = S:I1:I2:imm10:imm11:0
// I1 = NOT(J1 EOR S), I2 = NOT(J2 EOR S)
diff --git a/ELF/Arch/Mips.cpp b/ELF/Arch/Mips.cpp
index 61da4a7..d5a335c 100644
--- a/ELF/Arch/Mips.cpp
+++ b/ELF/Arch/Mips.cpp
@@ -125,7 +125,7 @@
return R_MIPS_GOT_GP_PC;
if (&s == ElfSym::mipsLocalGp)
return R_MIPS_GOT_GP;
- LLVM_FALLTHROUGH;
+ [[fallthrough]];
case R_MIPS_32:
case R_MIPS_64:
case R_MIPS_GOT_OFST:
@@ -164,7 +164,7 @@
case R_MICROMIPS_GOT16:
if (s.isLocal())
return R_MIPS_GOT_LOCAL_PAGE;
- LLVM_FALLTHROUGH;
+ [[fallthrough]];
case R_MIPS_CALL16:
case R_MIPS_GOT_DISP:
case R_MIPS_TLS_GOTTPREL:
@@ -627,7 +627,7 @@
case R_MIPS_TLS_GOTTPREL:
case R_MIPS_TLS_LDM:
checkInt(loc, val, 16, rel);
- LLVM_FALLTHROUGH;
+ [[fallthrough]];
case R_MIPS_CALL_LO16:
case R_MIPS_GOT_LO16:
case R_MIPS_GOT_OFST:
diff --git a/ELF/Arch/PPC64.cpp b/ELF/Arch/PPC64.cpp
index f90e89c..1b4a7ba 100644
--- a/ELF/Arch/PPC64.cpp
+++ b/ELF/Arch/PPC64.cpp
@@ -1349,7 +1349,7 @@
// of the TLS block. Therefore, in the case of R_PPC64_DTPREL34 we first
// need to subtract that value then fallthrough to the general case.
val -= dynamicThreadPointerOffset;
- LLVM_FALLTHROUGH;
+ [[fallthrough]];
case R_PPC64_PCREL34:
case R_PPC64_GOT_PCREL34:
case R_PPC64_GOT_TLSGD_PCREL34:
diff --git a/ELF/InputFiles.cpp b/ELF/InputFiles.cpp
index c0961b4..a2f9523 100644
--- a/ELF/InputFiles.cpp
+++ b/ELF/InputFiles.cpp
@@ -772,7 +772,7 @@
break;
case SHT_LLVM_SYMPART:
ctx->hasSympart.store(true, std::memory_order_relaxed);
- LLVM_FALLTHROUGH;
+ [[fallthrough]];
default:
this->sections[i] =
createInputSection(i, sec, check(obj.getSectionName(sec, shstrtab)));
diff --git a/ELF/SyntheticSections.cpp b/ELF/SyntheticSections.cpp
index ff48f08..ace7048 100644
--- a/ELF/SyntheticSections.cpp
+++ b/ELF/SyntheticSections.cpp
@@ -1418,7 +1418,7 @@
r.sym->stOther & STO_AARCH64_VARIANT_PCS;
}) != in.relaPlt->relocs.end())
addInt(DT_AARCH64_VARIANT_PCS, 0);
- LLVM_FALLTHROUGH;
+ [[fallthrough]];
default:
addInSec(DT_PLTGOT, *in.gotPlt);
break;
