[ELF] Add isStaticRelSecType to simplify SHT_REL/SHT_RELA testing. NFC
and make it easier to introduce a new relocation format.
https://discourse.llvm.org/t/rfc-relleb-a-compact-relocation-format-for-elf/77600
Pull Request: https://github.com/llvm/llvm-project/pull/85893
GitOrigin-RevId: 0e47dfede468a292dd8cd893d6d0179052501383
diff --git a/ELF/InputFiles.cpp b/ELF/InputFiles.cpp
index 4a6e691..4c614c8 100644
--- a/ELF/InputFiles.cpp
+++ b/ELF/InputFiles.cpp
@@ -835,7 +835,7 @@
// We have a second loop. It is used to:
// 1) handle SHF_LINK_ORDER sections.
- // 2) create SHT_REL[A] sections. In some cases the section header index of a
+ // 2) create relocation sections. In some cases the section header index of a
// relocation section may be smaller than that of the relocated section. In
// such cases, the relocation section would attempt to reference a target
// section that has not yet been created. For simplicity, delay creation of
@@ -845,7 +845,7 @@
continue;
const Elf_Shdr &sec = objSections[i];
- if (sec.sh_type == SHT_REL || sec.sh_type == SHT_RELA) {
+ if (isStaticRelSecType(sec.sh_type)) {
// Find a relocation target section and associate this section with that.
// Target may have been discarded if it is in a different section group
// and the group is discarded, even though it's a violation of the spec.
diff --git a/ELF/InputSection.cpp b/ELF/InputSection.cpp
index 082e840..c34bf08 100644
--- a/ELF/InputSection.cpp
+++ b/ELF/InputSection.cpp
@@ -348,7 +348,7 @@
}
InputSectionBase *InputSection::getRelocatedSection() const {
- if (file->isInternal() || (type != SHT_RELA && type != SHT_REL))
+ if (file->isInternal() || !isStaticRelSecType(type))
return nullptr;
ArrayRef<InputSectionBase *> sections = file->getSections();
return sections[info];
diff --git a/ELF/InputSection.h b/ELF/InputSection.h
index b8af962..1fb7077 100644
--- a/ELF/InputSection.h
+++ b/ELF/InputSection.h
@@ -448,6 +448,10 @@
}
};
+inline bool isStaticRelSecType(uint32_t type) {
+ return type == llvm::ELF::SHT_RELA || type == llvm::ELF::SHT_REL;
+}
+
inline bool isDebugSection(const InputSectionBase &sec) {
return (sec.flags & llvm::ELF::SHF_ALLOC) == 0 &&
sec.name.starts_with(".debug");
diff --git a/ELF/LinkerScript.cpp b/ELF/LinkerScript.cpp
index 9e7647f..3af09a3 100644
--- a/ELF/LinkerScript.cpp
+++ b/ELF/LinkerScript.cpp
@@ -740,13 +740,12 @@
// should combine these relocation sections into single output.
// We skip synthetic sections because it can be .rela.dyn/.rela.plt or any
// other REL[A] sections created by linker itself.
- if (!isa<SyntheticSection>(isec) &&
- (isec->type == SHT_REL || isec->type == SHT_RELA)) {
+ if (!isa<SyntheticSection>(isec) && isStaticRelSecType(isec->type)) {
auto *sec = cast<InputSection>(isec);
OutputSection *out = sec->getRelocatedSection()->getOutputSection();
- if (out->relocationSection) {
- out->relocationSection->recordSection(sec);
+ if (auto *relSec = out->relocationSection) {
+ relSec->recordSection(sec);
return nullptr;
}
diff --git a/ELF/MarkLive.cpp b/ELF/MarkLive.cpp
index 93c66e8..45431e4 100644
--- a/ELF/MarkLive.cpp
+++ b/ELF/MarkLive.cpp
@@ -276,8 +276,7 @@
// collection.
// - Groups members are retained or discarded as a unit.
if (!(sec->flags & SHF_ALLOC)) {
- bool isRel = sec->type == SHT_REL || sec->type == SHT_RELA;
- if (!isRel && !sec->nextInSectionGroup) {
+ if (!isStaticRelSecType(sec->type) && !sec->nextInSectionGroup) {
sec->markLive();
for (InputSection *isec : sec->dependentSections)
isec->markLive();
diff --git a/ELF/OutputSections.cpp b/ELF/OutputSections.cpp
index f986aa5..eadab9d 100644
--- a/ELF/OutputSections.cpp
+++ b/ELF/OutputSections.cpp
@@ -615,7 +615,7 @@
return;
}
- if (!config->copyRelocs || (type != SHT_RELA && type != SHT_REL))
+ if (!config->copyRelocs || !isStaticRelSecType(type))
return;
// Skip if 'first' is synthetic, i.e. not a section created by --emit-relocs.
@@ -750,7 +750,7 @@
void OutputSection::checkDynRelAddends(const uint8_t *bufStart) {
assert(config->writeAddends && config->checkDynamicRelocs);
- assert(type == SHT_REL || type == SHT_RELA);
+ assert(isStaticRelSecType(type));
SmallVector<InputSection *, 0> storage;
ArrayRef<InputSection *> sections = getInputSections(*this, storage);
parallelFor(0, sections.size(), [&](size_t i) {
diff --git a/ELF/Writer.cpp b/ELF/Writer.cpp
index d8782af..4eca7b2 100644
--- a/ELF/Writer.cpp
+++ b/ELF/Writer.cpp
@@ -796,7 +796,7 @@
continue;
for (InputSectionBase *s : isd->sections) {
// Relocations are not using REL[A] section symbols.
- if (s->type == SHT_REL || s->type == SHT_RELA)
+ if (isStaticRelSecType(s->type))
continue;
// Unlike other synthetic sections, mergeable output sections contain
@@ -3045,20 +3045,20 @@
// section while doing it.
parallel::TaskGroup tg;
for (OutputSection *sec : outputSections)
- if (sec->type == SHT_REL || sec->type == SHT_RELA)
+ if (isStaticRelSecType(sec->type))
sec->writeTo<ELFT>(Out::bufferStart + sec->offset, tg);
}
{
parallel::TaskGroup tg;
for (OutputSection *sec : outputSections)
- if (sec->type != SHT_REL && sec->type != SHT_RELA)
+ if (!isStaticRelSecType(sec->type))
sec->writeTo<ELFT>(Out::bufferStart + sec->offset, tg);
}
// Finally, check that all dynamic relocation addends were written correctly.
if (config->checkDynamicRelocs && config->writeAddends) {
for (OutputSection *sec : outputSections)
- if (sec->type == SHT_REL || sec->type == SHT_RELA)
+ if (isStaticRelSecType(sec->type))
sec->checkDynRelAddends(Out::bufferStart);
}
}
