| // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ --version 5 |
| // RUN: %clang_cc1 -std=c++11 -fopenmp -fopenmp-version=51 -triple x86_64 \ |
| // RUN: -emit-llvm -o - %s | FileCheck --check-prefix OMP51 %s |
| |
| // RUN: %clang_cc1 -std=c++11 -fopenmp -fopenmp-version=60 -triple x86_64 \ |
| // RUN: -emit-llvm -o - %s | FileCheck --check-prefix OMP60 %s |
| |
| // RUN: %clang_cc1 -std=c++11 -fopenmp-simd -fopenmp-version=51 \ |
| // RUN: -debug-info-kind=limited -triple x86_64 -emit-llvm -o - %s | \ |
| // RUN: FileCheck --check-prefix SIMD %s |
| |
| // RUN: %clang_cc1 -std=c++11 -fopenmp-simd -fopenmp-version=60 \ |
| // RUN: -debug-info-kind=limited -triple x86_64 -emit-llvm -o - %s | \ |
| // RUN: FileCheck --check-prefix SIMD %s |
| |
| |
| void foo() {} |
| |
| template <typename T, int N> |
| int tmain(T argc, char **argv) { |
| T b = argc, c, d, e, f, g; |
| static int a; |
| const char str1[] = "msg"; |
| const char *str2 = "msg"; |
| char str3[] = "msg"; |
| char *str4 = str3; |
| char * const str5 = str3; |
| #pragma omp error at(execution) severity(fatal) message("GNU compiler required.") |
| #pragma omp error at(execution) severity(fatal) message(str1) |
| #pragma omp error at(execution) severity(fatal) message(str2) |
| #pragma omp error at(execution) severity(fatal) message(str3) |
| #pragma omp error at(execution) severity(fatal) message(str4) |
| #pragma omp error at(execution) severity(fatal) message(str5) |
| a = argv[0][0]; |
| ++a; |
| #pragma omp error at(execution) severity(warning) message("Notice: add for loop.") |
| #pragma omp error at(execution) severity(warning) message(str1) |
| #pragma omp error at(execution) severity(warning) message(str2) |
| #pragma omp error at(execution) severity(warning) message(str3) |
| #pragma omp error at(execution) severity(warning) message(str4) |
| #pragma omp error at(execution) severity(warning) message(str5) |
| { |
| int b = 10; |
| T c = 100; |
| a = b + c; |
| } |
| #pragma omp error at(execution) severity(fatal) message("GPU compiler required.") |
| #pragma omp error at(execution) severity(fatal) message(str1) |
| #pragma omp error at(execution) severity(fatal) message(str2) |
| #pragma omp error at(execution) severity(fatal) message(str3) |
| #pragma omp error at(execution) severity(fatal) message(str4) |
| #pragma omp error at(execution) severity(fatal) message(str5) |
| foo(); |
| return N; |
| } |
| |
| |
| |
| int main (int argc, char **argv) { |
| int b = argc, c, d, e, f, g; |
| static int a; |
| const char str1[] = "msg"; |
| const char *str2 = "msg"; |
| char str3[] = "msg"; |
| char *str4 = str3; |
| char * const str5 = str3; |
| #pragma omp error at(execution) severity(fatal) message("GPU compiler required.") |
| #pragma omp error at(execution) severity(fatal) message(str1) |
| #pragma omp error at(execution) severity(fatal) message(str2) |
| #pragma omp error at(execution) severity(fatal) message(str3) |
| #pragma omp error at(execution) severity(fatal) message(str4) |
| #pragma omp error at(execution) severity(fatal) message(str5) |
| a=2; |
| #pragma omp error at(execution) severity(warning) message("Note this is functioncall.") |
| #pragma omp error at(execution) severity(warning) message(str1) |
| #pragma omp error at(execution) severity(warning) message(str2) |
| #pragma omp error at(execution) severity(warning) message(str3) |
| #pragma omp error at(execution) severity(warning) message(str4) |
| #pragma omp error at(execution) severity(warning) message(str5) |
| foo(); |
| tmain<int, 10>(argc, argv); |
| } |
| |
| // CHECK-LABEL: define dso_local void @_Z3foov( |
| // CHECK-SAME: ) #[[ATTR0:[0-9]+]] { |
| // CHECK-NEXT: [[ENTRY:.*:]] |
| // CHECK-NEXT: ret void |
| // CHECK-LABEL: define dso_local noundef i32 @main( |
| // CHECK-SAME: i32 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR1:[0-9]+]] { |
| // CHECK-NEXT: [[ENTRY:.*:]] |
| // CHECK-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 |
| // CHECK-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 8 |
| // CHECK-NEXT: [[B:%.*]] = alloca i32, align 4 |
| // CHECK-NEXT: [[C:%.*]] = alloca i32, align 4 |
| // CHECK-NEXT: [[D:%.*]] = alloca i32, align 4 |
| // CHECK-NEXT: [[E:%.*]] = alloca i32, align 4 |
| // CHECK-NEXT: [[F:%.*]] = alloca i32, align 4 |
| // CHECK-NEXT: [[G:%.*]] = alloca i32, align 4 |
| // CHECK-NEXT: [[STR1:%.*]] = alloca [4 x i8], align 1 |
| // CHECK-NEXT: [[STR2:%.*]] = alloca ptr, align 8 |
| // CHECK-NEXT: [[STR3:%.*]] = alloca [4 x i8], align 1 |
| // CHECK-NEXT: [[STR4:%.*]] = alloca ptr, align 8 |
| // CHECK-NEXT: [[STR5:%.*]] = alloca ptr, align 8 |
| // CHECK-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 |
| // CHECK-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 8 |
| // CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4 |
| // CHECK-NEXT: store i32 [[TMP0]], ptr [[B]], align 4 |
| // CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 1 [[STR1]], ptr align 1 @__const.main.str1, i64 4, i1 false) |
| // CHECK-NEXT: store ptr @.str, ptr [[STR2]], align 8 |
| // CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 1 [[STR3]], ptr align 1 @__const.main.str3, i64 4, i1 false) |
| // CHECK-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [4 x i8], ptr [[STR3]], i64 0, i64 0 |
| // CHECK-NEXT: store ptr [[ARRAYDECAY]], ptr [[STR4]], align 8 |
| // CHECK-NEXT: [[ARRAYDECAY1:%.*]] = getelementptr inbounds [4 x i8], ptr [[STR3]], i64 0, i64 0 |
| // CHECK-NEXT: store ptr [[ARRAYDECAY1]], ptr [[STR5]], align 8 |
| // CHECK-NEXT: call void @__kmpc_error(ptr @[[GLOB1:[0-9]+]], i32 2, ptr @.str.1) |
| // CHECK-NEXT: [[ARRAYDECAY2:%.*]] = getelementptr inbounds [4 x i8], ptr [[STR1]], i64 0, i64 0 |
| // CHECK-NEXT: call void @__kmpc_error(ptr @[[GLOB3:[0-9]+]], i32 2, ptr [[ARRAYDECAY2]]) |
| // CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[STR2]], align 8 |
| // CHECK-NEXT: call void @__kmpc_error(ptr @[[GLOB5:[0-9]+]], i32 2, ptr [[TMP1]]) |
| // CHECK-NEXT: [[ARRAYDECAY3:%.*]] = getelementptr inbounds [4 x i8], ptr [[STR3]], i64 0, i64 0 |
| // CHECK-NEXT: call void @__kmpc_error(ptr @[[GLOB7:[0-9]+]], i32 2, ptr [[ARRAYDECAY3]]) |
| // CHECK-NEXT: [[TMP2:%.*]] = load ptr, ptr [[STR4]], align 8 |
| // CHECK-NEXT: call void @__kmpc_error(ptr @[[GLOB9:[0-9]+]], i32 2, ptr [[TMP2]]) |
| // CHECK-NEXT: [[TMP3:%.*]] = load ptr, ptr [[STR5]], align 8 |
| // CHECK-NEXT: call void @__kmpc_error(ptr @[[GLOB11:[0-9]+]], i32 2, ptr [[TMP3]]) |
| // CHECK-NEXT: store i32 2, ptr @_ZZ4mainE1a, align 4 |
| // CHECK-NEXT: call void @__kmpc_error(ptr @[[GLOB13:[0-9]+]], i32 1, ptr @.str.2) |
| // CHECK-NEXT: [[ARRAYDECAY4:%.*]] = getelementptr inbounds [4 x i8], ptr [[STR1]], i64 0, i64 0 |
| // CHECK-NEXT: call void @__kmpc_error(ptr @[[GLOB15:[0-9]+]], i32 1, ptr [[ARRAYDECAY4]]) |
| // CHECK-NEXT: [[TMP4:%.*]] = load ptr, ptr [[STR2]], align 8 |
| // CHECK-NEXT: call void @__kmpc_error(ptr @[[GLOB17:[0-9]+]], i32 1, ptr [[TMP4]]) |
| // CHECK-NEXT: [[ARRAYDECAY5:%.*]] = getelementptr inbounds [4 x i8], ptr [[STR3]], i64 0, i64 0 |
| // CHECK-NEXT: call void @__kmpc_error(ptr @[[GLOB19:[0-9]+]], i32 1, ptr [[ARRAYDECAY5]]) |
| // CHECK-NEXT: [[TMP5:%.*]] = load ptr, ptr [[STR4]], align 8 |
| // CHECK-NEXT: call void @__kmpc_error(ptr @[[GLOB21:[0-9]+]], i32 1, ptr [[TMP5]]) |
| // CHECK-NEXT: [[TMP6:%.*]] = load ptr, ptr [[STR5]], align 8 |
| // CHECK-NEXT: call void @__kmpc_error(ptr @[[GLOB23:[0-9]+]], i32 1, ptr [[TMP6]]) |
| // CHECK-NEXT: call void @_Z3foov() |
| // CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4 |
| // CHECK-NEXT: [[TMP8:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8 |
| // CHECK-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_PPc(i32 noundef [[TMP7]], ptr noundef [[TMP8]]) |
| // CHECK-NEXT: ret i32 0 |
| // CHECK-LABEL: define linkonce_odr noundef i32 @_Z5tmainIiLi10EEiT_PPc( |
| // CHECK-SAME: i32 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0]] comdat { |
| // CHECK-NEXT: [[ENTRY:.*:]] |
| // CHECK-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 |
| // CHECK-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 8 |
| // CHECK-NEXT: [[B:%.*]] = alloca i32, align 4 |
| // CHECK-NEXT: [[C:%.*]] = alloca i32, align 4 |
| // CHECK-NEXT: [[D:%.*]] = alloca i32, align 4 |
| // CHECK-NEXT: [[E:%.*]] = alloca i32, align 4 |
| // CHECK-NEXT: [[F:%.*]] = alloca i32, align 4 |
| // CHECK-NEXT: [[G:%.*]] = alloca i32, align 4 |
| // CHECK-NEXT: [[STR1:%.*]] = alloca [4 x i8], align 1 |
| // CHECK-NEXT: [[STR2:%.*]] = alloca ptr, align 8 |
| // CHECK-NEXT: [[STR3:%.*]] = alloca [4 x i8], align 1 |
| // CHECK-NEXT: [[STR4:%.*]] = alloca ptr, align 8 |
| // CHECK-NEXT: [[STR5:%.*]] = alloca ptr, align 8 |
| // CHECK-NEXT: [[B7:%.*]] = alloca i32, align 4 |
| // CHECK-NEXT: [[C8:%.*]] = alloca i32, align 4 |
| // CHECK-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 |
| // CHECK-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 8 |
| // CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4 |
| // CHECK-NEXT: store i32 [[TMP0]], ptr [[B]], align 4 |
| // CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 1 [[STR1]], ptr align 1 @__const._Z5tmainIiLi10EEiT_PPc.str1, i64 4, i1 false) |
| // CHECK-NEXT: store ptr @.str, ptr [[STR2]], align 8 |
| // CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 1 [[STR3]], ptr align 1 @__const._Z5tmainIiLi10EEiT_PPc.str3, i64 4, i1 false) |
| // CHECK-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [4 x i8], ptr [[STR3]], i64 0, i64 0 |
| // CHECK-NEXT: store ptr [[ARRAYDECAY]], ptr [[STR4]], align 8 |
| // CHECK-NEXT: [[ARRAYDECAY1:%.*]] = getelementptr inbounds [4 x i8], ptr [[STR3]], i64 0, i64 0 |
| // CHECK-NEXT: store ptr [[ARRAYDECAY1]], ptr [[STR5]], align 8 |
| // CHECK-NEXT: call void @__kmpc_error(ptr @[[GLOB25:[0-9]+]], i32 2, ptr @.str.3) |
| // CHECK-NEXT: [[ARRAYDECAY2:%.*]] = getelementptr inbounds [4 x i8], ptr [[STR1]], i64 0, i64 0 |
| // CHECK-NEXT: call void @__kmpc_error(ptr @[[GLOB27:[0-9]+]], i32 2, ptr [[ARRAYDECAY2]]) |
| // CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[STR2]], align 8 |
| // CHECK-NEXT: call void @__kmpc_error(ptr @[[GLOB29:[0-9]+]], i32 2, ptr [[TMP1]]) |
| // CHECK-NEXT: [[ARRAYDECAY3:%.*]] = getelementptr inbounds [4 x i8], ptr [[STR3]], i64 0, i64 0 |
| // CHECK-NEXT: call void @__kmpc_error(ptr @[[GLOB31:[0-9]+]], i32 2, ptr [[ARRAYDECAY3]]) |
| // CHECK-NEXT: [[TMP2:%.*]] = load ptr, ptr [[STR4]], align 8 |
| // CHECK-NEXT: call void @__kmpc_error(ptr @[[GLOB33:[0-9]+]], i32 2, ptr [[TMP2]]) |
| // CHECK-NEXT: [[TMP3:%.*]] = load ptr, ptr [[STR5]], align 8 |
| // CHECK-NEXT: call void @__kmpc_error(ptr @[[GLOB35:[0-9]+]], i32 2, ptr [[TMP3]]) |
| // CHECK-NEXT: [[TMP4:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8 |
| // CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds ptr, ptr [[TMP4]], i64 0 |
| // CHECK-NEXT: [[TMP5:%.*]] = load ptr, ptr [[ARRAYIDX]], align 8 |
| // CHECK-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds i8, ptr [[TMP5]], i64 0 |
| // CHECK-NEXT: [[TMP6:%.*]] = load i8, ptr [[ARRAYIDX4]], align 1 |
| // CHECK-NEXT: [[CONV:%.*]] = sext i8 [[TMP6]] to i32 |
| // CHECK-NEXT: store i32 [[CONV]], ptr @_ZZ5tmainIiLi10EEiT_PPcE1a, align 4 |
| // CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr @_ZZ5tmainIiLi10EEiT_PPcE1a, align 4 |
| // CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1 |
| // CHECK-NEXT: store i32 [[INC]], ptr @_ZZ5tmainIiLi10EEiT_PPcE1a, align 4 |
| // CHECK-NEXT: call void @__kmpc_error(ptr @[[GLOB37:[0-9]+]], i32 1, ptr @.str.4) |
| // CHECK-NEXT: [[ARRAYDECAY5:%.*]] = getelementptr inbounds [4 x i8], ptr [[STR1]], i64 0, i64 0 |
| // CHECK-NEXT: call void @__kmpc_error(ptr @[[GLOB39:[0-9]+]], i32 1, ptr [[ARRAYDECAY5]]) |
| // CHECK-NEXT: [[TMP8:%.*]] = load ptr, ptr [[STR2]], align 8 |
| // CHECK-NEXT: call void @__kmpc_error(ptr @[[GLOB41:[0-9]+]], i32 1, ptr [[TMP8]]) |
| // CHECK-NEXT: [[ARRAYDECAY6:%.*]] = getelementptr inbounds [4 x i8], ptr [[STR3]], i64 0, i64 0 |
| // CHECK-NEXT: call void @__kmpc_error(ptr @[[GLOB43:[0-9]+]], i32 1, ptr [[ARRAYDECAY6]]) |
| // CHECK-NEXT: [[TMP9:%.*]] = load ptr, ptr [[STR4]], align 8 |
| // CHECK-NEXT: call void @__kmpc_error(ptr @[[GLOB45:[0-9]+]], i32 1, ptr [[TMP9]]) |
| // CHECK-NEXT: [[TMP10:%.*]] = load ptr, ptr [[STR5]], align 8 |
| // CHECK-NEXT: call void @__kmpc_error(ptr @[[GLOB47:[0-9]+]], i32 1, ptr [[TMP10]]) |
| // CHECK-NEXT: store i32 10, ptr [[B7]], align 4 |
| // CHECK-NEXT: store i32 100, ptr [[C8]], align 4 |
| // CHECK-NEXT: [[TMP11:%.*]] = load i32, ptr [[B7]], align 4 |
| // CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr [[C8]], align 4 |
| // CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] |
| // CHECK-NEXT: store i32 [[ADD]], ptr @_ZZ5tmainIiLi10EEiT_PPcE1a, align 4 |
| // CHECK-NEXT: call void @__kmpc_error(ptr @[[GLOB49:[0-9]+]], i32 2, ptr @.str.1) |
| // CHECK-NEXT: [[ARRAYDECAY9:%.*]] = getelementptr inbounds [4 x i8], ptr [[STR1]], i64 0, i64 0 |
| // CHECK-NEXT: call void @__kmpc_error(ptr @[[GLOB51:[0-9]+]], i32 2, ptr [[ARRAYDECAY9]]) |
| // CHECK-NEXT: [[TMP13:%.*]] = load ptr, ptr [[STR2]], align 8 |
| // CHECK-NEXT: call void @__kmpc_error(ptr @[[GLOB53:[0-9]+]], i32 2, ptr [[TMP13]]) |
| // CHECK-NEXT: [[ARRAYDECAY10:%.*]] = getelementptr inbounds [4 x i8], ptr [[STR3]], i64 0, i64 0 |
| // CHECK-NEXT: call void @__kmpc_error(ptr @[[GLOB55:[0-9]+]], i32 2, ptr [[ARRAYDECAY10]]) |
| // CHECK-NEXT: [[TMP14:%.*]] = load ptr, ptr [[STR4]], align 8 |
| // CHECK-NEXT: call void @__kmpc_error(ptr @[[GLOB57:[0-9]+]], i32 2, ptr [[TMP14]]) |
| // CHECK-NEXT: [[TMP15:%.*]] = load ptr, ptr [[STR5]], align 8 |
| // CHECK-NEXT: call void @__kmpc_error(ptr @[[GLOB59:[0-9]+]], i32 2, ptr [[TMP15]]) |
| // CHECK-NEXT: call void @_Z3foov() |
| // CHECK-NEXT: ret i32 10 |
| // OMP51-LABEL: define dso_local void @_Z3foov( |
| // OMP51-SAME: ) #[[ATTR0:[0-9]+]] { |
| // OMP51-NEXT: [[ENTRY:.*:]] |
| // OMP51-NEXT: ret void |
| // |
| // |
| // OMP51-LABEL: define dso_local noundef i32 @main( |
| // OMP51-SAME: i32 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR1:[0-9]+]] { |
| // OMP51-NEXT: [[ENTRY:.*:]] |
| // OMP51-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 |
| // OMP51-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 8 |
| // OMP51-NEXT: [[B:%.*]] = alloca i32, align 4 |
| // OMP51-NEXT: [[C:%.*]] = alloca i32, align 4 |
| // OMP51-NEXT: [[D:%.*]] = alloca i32, align 4 |
| // OMP51-NEXT: [[E:%.*]] = alloca i32, align 4 |
| // OMP51-NEXT: [[F:%.*]] = alloca i32, align 4 |
| // OMP51-NEXT: [[G:%.*]] = alloca i32, align 4 |
| // OMP51-NEXT: [[STR1:%.*]] = alloca [4 x i8], align 1 |
| // OMP51-NEXT: [[STR2:%.*]] = alloca ptr, align 8 |
| // OMP51-NEXT: [[STR3:%.*]] = alloca [4 x i8], align 1 |
| // OMP51-NEXT: [[STR4:%.*]] = alloca ptr, align 8 |
| // OMP51-NEXT: [[STR5:%.*]] = alloca ptr, align 8 |
| // OMP51-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 |
| // OMP51-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 8 |
| // OMP51-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4 |
| // OMP51-NEXT: store i32 [[TMP0]], ptr [[B]], align 4 |
| // OMP51-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 1 [[STR1]], ptr align 1 @__const.main.str1, i64 4, i1 false) |
| // OMP51-NEXT: store ptr @.str, ptr [[STR2]], align 8 |
| // OMP51-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 1 [[STR3]], ptr align 1 @__const.main.str3, i64 4, i1 false) |
| // OMP51-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [4 x i8], ptr [[STR3]], i64 0, i64 0 |
| // OMP51-NEXT: store ptr [[ARRAYDECAY]], ptr [[STR4]], align 8 |
| // OMP51-NEXT: [[ARRAYDECAY1:%.*]] = getelementptr inbounds [4 x i8], ptr [[STR3]], i64 0, i64 0 |
| // OMP51-NEXT: store ptr [[ARRAYDECAY1]], ptr [[STR5]], align 8 |
| // OMP51-NEXT: call void @__kmpc_error(ptr @[[GLOB1:[0-9]+]], i32 2, ptr @.str.1) |
| // OMP51-NEXT: [[ARRAYDECAY2:%.*]] = getelementptr inbounds [4 x i8], ptr [[STR1]], i64 0, i64 0 |
| // OMP51-NEXT: call void @__kmpc_error(ptr @[[GLOB3:[0-9]+]], i32 2, ptr [[ARRAYDECAY2]]) |
| // OMP51-NEXT: [[TMP1:%.*]] = load ptr, ptr [[STR2]], align 8 |
| // OMP51-NEXT: call void @__kmpc_error(ptr @[[GLOB5:[0-9]+]], i32 2, ptr [[TMP1]]) |
| // OMP51-NEXT: [[ARRAYDECAY3:%.*]] = getelementptr inbounds [4 x i8], ptr [[STR3]], i64 0, i64 0 |
| // OMP51-NEXT: call void @__kmpc_error(ptr @[[GLOB7:[0-9]+]], i32 2, ptr [[ARRAYDECAY3]]) |
| // OMP51-NEXT: [[TMP2:%.*]] = load ptr, ptr [[STR4]], align 8 |
| // OMP51-NEXT: call void @__kmpc_error(ptr @[[GLOB9:[0-9]+]], i32 2, ptr [[TMP2]]) |
| // OMP51-NEXT: [[TMP3:%.*]] = load ptr, ptr [[STR5]], align 8 |
| // OMP51-NEXT: call void @__kmpc_error(ptr @[[GLOB11:[0-9]+]], i32 2, ptr [[TMP3]]) |
| // OMP51-NEXT: store i32 2, ptr @_ZZ4mainE1a, align 4 |
| // OMP51-NEXT: call void @__kmpc_error(ptr @[[GLOB13:[0-9]+]], i32 1, ptr @.str.2) |
| // OMP51-NEXT: [[ARRAYDECAY4:%.*]] = getelementptr inbounds [4 x i8], ptr [[STR1]], i64 0, i64 0 |
| // OMP51-NEXT: call void @__kmpc_error(ptr @[[GLOB15:[0-9]+]], i32 1, ptr [[ARRAYDECAY4]]) |
| // OMP51-NEXT: [[TMP4:%.*]] = load ptr, ptr [[STR2]], align 8 |
| // OMP51-NEXT: call void @__kmpc_error(ptr @[[GLOB17:[0-9]+]], i32 1, ptr [[TMP4]]) |
| // OMP51-NEXT: [[ARRAYDECAY5:%.*]] = getelementptr inbounds [4 x i8], ptr [[STR3]], i64 0, i64 0 |
| // OMP51-NEXT: call void @__kmpc_error(ptr @[[GLOB19:[0-9]+]], i32 1, ptr [[ARRAYDECAY5]]) |
| // OMP51-NEXT: [[TMP5:%.*]] = load ptr, ptr [[STR4]], align 8 |
| // OMP51-NEXT: call void @__kmpc_error(ptr @[[GLOB21:[0-9]+]], i32 1, ptr [[TMP5]]) |
| // OMP51-NEXT: [[TMP6:%.*]] = load ptr, ptr [[STR5]], align 8 |
| // OMP51-NEXT: call void @__kmpc_error(ptr @[[GLOB23:[0-9]+]], i32 1, ptr [[TMP6]]) |
| // OMP51-NEXT: call void @_Z3foov() |
| // OMP51-NEXT: [[TMP7:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4 |
| // OMP51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8 |
| // OMP51-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_PPc(i32 noundef [[TMP7]], ptr noundef [[TMP8]]) |
| // OMP51-NEXT: ret i32 0 |
| // |
| // |
| // OMP51-LABEL: define linkonce_odr noundef i32 @_Z5tmainIiLi10EEiT_PPc( |
| // OMP51-SAME: i32 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0]] comdat { |
| // OMP51-NEXT: [[ENTRY:.*:]] |
| // OMP51-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 |
| // OMP51-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 8 |
| // OMP51-NEXT: [[B:%.*]] = alloca i32, align 4 |
| // OMP51-NEXT: [[C:%.*]] = alloca i32, align 4 |
| // OMP51-NEXT: [[D:%.*]] = alloca i32, align 4 |
| // OMP51-NEXT: [[E:%.*]] = alloca i32, align 4 |
| // OMP51-NEXT: [[F:%.*]] = alloca i32, align 4 |
| // OMP51-NEXT: [[G:%.*]] = alloca i32, align 4 |
| // OMP51-NEXT: [[STR1:%.*]] = alloca [4 x i8], align 1 |
| // OMP51-NEXT: [[STR2:%.*]] = alloca ptr, align 8 |
| // OMP51-NEXT: [[STR3:%.*]] = alloca [4 x i8], align 1 |
| // OMP51-NEXT: [[STR4:%.*]] = alloca ptr, align 8 |
| // OMP51-NEXT: [[STR5:%.*]] = alloca ptr, align 8 |
| // OMP51-NEXT: [[B7:%.*]] = alloca i32, align 4 |
| // OMP51-NEXT: [[C8:%.*]] = alloca i32, align 4 |
| // OMP51-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 |
| // OMP51-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 8 |
| // OMP51-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4 |
| // OMP51-NEXT: store i32 [[TMP0]], ptr [[B]], align 4 |
| // OMP51-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 1 [[STR1]], ptr align 1 @__const._Z5tmainIiLi10EEiT_PPc.str1, i64 4, i1 false) |
| // OMP51-NEXT: store ptr @.str, ptr [[STR2]], align 8 |
| // OMP51-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 1 [[STR3]], ptr align 1 @__const._Z5tmainIiLi10EEiT_PPc.str3, i64 4, i1 false) |
| // OMP51-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [4 x i8], ptr [[STR3]], i64 0, i64 0 |
| // OMP51-NEXT: store ptr [[ARRAYDECAY]], ptr [[STR4]], align 8 |
| // OMP51-NEXT: [[ARRAYDECAY1:%.*]] = getelementptr inbounds [4 x i8], ptr [[STR3]], i64 0, i64 0 |
| // OMP51-NEXT: store ptr [[ARRAYDECAY1]], ptr [[STR5]], align 8 |
| // OMP51-NEXT: call void @__kmpc_error(ptr @[[GLOB25:[0-9]+]], i32 2, ptr @.str.3) |
| // OMP51-NEXT: [[ARRAYDECAY2:%.*]] = getelementptr inbounds [4 x i8], ptr [[STR1]], i64 0, i64 0 |
| // OMP51-NEXT: call void @__kmpc_error(ptr @[[GLOB27:[0-9]+]], i32 2, ptr [[ARRAYDECAY2]]) |
| // OMP51-NEXT: [[TMP1:%.*]] = load ptr, ptr [[STR2]], align 8 |
| // OMP51-NEXT: call void @__kmpc_error(ptr @[[GLOB29:[0-9]+]], i32 2, ptr [[TMP1]]) |
| // OMP51-NEXT: [[ARRAYDECAY3:%.*]] = getelementptr inbounds [4 x i8], ptr [[STR3]], i64 0, i64 0 |
| // OMP51-NEXT: call void @__kmpc_error(ptr @[[GLOB31:[0-9]+]], i32 2, ptr [[ARRAYDECAY3]]) |
| // OMP51-NEXT: [[TMP2:%.*]] = load ptr, ptr [[STR4]], align 8 |
| // OMP51-NEXT: call void @__kmpc_error(ptr @[[GLOB33:[0-9]+]], i32 2, ptr [[TMP2]]) |
| // OMP51-NEXT: [[TMP3:%.*]] = load ptr, ptr [[STR5]], align 8 |
| // OMP51-NEXT: call void @__kmpc_error(ptr @[[GLOB35:[0-9]+]], i32 2, ptr [[TMP3]]) |
| // OMP51-NEXT: [[TMP4:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8 |
| // OMP51-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds ptr, ptr [[TMP4]], i64 0 |
| // OMP51-NEXT: [[TMP5:%.*]] = load ptr, ptr [[ARRAYIDX]], align 8 |
| // OMP51-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds i8, ptr [[TMP5]], i64 0 |
| // OMP51-NEXT: [[TMP6:%.*]] = load i8, ptr [[ARRAYIDX4]], align 1 |
| // OMP51-NEXT: [[CONV:%.*]] = sext i8 [[TMP6]] to i32 |
| // OMP51-NEXT: store i32 [[CONV]], ptr @_ZZ5tmainIiLi10EEiT_PPcE1a, align 4 |
| // OMP51-NEXT: [[TMP7:%.*]] = load i32, ptr @_ZZ5tmainIiLi10EEiT_PPcE1a, align 4 |
| // OMP51-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1 |
| // OMP51-NEXT: store i32 [[INC]], ptr @_ZZ5tmainIiLi10EEiT_PPcE1a, align 4 |
| // OMP51-NEXT: call void @__kmpc_error(ptr @[[GLOB37:[0-9]+]], i32 1, ptr @.str.4) |
| // OMP51-NEXT: [[ARRAYDECAY5:%.*]] = getelementptr inbounds [4 x i8], ptr [[STR1]], i64 0, i64 0 |
| // OMP51-NEXT: call void @__kmpc_error(ptr @[[GLOB39:[0-9]+]], i32 1, ptr [[ARRAYDECAY5]]) |
| // OMP51-NEXT: [[TMP8:%.*]] = load ptr, ptr [[STR2]], align 8 |
| // OMP51-NEXT: call void @__kmpc_error(ptr @[[GLOB41:[0-9]+]], i32 1, ptr [[TMP8]]) |
| // OMP51-NEXT: [[ARRAYDECAY6:%.*]] = getelementptr inbounds [4 x i8], ptr [[STR3]], i64 0, i64 0 |
| // OMP51-NEXT: call void @__kmpc_error(ptr @[[GLOB43:[0-9]+]], i32 1, ptr [[ARRAYDECAY6]]) |
| // OMP51-NEXT: [[TMP9:%.*]] = load ptr, ptr [[STR4]], align 8 |
| // OMP51-NEXT: call void @__kmpc_error(ptr @[[GLOB45:[0-9]+]], i32 1, ptr [[TMP9]]) |
| // OMP51-NEXT: [[TMP10:%.*]] = load ptr, ptr [[STR5]], align 8 |
| // OMP51-NEXT: call void @__kmpc_error(ptr @[[GLOB47:[0-9]+]], i32 1, ptr [[TMP10]]) |
| // OMP51-NEXT: store i32 10, ptr [[B7]], align 4 |
| // OMP51-NEXT: store i32 100, ptr [[C8]], align 4 |
| // OMP51-NEXT: [[TMP11:%.*]] = load i32, ptr [[B7]], align 4 |
| // OMP51-NEXT: [[TMP12:%.*]] = load i32, ptr [[C8]], align 4 |
| // OMP51-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] |
| // OMP51-NEXT: store i32 [[ADD]], ptr @_ZZ5tmainIiLi10EEiT_PPcE1a, align 4 |
| // OMP51-NEXT: call void @__kmpc_error(ptr @[[GLOB49:[0-9]+]], i32 2, ptr @.str.1) |
| // OMP51-NEXT: [[ARRAYDECAY9:%.*]] = getelementptr inbounds [4 x i8], ptr [[STR1]], i64 0, i64 0 |
| // OMP51-NEXT: call void @__kmpc_error(ptr @[[GLOB51:[0-9]+]], i32 2, ptr [[ARRAYDECAY9]]) |
| // OMP51-NEXT: [[TMP13:%.*]] = load ptr, ptr [[STR2]], align 8 |
| // OMP51-NEXT: call void @__kmpc_error(ptr @[[GLOB53:[0-9]+]], i32 2, ptr [[TMP13]]) |
| // OMP51-NEXT: [[ARRAYDECAY10:%.*]] = getelementptr inbounds [4 x i8], ptr [[STR3]], i64 0, i64 0 |
| // OMP51-NEXT: call void @__kmpc_error(ptr @[[GLOB55:[0-9]+]], i32 2, ptr [[ARRAYDECAY10]]) |
| // OMP51-NEXT: [[TMP14:%.*]] = load ptr, ptr [[STR4]], align 8 |
| // OMP51-NEXT: call void @__kmpc_error(ptr @[[GLOB57:[0-9]+]], i32 2, ptr [[TMP14]]) |
| // OMP51-NEXT: [[TMP15:%.*]] = load ptr, ptr [[STR5]], align 8 |
| // OMP51-NEXT: call void @__kmpc_error(ptr @[[GLOB59:[0-9]+]], i32 2, ptr [[TMP15]]) |
| // OMP51-NEXT: call void @_Z3foov() |
| // OMP51-NEXT: ret i32 10 |
| // |
| // |
| // OMP60-LABEL: define dso_local void @_Z3foov( |
| // OMP60-SAME: ) #[[ATTR0:[0-9]+]] { |
| // OMP60-NEXT: [[ENTRY:.*:]] |
| // OMP60-NEXT: ret void |
| // |
| // |
| // OMP60-LABEL: define dso_local noundef i32 @main( |
| // OMP60-SAME: i32 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR1:[0-9]+]] { |
| // OMP60-NEXT: [[ENTRY:.*:]] |
| // OMP60-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 |
| // OMP60-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 8 |
| // OMP60-NEXT: [[B:%.*]] = alloca i32, align 4 |
| // OMP60-NEXT: [[C:%.*]] = alloca i32, align 4 |
| // OMP60-NEXT: [[D:%.*]] = alloca i32, align 4 |
| // OMP60-NEXT: [[E:%.*]] = alloca i32, align 4 |
| // OMP60-NEXT: [[F:%.*]] = alloca i32, align 4 |
| // OMP60-NEXT: [[G:%.*]] = alloca i32, align 4 |
| // OMP60-NEXT: [[STR1:%.*]] = alloca [4 x i8], align 1 |
| // OMP60-NEXT: [[STR2:%.*]] = alloca ptr, align 8 |
| // OMP60-NEXT: [[STR3:%.*]] = alloca [4 x i8], align 1 |
| // OMP60-NEXT: [[STR4:%.*]] = alloca ptr, align 8 |
| // OMP60-NEXT: [[STR5:%.*]] = alloca ptr, align 8 |
| // OMP60-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 |
| // OMP60-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 8 |
| // OMP60-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4 |
| // OMP60-NEXT: store i32 [[TMP0]], ptr [[B]], align 4 |
| // OMP60-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 1 [[STR1]], ptr align 1 @__const.main.str1, i64 4, i1 false) |
| // OMP60-NEXT: store ptr @.str, ptr [[STR2]], align 8 |
| // OMP60-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 1 [[STR3]], ptr align 1 @__const.main.str3, i64 4, i1 false) |
| // OMP60-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [4 x i8], ptr [[STR3]], i64 0, i64 0 |
| // OMP60-NEXT: store ptr [[ARRAYDECAY]], ptr [[STR4]], align 8 |
| // OMP60-NEXT: [[ARRAYDECAY1:%.*]] = getelementptr inbounds [4 x i8], ptr [[STR3]], i64 0, i64 0 |
| // OMP60-NEXT: store ptr [[ARRAYDECAY1]], ptr [[STR5]], align 8 |
| // OMP60-NEXT: call void @__kmpc_error(ptr @[[GLOB1:[0-9]+]], i32 2, ptr @.str.1) |
| // OMP60-NEXT: [[ARRAYDECAY2:%.*]] = getelementptr inbounds [4 x i8], ptr [[STR1]], i64 0, i64 0 |
| // OMP60-NEXT: call void @__kmpc_error(ptr @[[GLOB3:[0-9]+]], i32 2, ptr [[ARRAYDECAY2]]) |
| // OMP60-NEXT: [[TMP1:%.*]] = load ptr, ptr [[STR2]], align 8 |
| // OMP60-NEXT: call void @__kmpc_error(ptr @[[GLOB5:[0-9]+]], i32 2, ptr [[TMP1]]) |
| // OMP60-NEXT: [[ARRAYDECAY3:%.*]] = getelementptr inbounds [4 x i8], ptr [[STR3]], i64 0, i64 0 |
| // OMP60-NEXT: call void @__kmpc_error(ptr @[[GLOB7:[0-9]+]], i32 2, ptr [[ARRAYDECAY3]]) |
| // OMP60-NEXT: [[TMP2:%.*]] = load ptr, ptr [[STR4]], align 8 |
| // OMP60-NEXT: call void @__kmpc_error(ptr @[[GLOB9:[0-9]+]], i32 2, ptr [[TMP2]]) |
| // OMP60-NEXT: [[TMP3:%.*]] = load ptr, ptr [[STR5]], align 8 |
| // OMP60-NEXT: call void @__kmpc_error(ptr @[[GLOB11:[0-9]+]], i32 2, ptr [[TMP3]]) |
| // OMP60-NEXT: store i32 2, ptr @_ZZ4mainE1a, align 4 |
| // OMP60-NEXT: call void @__kmpc_error(ptr @[[GLOB13:[0-9]+]], i32 1, ptr @.str.2) |
| // OMP60-NEXT: [[ARRAYDECAY4:%.*]] = getelementptr inbounds [4 x i8], ptr [[STR1]], i64 0, i64 0 |
| // OMP60-NEXT: call void @__kmpc_error(ptr @[[GLOB15:[0-9]+]], i32 1, ptr [[ARRAYDECAY4]]) |
| // OMP60-NEXT: [[TMP4:%.*]] = load ptr, ptr [[STR2]], align 8 |
| // OMP60-NEXT: call void @__kmpc_error(ptr @[[GLOB17:[0-9]+]], i32 1, ptr [[TMP4]]) |
| // OMP60-NEXT: [[ARRAYDECAY5:%.*]] = getelementptr inbounds [4 x i8], ptr [[STR3]], i64 0, i64 0 |
| // OMP60-NEXT: call void @__kmpc_error(ptr @[[GLOB19:[0-9]+]], i32 1, ptr [[ARRAYDECAY5]]) |
| // OMP60-NEXT: [[TMP5:%.*]] = load ptr, ptr [[STR4]], align 8 |
| // OMP60-NEXT: call void @__kmpc_error(ptr @[[GLOB21:[0-9]+]], i32 1, ptr [[TMP5]]) |
| // OMP60-NEXT: [[TMP6:%.*]] = load ptr, ptr [[STR5]], align 8 |
| // OMP60-NEXT: call void @__kmpc_error(ptr @[[GLOB23:[0-9]+]], i32 1, ptr [[TMP6]]) |
| // OMP60-NEXT: call void @_Z3foov() |
| // OMP60-NEXT: [[TMP7:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4 |
| // OMP60-NEXT: [[TMP8:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8 |
| // OMP60-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_PPc(i32 noundef [[TMP7]], ptr noundef [[TMP8]]) |
| // OMP60-NEXT: ret i32 0 |
| // |
| // |
| // OMP60-LABEL: define linkonce_odr noundef i32 @_Z5tmainIiLi10EEiT_PPc( |
| // OMP60-SAME: i32 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0]] comdat { |
| // OMP60-NEXT: [[ENTRY:.*:]] |
| // OMP60-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 |
| // OMP60-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 8 |
| // OMP60-NEXT: [[B:%.*]] = alloca i32, align 4 |
| // OMP60-NEXT: [[C:%.*]] = alloca i32, align 4 |
| // OMP60-NEXT: [[D:%.*]] = alloca i32, align 4 |
| // OMP60-NEXT: [[E:%.*]] = alloca i32, align 4 |
| // OMP60-NEXT: [[F:%.*]] = alloca i32, align 4 |
| // OMP60-NEXT: [[G:%.*]] = alloca i32, align 4 |
| // OMP60-NEXT: [[STR1:%.*]] = alloca [4 x i8], align 1 |
| // OMP60-NEXT: [[STR2:%.*]] = alloca ptr, align 8 |
| // OMP60-NEXT: [[STR3:%.*]] = alloca [4 x i8], align 1 |
| // OMP60-NEXT: [[STR4:%.*]] = alloca ptr, align 8 |
| // OMP60-NEXT: [[STR5:%.*]] = alloca ptr, align 8 |
| // OMP60-NEXT: [[B7:%.*]] = alloca i32, align 4 |
| // OMP60-NEXT: [[C8:%.*]] = alloca i32, align 4 |
| // OMP60-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 |
| // OMP60-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 8 |
| // OMP60-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4 |
| // OMP60-NEXT: store i32 [[TMP0]], ptr [[B]], align 4 |
| // OMP60-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 1 [[STR1]], ptr align 1 @__const._Z5tmainIiLi10EEiT_PPc.str1, i64 4, i1 false) |
| // OMP60-NEXT: store ptr @.str, ptr [[STR2]], align 8 |
| // OMP60-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 1 [[STR3]], ptr align 1 @__const._Z5tmainIiLi10EEiT_PPc.str3, i64 4, i1 false) |
| // OMP60-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [4 x i8], ptr [[STR3]], i64 0, i64 0 |
| // OMP60-NEXT: store ptr [[ARRAYDECAY]], ptr [[STR4]], align 8 |
| // OMP60-NEXT: [[ARRAYDECAY1:%.*]] = getelementptr inbounds [4 x i8], ptr [[STR3]], i64 0, i64 0 |
| // OMP60-NEXT: store ptr [[ARRAYDECAY1]], ptr [[STR5]], align 8 |
| // OMP60-NEXT: call void @__kmpc_error(ptr @[[GLOB25:[0-9]+]], i32 2, ptr @.str.3) |
| // OMP60-NEXT: [[ARRAYDECAY2:%.*]] = getelementptr inbounds [4 x i8], ptr [[STR1]], i64 0, i64 0 |
| // OMP60-NEXT: call void @__kmpc_error(ptr @[[GLOB27:[0-9]+]], i32 2, ptr [[ARRAYDECAY2]]) |
| // OMP60-NEXT: [[TMP1:%.*]] = load ptr, ptr [[STR2]], align 8 |
| // OMP60-NEXT: call void @__kmpc_error(ptr @[[GLOB29:[0-9]+]], i32 2, ptr [[TMP1]]) |
| // OMP60-NEXT: [[ARRAYDECAY3:%.*]] = getelementptr inbounds [4 x i8], ptr [[STR3]], i64 0, i64 0 |
| // OMP60-NEXT: call void @__kmpc_error(ptr @[[GLOB31:[0-9]+]], i32 2, ptr [[ARRAYDECAY3]]) |
| // OMP60-NEXT: [[TMP2:%.*]] = load ptr, ptr [[STR4]], align 8 |
| // OMP60-NEXT: call void @__kmpc_error(ptr @[[GLOB33:[0-9]+]], i32 2, ptr [[TMP2]]) |
| // OMP60-NEXT: [[TMP3:%.*]] = load ptr, ptr [[STR5]], align 8 |
| // OMP60-NEXT: call void @__kmpc_error(ptr @[[GLOB35:[0-9]+]], i32 2, ptr [[TMP3]]) |
| // OMP60-NEXT: [[TMP4:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8 |
| // OMP60-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds ptr, ptr [[TMP4]], i64 0 |
| // OMP60-NEXT: [[TMP5:%.*]] = load ptr, ptr [[ARRAYIDX]], align 8 |
| // OMP60-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds i8, ptr [[TMP5]], i64 0 |
| // OMP60-NEXT: [[TMP6:%.*]] = load i8, ptr [[ARRAYIDX4]], align 1 |
| // OMP60-NEXT: [[CONV:%.*]] = sext i8 [[TMP6]] to i32 |
| // OMP60-NEXT: store i32 [[CONV]], ptr @_ZZ5tmainIiLi10EEiT_PPcE1a, align 4 |
| // OMP60-NEXT: [[TMP7:%.*]] = load i32, ptr @_ZZ5tmainIiLi10EEiT_PPcE1a, align 4 |
| // OMP60-NEXT: [[INC:%.*]] = add nsw i32 [[TMP7]], 1 |
| // OMP60-NEXT: store i32 [[INC]], ptr @_ZZ5tmainIiLi10EEiT_PPcE1a, align 4 |
| // OMP60-NEXT: call void @__kmpc_error(ptr @[[GLOB37:[0-9]+]], i32 1, ptr @.str.4) |
| // OMP60-NEXT: [[ARRAYDECAY5:%.*]] = getelementptr inbounds [4 x i8], ptr [[STR1]], i64 0, i64 0 |
| // OMP60-NEXT: call void @__kmpc_error(ptr @[[GLOB39:[0-9]+]], i32 1, ptr [[ARRAYDECAY5]]) |
| // OMP60-NEXT: [[TMP8:%.*]] = load ptr, ptr [[STR2]], align 8 |
| // OMP60-NEXT: call void @__kmpc_error(ptr @[[GLOB41:[0-9]+]], i32 1, ptr [[TMP8]]) |
| // OMP60-NEXT: [[ARRAYDECAY6:%.*]] = getelementptr inbounds [4 x i8], ptr [[STR3]], i64 0, i64 0 |
| // OMP60-NEXT: call void @__kmpc_error(ptr @[[GLOB43:[0-9]+]], i32 1, ptr [[ARRAYDECAY6]]) |
| // OMP60-NEXT: [[TMP9:%.*]] = load ptr, ptr [[STR4]], align 8 |
| // OMP60-NEXT: call void @__kmpc_error(ptr @[[GLOB45:[0-9]+]], i32 1, ptr [[TMP9]]) |
| // OMP60-NEXT: [[TMP10:%.*]] = load ptr, ptr [[STR5]], align 8 |
| // OMP60-NEXT: call void @__kmpc_error(ptr @[[GLOB47:[0-9]+]], i32 1, ptr [[TMP10]]) |
| // OMP60-NEXT: store i32 10, ptr [[B7]], align 4 |
| // OMP60-NEXT: store i32 100, ptr [[C8]], align 4 |
| // OMP60-NEXT: [[TMP11:%.*]] = load i32, ptr [[B7]], align 4 |
| // OMP60-NEXT: [[TMP12:%.*]] = load i32, ptr [[C8]], align 4 |
| // OMP60-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] |
| // OMP60-NEXT: store i32 [[ADD]], ptr @_ZZ5tmainIiLi10EEiT_PPcE1a, align 4 |
| // OMP60-NEXT: call void @__kmpc_error(ptr @[[GLOB49:[0-9]+]], i32 2, ptr @.str.1) |
| // OMP60-NEXT: [[ARRAYDECAY9:%.*]] = getelementptr inbounds [4 x i8], ptr [[STR1]], i64 0, i64 0 |
| // OMP60-NEXT: call void @__kmpc_error(ptr @[[GLOB51:[0-9]+]], i32 2, ptr [[ARRAYDECAY9]]) |
| // OMP60-NEXT: [[TMP13:%.*]] = load ptr, ptr [[STR2]], align 8 |
| // OMP60-NEXT: call void @__kmpc_error(ptr @[[GLOB53:[0-9]+]], i32 2, ptr [[TMP13]]) |
| // OMP60-NEXT: [[ARRAYDECAY10:%.*]] = getelementptr inbounds [4 x i8], ptr [[STR3]], i64 0, i64 0 |
| // OMP60-NEXT: call void @__kmpc_error(ptr @[[GLOB55:[0-9]+]], i32 2, ptr [[ARRAYDECAY10]]) |
| // OMP60-NEXT: [[TMP14:%.*]] = load ptr, ptr [[STR4]], align 8 |
| // OMP60-NEXT: call void @__kmpc_error(ptr @[[GLOB57:[0-9]+]], i32 2, ptr [[TMP14]]) |
| // OMP60-NEXT: [[TMP15:%.*]] = load ptr, ptr [[STR5]], align 8 |
| // OMP60-NEXT: call void @__kmpc_error(ptr @[[GLOB59:[0-9]+]], i32 2, ptr [[TMP15]]) |
| // OMP60-NEXT: call void @_Z3foov() |
| // OMP60-NEXT: ret i32 10 |
| // |
| // |
| // SIMD-LABEL: define dso_local void @_Z3foov( |
| // SIMD-SAME: ) #[[ATTR0:[0-9]+]] !dbg [[DBG29:![0-9]+]] { |
| // SIMD-NEXT: [[ENTRY:.*:]] |
| // SIMD-NEXT: ret void, !dbg [[DBG32:![0-9]+]] |
| // |
| // |
| // SIMD-LABEL: define dso_local noundef i32 @main( |
| // SIMD-SAME: i32 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR1:[0-9]+]] !dbg [[DBG2:![0-9]+]] { |
| // SIMD-NEXT: [[ENTRY:.*:]] |
| // SIMD-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 |
| // SIMD-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 8 |
| // SIMD-NEXT: [[B:%.*]] = alloca i32, align 4 |
| // SIMD-NEXT: [[C:%.*]] = alloca i32, align 4 |
| // SIMD-NEXT: [[D:%.*]] = alloca i32, align 4 |
| // SIMD-NEXT: [[E:%.*]] = alloca i32, align 4 |
| // SIMD-NEXT: [[F:%.*]] = alloca i32, align 4 |
| // SIMD-NEXT: [[G:%.*]] = alloca i32, align 4 |
| // SIMD-NEXT: [[STR1:%.*]] = alloca [4 x i8], align 1 |
| // SIMD-NEXT: [[STR2:%.*]] = alloca ptr, align 8 |
| // SIMD-NEXT: [[STR3:%.*]] = alloca [4 x i8], align 1 |
| // SIMD-NEXT: [[STR4:%.*]] = alloca ptr, align 8 |
| // SIMD-NEXT: [[STR5:%.*]] = alloca ptr, align 8 |
| // SIMD-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 |
| // SIMD-NEXT: #dbg_declare(ptr [[ARGC_ADDR]], [[META33:![0-9]+]], !DIExpression(), [[META34:![0-9]+]]) |
| // SIMD-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 8 |
| // SIMD-NEXT: #dbg_declare(ptr [[ARGV_ADDR]], [[META35:![0-9]+]], !DIExpression(), [[META36:![0-9]+]]) |
| // SIMD-NEXT: #dbg_declare(ptr [[B]], [[META37:![0-9]+]], !DIExpression(), [[META38:![0-9]+]]) |
| // SIMD-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4, !dbg [[DBG39:![0-9]+]] |
| // SIMD-NEXT: store i32 [[TMP0]], ptr [[B]], align 4, !dbg [[META38]] |
| // SIMD-NEXT: #dbg_declare(ptr [[C]], [[META40:![0-9]+]], !DIExpression(), [[META41:![0-9]+]]) |
| // SIMD-NEXT: #dbg_declare(ptr [[D]], [[META42:![0-9]+]], !DIExpression(), [[META43:![0-9]+]]) |
| // SIMD-NEXT: #dbg_declare(ptr [[E]], [[META44:![0-9]+]], !DIExpression(), [[META45:![0-9]+]]) |
| // SIMD-NEXT: #dbg_declare(ptr [[F]], [[META46:![0-9]+]], !DIExpression(), [[META47:![0-9]+]]) |
| // SIMD-NEXT: #dbg_declare(ptr [[G]], [[META48:![0-9]+]], !DIExpression(), [[META49:![0-9]+]]) |
| // SIMD-NEXT: #dbg_declare(ptr [[STR1]], [[META50:![0-9]+]], !DIExpression(), [[META51:![0-9]+]]) |
| // SIMD-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 1 [[STR1]], ptr align 1 @__const.main.str1, i64 4, i1 false), !dbg [[META51]] |
| // SIMD-NEXT: #dbg_declare(ptr [[STR2]], [[META52:![0-9]+]], !DIExpression(), [[META54:![0-9]+]]) |
| // SIMD-NEXT: store ptr @.str, ptr [[STR2]], align 8, !dbg [[META54]] |
| // SIMD-NEXT: #dbg_declare(ptr [[STR3]], [[META55:![0-9]+]], !DIExpression(), [[META57:![0-9]+]]) |
| // SIMD-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 1 [[STR3]], ptr align 1 @__const.main.str3, i64 4, i1 false), !dbg [[META57]] |
| // SIMD-NEXT: #dbg_declare(ptr [[STR4]], [[META58:![0-9]+]], !DIExpression(), [[META59:![0-9]+]]) |
| // SIMD-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [4 x i8], ptr [[STR3]], i64 0, i64 0, !dbg [[DBG60:![0-9]+]] |
| // SIMD-NEXT: store ptr [[ARRAYDECAY]], ptr [[STR4]], align 8, !dbg [[META59]] |
| // SIMD-NEXT: #dbg_declare(ptr [[STR5]], [[META61:![0-9]+]], !DIExpression(), [[META63:![0-9]+]]) |
| // SIMD-NEXT: [[ARRAYDECAY1:%.*]] = getelementptr inbounds [4 x i8], ptr [[STR3]], i64 0, i64 0, !dbg [[DBG64:![0-9]+]] |
| // SIMD-NEXT: store ptr [[ARRAYDECAY1]], ptr [[STR5]], align 8, !dbg [[META63]] |
| // SIMD-NEXT: store i32 2, ptr @_ZZ4mainE1a, align 4, !dbg [[DBG65:![0-9]+]] |
| // SIMD-NEXT: call void @_Z3foov(), !dbg [[DBG66:![0-9]+]] |
| // SIMD-NEXT: [[TMP1:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4, !dbg [[DBG67:![0-9]+]] |
| // SIMD-NEXT: [[TMP2:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8, !dbg [[DBG68:![0-9]+]] |
| // SIMD-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_PPc(i32 noundef [[TMP1]], ptr noundef [[TMP2]]), !dbg [[DBG69:![0-9]+]] |
| // SIMD-NEXT: ret i32 0, !dbg [[DBG70:![0-9]+]] |
| // |
| // |
| // SIMD-LABEL: define linkonce_odr noundef i32 @_Z5tmainIiLi10EEiT_PPc( |
| // SIMD-SAME: i32 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0]] comdat !dbg [[DBG21:![0-9]+]] { |
| // SIMD-NEXT: [[ENTRY:.*:]] |
| // SIMD-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 |
| // SIMD-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 8 |
| // SIMD-NEXT: [[B:%.*]] = alloca i32, align 4 |
| // SIMD-NEXT: [[C:%.*]] = alloca i32, align 4 |
| // SIMD-NEXT: [[D:%.*]] = alloca i32, align 4 |
| // SIMD-NEXT: [[E:%.*]] = alloca i32, align 4 |
| // SIMD-NEXT: [[F:%.*]] = alloca i32, align 4 |
| // SIMD-NEXT: [[G:%.*]] = alloca i32, align 4 |
| // SIMD-NEXT: [[STR1:%.*]] = alloca [4 x i8], align 1 |
| // SIMD-NEXT: [[STR2:%.*]] = alloca ptr, align 8 |
| // SIMD-NEXT: [[STR3:%.*]] = alloca [4 x i8], align 1 |
| // SIMD-NEXT: [[STR4:%.*]] = alloca ptr, align 8 |
| // SIMD-NEXT: [[STR5:%.*]] = alloca ptr, align 8 |
| // SIMD-NEXT: [[B3:%.*]] = alloca i32, align 4 |
| // SIMD-NEXT: [[C4:%.*]] = alloca i32, align 4 |
| // SIMD-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4 |
| // SIMD-NEXT: #dbg_declare(ptr [[ARGC_ADDR]], [[META71:![0-9]+]], !DIExpression(), [[META72:![0-9]+]]) |
| // SIMD-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 8 |
| // SIMD-NEXT: #dbg_declare(ptr [[ARGV_ADDR]], [[META73:![0-9]+]], !DIExpression(), [[META74:![0-9]+]]) |
| // SIMD-NEXT: #dbg_declare(ptr [[B]], [[META75:![0-9]+]], !DIExpression(), [[META76:![0-9]+]]) |
| // SIMD-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4, !dbg [[DBG77:![0-9]+]] |
| // SIMD-NEXT: store i32 [[TMP0]], ptr [[B]], align 4, !dbg [[META76]] |
| // SIMD-NEXT: #dbg_declare(ptr [[C]], [[META78:![0-9]+]], !DIExpression(), [[META79:![0-9]+]]) |
| // SIMD-NEXT: #dbg_declare(ptr [[D]], [[META80:![0-9]+]], !DIExpression(), [[META81:![0-9]+]]) |
| // SIMD-NEXT: #dbg_declare(ptr [[E]], [[META82:![0-9]+]], !DIExpression(), [[META83:![0-9]+]]) |
| // SIMD-NEXT: #dbg_declare(ptr [[F]], [[META84:![0-9]+]], !DIExpression(), [[META85:![0-9]+]]) |
| // SIMD-NEXT: #dbg_declare(ptr [[G]], [[META86:![0-9]+]], !DIExpression(), [[META87:![0-9]+]]) |
| // SIMD-NEXT: #dbg_declare(ptr [[STR1]], [[META88:![0-9]+]], !DIExpression(), [[META89:![0-9]+]]) |
| // SIMD-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 1 [[STR1]], ptr align 1 @__const._Z5tmainIiLi10EEiT_PPc.str1, i64 4, i1 false), !dbg [[META89]] |
| // SIMD-NEXT: #dbg_declare(ptr [[STR2]], [[META90:![0-9]+]], !DIExpression(), [[META91:![0-9]+]]) |
| // SIMD-NEXT: store ptr @.str, ptr [[STR2]], align 8, !dbg [[META91]] |
| // SIMD-NEXT: #dbg_declare(ptr [[STR3]], [[META92:![0-9]+]], !DIExpression(), [[META93:![0-9]+]]) |
| // SIMD-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 1 [[STR3]], ptr align 1 @__const._Z5tmainIiLi10EEiT_PPc.str3, i64 4, i1 false), !dbg [[META93]] |
| // SIMD-NEXT: #dbg_declare(ptr [[STR4]], [[META94:![0-9]+]], !DIExpression(), [[META95:![0-9]+]]) |
| // SIMD-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [4 x i8], ptr [[STR3]], i64 0, i64 0, !dbg [[DBG96:![0-9]+]] |
| // SIMD-NEXT: store ptr [[ARRAYDECAY]], ptr [[STR4]], align 8, !dbg [[META95]] |
| // SIMD-NEXT: #dbg_declare(ptr [[STR5]], [[META97:![0-9]+]], !DIExpression(), [[META98:![0-9]+]]) |
| // SIMD-NEXT: [[ARRAYDECAY1:%.*]] = getelementptr inbounds [4 x i8], ptr [[STR3]], i64 0, i64 0, !dbg [[DBG99:![0-9]+]] |
| // SIMD-NEXT: store ptr [[ARRAYDECAY1]], ptr [[STR5]], align 8, !dbg [[META98]] |
| // SIMD-NEXT: [[TMP1:%.*]] = load ptr, ptr [[ARGV_ADDR]], align 8, !dbg [[DBG100:![0-9]+]] |
| // SIMD-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds ptr, ptr [[TMP1]], i64 0, !dbg [[DBG100]] |
| // SIMD-NEXT: [[TMP2:%.*]] = load ptr, ptr [[ARRAYIDX]], align 8, !dbg [[DBG100]] |
| // SIMD-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i8, ptr [[TMP2]], i64 0, !dbg [[DBG100]] |
| // SIMD-NEXT: [[TMP3:%.*]] = load i8, ptr [[ARRAYIDX2]], align 1, !dbg [[DBG100]] |
| // SIMD-NEXT: [[CONV:%.*]] = sext i8 [[TMP3]] to i32, !dbg [[DBG100]] |
| // SIMD-NEXT: store i32 [[CONV]], ptr @_ZZ5tmainIiLi10EEiT_PPcE1a, align 4, !dbg [[DBG101:![0-9]+]] |
| // SIMD-NEXT: [[TMP4:%.*]] = load i32, ptr @_ZZ5tmainIiLi10EEiT_PPcE1a, align 4, !dbg [[DBG102:![0-9]+]] |
| // SIMD-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1, !dbg [[DBG102]] |
| // SIMD-NEXT: store i32 [[INC]], ptr @_ZZ5tmainIiLi10EEiT_PPcE1a, align 4, !dbg [[DBG102]] |
| // SIMD-NEXT: #dbg_declare(ptr [[B3]], [[META103:![0-9]+]], !DIExpression(), [[META105:![0-9]+]]) |
| // SIMD-NEXT: store i32 10, ptr [[B3]], align 4, !dbg [[META105]] |
| // SIMD-NEXT: #dbg_declare(ptr [[C4]], [[META106:![0-9]+]], !DIExpression(), [[META107:![0-9]+]]) |
| // SIMD-NEXT: store i32 100, ptr [[C4]], align 4, !dbg [[META107]] |
| // SIMD-NEXT: [[TMP5:%.*]] = load i32, ptr [[B3]], align 4, !dbg [[DBG108:![0-9]+]] |
| // SIMD-NEXT: [[TMP6:%.*]] = load i32, ptr [[C4]], align 4, !dbg [[DBG109:![0-9]+]] |
| // SIMD-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP5]], [[TMP6]], !dbg [[DBG110:![0-9]+]] |
| // SIMD-NEXT: store i32 [[ADD]], ptr @_ZZ5tmainIiLi10EEiT_PPcE1a, align 4, !dbg [[DBG111:![0-9]+]] |
| // SIMD-NEXT: call void @_Z3foov(), !dbg [[DBG112:![0-9]+]] |
| // SIMD-NEXT: ret i32 10, !dbg [[DBG113:![0-9]+]] |
| // |
| //. |
| // SIMD: [[META0:![0-9]+]] = !DIGlobalVariableExpression(var: [[META1:![0-9]+]], expr: !DIExpression()) |
| // SIMD: [[META1]] = distinct !DIGlobalVariable(name: "a", scope: [[DBG2]], file: [[META3:![0-9]+]], line: 61, type: [[META6:![0-9]+]], isLocal: true, isDefinition: true) |
| // SIMD: [[DBG2]] = distinct !DISubprogram(name: "main", scope: [[META3]], file: [[META3]], line: 59, type: [[META4:![0-9]+]], scopeLine: 59, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition, unit: [[META10:![0-9]+]], retainedNodes: [[META22:![0-9]+]]) |
| // SIMD: [[META3]] = !DIFile(filename: "{{.*}}error_codegen.cpp", directory: {{.*}}) |
| // SIMD: [[META4]] = !DISubroutineType(types: [[META5:![0-9]+]]) |
| // SIMD: [[META5]] = !{[[META6]], [[META6]], [[META7:![0-9]+]]} |
| // SIMD: [[META6]] = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed) |
| // SIMD: [[META7]] = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: [[META8:![0-9]+]], size: 64) |
| // SIMD: [[META8]] = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: [[META9:![0-9]+]], size: 64) |
| // SIMD: [[META9]] = !DIBasicType(name: "char", size: 8, encoding: DW_ATE_signed_char) |
| // SIMD: [[META10]] = distinct !DICompileUnit(language: DW_LANG_C_plus_plus_11, file: [[META11:![0-9]+]], producer: "{{.*}}clang version {{.*}}", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, globals: [[META12:![0-9]+]], splitDebugInlining: false, nameTableKind: None) |
| // SIMD: [[META11]] = !DIFile(filename: "{{.*}}<stdin>", directory: {{.*}}) |
| // SIMD: [[META12]] = !{[[META0]], [[META13:![0-9]+]], [[META19:![0-9]+]]} |
| // SIMD: [[META13]] = !DIGlobalVariableExpression(var: [[META14:![0-9]+]], expr: !DIExpression()) |
| // SIMD: [[META14]] = distinct !DIGlobalVariable(scope: null, file: [[META3]], line: 63, type: [[META15:![0-9]+]], isLocal: true, isDefinition: true) |
| // SIMD: [[META15]] = !DICompositeType(tag: DW_TAG_array_type, baseType: [[META16:![0-9]+]], size: 32, elements: [[META17:![0-9]+]]) |
| // SIMD: [[META16]] = !DIDerivedType(tag: DW_TAG_const_type, baseType: [[META9]]) |
| // SIMD: [[META17]] = !{[[META18:![0-9]+]]} |
| // SIMD: [[META18]] = !DISubrange(count: 4) |
| // SIMD: [[META19]] = !DIGlobalVariableExpression(var: [[META20:![0-9]+]], expr: !DIExpression()) |
| // SIMD: [[META20]] = distinct !DIGlobalVariable(name: "a", scope: [[DBG21]], file: [[META3]], line: 22, type: [[META6]], isLocal: false, isDefinition: true) |
| // SIMD: [[DBG21]] = distinct !DISubprogram(name: "tmain<int, 10>", linkageName: "_Z5tmainIiLi10EEiT_PPc", scope: [[META3]], file: [[META3]], line: 20, type: [[META4]], scopeLine: 20, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition, unit: [[META10]], templateParams: [[META23:![0-9]+]], retainedNodes: [[META22]]) |
| // SIMD: [[META22]] = !{} |
| // SIMD: [[META23]] = !{[[META24:![0-9]+]], [[META25:![0-9]+]]} |
| // SIMD: [[META24]] = !DITemplateTypeParameter(name: "T", type: [[META6]]) |
| // SIMD: [[META25]] = !DITemplateValueParameter(name: "N", type: [[META6]], value: i32 10) |
| // SIMD: [[DBG29]] = distinct !DISubprogram(name: "foo", linkageName: "_Z3foov", scope: [[META3]], file: [[META3]], line: 17, type: [[META30:![0-9]+]], scopeLine: 17, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition, unit: [[META10]]) |
| // SIMD: [[META30]] = !DISubroutineType(types: [[META31:![0-9]+]]) |
| // SIMD: [[META31]] = !{null} |
| // SIMD: [[DBG32]] = !DILocation(line: 17, column: 13, scope: [[DBG29]]) |
| // SIMD: [[META33]] = !DILocalVariable(name: "argc", arg: 1, scope: [[DBG2]], file: [[META3]], line: 59, type: [[META6]]) |
| // SIMD: [[META34]] = !DILocation(line: 59, column: 15, scope: [[DBG2]]) |
| // SIMD: [[META35]] = !DILocalVariable(name: "argv", arg: 2, scope: [[DBG2]], file: [[META3]], line: 59, type: [[META7]]) |
| // SIMD: [[META36]] = !DILocation(line: 59, column: 28, scope: [[DBG2]]) |
| // SIMD: [[META37]] = !DILocalVariable(name: "b", scope: [[DBG2]], file: [[META3]], line: 60, type: [[META6]]) |
| // SIMD: [[META38]] = !DILocation(line: 60, column: 7, scope: [[DBG2]]) |
| // SIMD: [[DBG39]] = !DILocation(line: 60, column: 11, scope: [[DBG2]]) |
| // SIMD: [[META40]] = !DILocalVariable(name: "c", scope: [[DBG2]], file: [[META3]], line: 60, type: [[META6]]) |
| // SIMD: [[META41]] = !DILocation(line: 60, column: 17, scope: [[DBG2]]) |
| // SIMD: [[META42]] = !DILocalVariable(name: "d", scope: [[DBG2]], file: [[META3]], line: 60, type: [[META6]]) |
| // SIMD: [[META43]] = !DILocation(line: 60, column: 20, scope: [[DBG2]]) |
| // SIMD: [[META44]] = !DILocalVariable(name: "e", scope: [[DBG2]], file: [[META3]], line: 60, type: [[META6]]) |
| // SIMD: [[META45]] = !DILocation(line: 60, column: 23, scope: [[DBG2]]) |
| // SIMD: [[META46]] = !DILocalVariable(name: "f", scope: [[DBG2]], file: [[META3]], line: 60, type: [[META6]]) |
| // SIMD: [[META47]] = !DILocation(line: 60, column: 26, scope: [[DBG2]]) |
| // SIMD: [[META48]] = !DILocalVariable(name: "g", scope: [[DBG2]], file: [[META3]], line: 60, type: [[META6]]) |
| // SIMD: [[META49]] = !DILocation(line: 60, column: 29, scope: [[DBG2]]) |
| // SIMD: [[META50]] = !DILocalVariable(name: "str1", scope: [[DBG2]], file: [[META3]], line: 62, type: [[META15]]) |
| // SIMD: [[META51]] = !DILocation(line: 62, column: 14, scope: [[DBG2]]) |
| // SIMD: [[META52]] = !DILocalVariable(name: "str2", scope: [[DBG2]], file: [[META3]], line: 63, type: [[META53:![0-9]+]]) |
| // SIMD: [[META53]] = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: [[META16]], size: 64) |
| // SIMD: [[META54]] = !DILocation(line: 63, column: 15, scope: [[DBG2]]) |
| // SIMD: [[META55]] = !DILocalVariable(name: "str3", scope: [[DBG2]], file: [[META3]], line: 64, type: [[META56:![0-9]+]]) |
| // SIMD: [[META56]] = !DICompositeType(tag: DW_TAG_array_type, baseType: [[META9]], size: 32, elements: [[META17]]) |
| // SIMD: [[META57]] = !DILocation(line: 64, column: 8, scope: [[DBG2]]) |
| // SIMD: [[META58]] = !DILocalVariable(name: "str4", scope: [[DBG2]], file: [[META3]], line: 65, type: [[META8]]) |
| // SIMD: [[META59]] = !DILocation(line: 65, column: 9, scope: [[DBG2]]) |
| // SIMD: [[DBG60]] = !DILocation(line: 65, column: 16, scope: [[DBG2]]) |
| // SIMD: [[META61]] = !DILocalVariable(name: "str5", scope: [[DBG2]], file: [[META3]], line: 66, type: [[META62:![0-9]+]]) |
| // SIMD: [[META62]] = !DIDerivedType(tag: DW_TAG_const_type, baseType: [[META8]]) |
| // SIMD: [[META63]] = !DILocation(line: 66, column: 16, scope: [[DBG2]]) |
| // SIMD: [[DBG64]] = !DILocation(line: 66, column: 23, scope: [[DBG2]]) |
| // SIMD: [[DBG65]] = !DILocation(line: 73, column: 5, scope: [[DBG2]]) |
| // SIMD: [[DBG66]] = !DILocation(line: 80, column: 3, scope: [[DBG2]]) |
| // SIMD: [[DBG67]] = !DILocation(line: 81, column: 18, scope: [[DBG2]]) |
| // SIMD: [[DBG68]] = !DILocation(line: 81, column: 24, scope: [[DBG2]]) |
| // SIMD: [[DBG69]] = !DILocation(line: 81, column: 3, scope: [[DBG2]]) |
| // SIMD: [[DBG70]] = !DILocation(line: 82, column: 1, scope: [[DBG2]]) |
| // SIMD: [[META71]] = !DILocalVariable(name: "argc", arg: 1, scope: [[DBG21]], file: [[META3]], line: 20, type: [[META6]]) |
| // SIMD: [[META72]] = !DILocation(line: 20, column: 13, scope: [[DBG21]]) |
| // SIMD: [[META73]] = !DILocalVariable(name: "argv", arg: 2, scope: [[DBG21]], file: [[META3]], line: 20, type: [[META7]]) |
| // SIMD: [[META74]] = !DILocation(line: 20, column: 26, scope: [[DBG21]]) |
| // SIMD: [[META75]] = !DILocalVariable(name: "b", scope: [[DBG21]], file: [[META3]], line: 21, type: [[META6]]) |
| // SIMD: [[META76]] = !DILocation(line: 21, column: 5, scope: [[DBG21]]) |
| // SIMD: [[DBG77]] = !DILocation(line: 21, column: 9, scope: [[DBG21]]) |
| // SIMD: [[META78]] = !DILocalVariable(name: "c", scope: [[DBG21]], file: [[META3]], line: 21, type: [[META6]]) |
| // SIMD: [[META79]] = !DILocation(line: 21, column: 15, scope: [[DBG21]]) |
| // SIMD: [[META80]] = !DILocalVariable(name: "d", scope: [[DBG21]], file: [[META3]], line: 21, type: [[META6]]) |
| // SIMD: [[META81]] = !DILocation(line: 21, column: 18, scope: [[DBG21]]) |
| // SIMD: [[META82]] = !DILocalVariable(name: "e", scope: [[DBG21]], file: [[META3]], line: 21, type: [[META6]]) |
| // SIMD: [[META83]] = !DILocation(line: 21, column: 21, scope: [[DBG21]]) |
| // SIMD: [[META84]] = !DILocalVariable(name: "f", scope: [[DBG21]], file: [[META3]], line: 21, type: [[META6]]) |
| // SIMD: [[META85]] = !DILocation(line: 21, column: 24, scope: [[DBG21]]) |
| // SIMD: [[META86]] = !DILocalVariable(name: "g", scope: [[DBG21]], file: [[META3]], line: 21, type: [[META6]]) |
| // SIMD: [[META87]] = !DILocation(line: 21, column: 27, scope: [[DBG21]]) |
| // SIMD: [[META88]] = !DILocalVariable(name: "str1", scope: [[DBG21]], file: [[META3]], line: 23, type: [[META15]]) |
| // SIMD: [[META89]] = !DILocation(line: 23, column: 14, scope: [[DBG21]]) |
| // SIMD: [[META90]] = !DILocalVariable(name: "str2", scope: [[DBG21]], file: [[META3]], line: 24, type: [[META53]]) |
| // SIMD: [[META91]] = !DILocation(line: 24, column: 15, scope: [[DBG21]]) |
| // SIMD: [[META92]] = !DILocalVariable(name: "str3", scope: [[DBG21]], file: [[META3]], line: 25, type: [[META56]]) |
| // SIMD: [[META93]] = !DILocation(line: 25, column: 8, scope: [[DBG21]]) |
| // SIMD: [[META94]] = !DILocalVariable(name: "str4", scope: [[DBG21]], file: [[META3]], line: 26, type: [[META8]]) |
| // SIMD: [[META95]] = !DILocation(line: 26, column: 9, scope: [[DBG21]]) |
| // SIMD: [[DBG96]] = !DILocation(line: 26, column: 16, scope: [[DBG21]]) |
| // SIMD: [[META97]] = !DILocalVariable(name: "str5", scope: [[DBG21]], file: [[META3]], line: 27, type: [[META62]]) |
| // SIMD: [[META98]] = !DILocation(line: 27, column: 16, scope: [[DBG21]]) |
| // SIMD: [[DBG99]] = !DILocation(line: 27, column: 23, scope: [[DBG21]]) |
| // SIMD: [[DBG100]] = !DILocation(line: 34, column: 7, scope: [[DBG21]]) |
| // SIMD: [[DBG101]] = !DILocation(line: 34, column: 5, scope: [[DBG21]]) |
| // SIMD: [[DBG102]] = !DILocation(line: 35, column: 3, scope: [[DBG21]]) |
| // SIMD: [[META103]] = !DILocalVariable(name: "b", scope: [[META104:![0-9]+]], file: [[META3]], line: 43, type: [[META6]]) |
| // SIMD: [[META104]] = distinct !DILexicalBlock(scope: [[DBG21]], file: [[META3]], line: 42, column: 3) |
| // SIMD: [[META105]] = !DILocation(line: 43, column: 9, scope: [[META104]]) |
| // SIMD: [[META106]] = !DILocalVariable(name: "c", scope: [[META104]], file: [[META3]], line: 44, type: [[META6]]) |
| // SIMD: [[META107]] = !DILocation(line: 44, column: 7, scope: [[META104]]) |
| // SIMD: [[DBG108]] = !DILocation(line: 45, column: 9, scope: [[META104]]) |
| // SIMD: [[DBG109]] = !DILocation(line: 45, column: 13, scope: [[META104]]) |
| // SIMD: [[DBG110]] = !DILocation(line: 45, column: 11, scope: [[META104]]) |
| // SIMD: [[DBG111]] = !DILocation(line: 45, column: 7, scope: [[META104]]) |
| // SIMD: [[DBG112]] = !DILocation(line: 53, column: 3, scope: [[DBG21]]) |
| // SIMD: [[DBG113]] = !DILocation(line: 54, column: 1, scope: [[DBG21]]) |
| //. |
