| // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 6 |
| // RUN: %clang_cc1 -std=hlsl202x -finclude-default-header -x hlsl -triple \ |
| // RUN: dxil-pc-shadermodel6.3-library %s -fnative-half-type \ |
| // RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s |
| |
| // CHECK-LABEL: define hidden void @_Z20ZerosSwizzleToScalarRu11matrix_typeILm4ELm4EdEd( |
| // CHECK-SAME: ptr noalias noundef nonnull align 8 dereferenceable(128) [[A:%.*]], double noundef nofpclass(nan inf) [[D:%.*]]) #[[ATTR0:[0-9]+]] { |
| // CHECK-NEXT: [[ENTRY:.*:]] |
| // CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 |
| // CHECK-NEXT: [[D_ADDR:%.*]] = alloca double, align 8 |
| // CHECK-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 |
| // CHECK-NEXT: store double [[D]], ptr [[D_ADDR]], align 8 |
| // CHECK-NEXT: [[TMP0:%.*]] = load double, ptr [[D_ADDR]], align 8 |
| // CHECK-NEXT: [[CAST_SPLAT:%.*]] = insertelement <1 x double> poison, double [[TMP0]], i64 0 |
| // CHECK-NEXT: [[TMP1:%.*]] = shufflevector <1 x double> [[CAST_SPLAT]], <1 x double> poison, <4 x i32> zeroinitializer |
| // CHECK-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 4, !nonnull [[META4:![0-9]+]], !align [[META5:![0-9]+]] |
| // CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x double> [[TMP1]], i32 0 |
| // CHECK-NEXT: store double [[TMP3]], ptr [[TMP2]], align 8 |
| // CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x double> [[TMP1]], i32 1 |
| // CHECK-NEXT: [[TMP5:%.*]] = getelementptr <16 x double>, ptr [[TMP2]], i32 0, i32 4 |
| // CHECK-NEXT: store double [[TMP4]], ptr [[TMP5]], align 8 |
| // CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x double> [[TMP1]], i32 2 |
| // CHECK-NEXT: [[TMP7:%.*]] = getelementptr <16 x double>, ptr [[TMP2]], i32 0, i32 8 |
| // CHECK-NEXT: store double [[TMP6]], ptr [[TMP7]], align 8 |
| // CHECK-NEXT: [[TMP8:%.*]] = extractelement <4 x double> [[TMP1]], i32 3 |
| // CHECK-NEXT: [[TMP9:%.*]] = getelementptr <16 x double>, ptr [[TMP2]], i32 0, i32 12 |
| // CHECK-NEXT: store double [[TMP8]], ptr [[TMP9]], align 8 |
| // CHECK-NEXT: ret void |
| // |
| void ZerosSwizzleToScalar(out double4x4 A, double D) { |
| A._m00_m01_m02_m03 = D.xxxx; |
| } |
| |
| // CHECK-LABEL: define hidden void @_Z20ZerosSwizzleToVectorRu11matrix_typeILm4ELm4EdEDv4_d( |
| // CHECK-SAME: ptr noalias noundef nonnull align 8 dereferenceable(128) [[A:%.*]], <4 x double> noundef nofpclass(nan inf) [[V:%.*]]) #[[ATTR0]] { |
| // CHECK-NEXT: [[ENTRY:.*:]] |
| // CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 |
| // CHECK-NEXT: [[V_ADDR:%.*]] = alloca <4 x double>, align 8 |
| // CHECK-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 |
| // CHECK-NEXT: store <4 x double> [[V]], ptr [[V_ADDR]], align 8 |
| // CHECK-NEXT: [[TMP0:%.*]] = load <4 x double>, ptr [[V_ADDR]], align 8 |
| // CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4, !nonnull [[META4]], !align [[META5]] |
| // CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x double> [[TMP0]], i32 0 |
| // CHECK-NEXT: store double [[TMP2]], ptr [[TMP1]], align 8 |
| // CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x double> [[TMP0]], i32 1 |
| // CHECK-NEXT: [[TMP4:%.*]] = getelementptr <16 x double>, ptr [[TMP1]], i32 0, i32 1 |
| // CHECK-NEXT: store double [[TMP3]], ptr [[TMP4]], align 8 |
| // CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x double> [[TMP0]], i32 2 |
| // CHECK-NEXT: [[TMP6:%.*]] = getelementptr <16 x double>, ptr [[TMP1]], i32 0, i32 2 |
| // CHECK-NEXT: store double [[TMP5]], ptr [[TMP6]], align 8 |
| // CHECK-NEXT: [[TMP7:%.*]] = extractelement <4 x double> [[TMP0]], i32 3 |
| // CHECK-NEXT: [[TMP8:%.*]] = getelementptr <16 x double>, ptr [[TMP1]], i32 0, i32 3 |
| // CHECK-NEXT: store double [[TMP7]], ptr [[TMP8]], align 8 |
| // CHECK-NEXT: ret void |
| // |
| void ZerosSwizzleToVector(out double4x4 A, double4 V) { |
| A._m00_m10_m20_m30 = V; |
| } |
| |
| // CHECK-LABEL: define hidden void @_Z19OnesSwizzleToScalarRu11matrix_typeILm4ELm4EdEd( |
| // CHECK-SAME: ptr noalias noundef nonnull align 8 dereferenceable(128) [[A:%.*]], double noundef nofpclass(nan inf) [[D:%.*]]) #[[ATTR0]] { |
| // CHECK-NEXT: [[ENTRY:.*:]] |
| // CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 |
| // CHECK-NEXT: [[D_ADDR:%.*]] = alloca double, align 8 |
| // CHECK-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 |
| // CHECK-NEXT: store double [[D]], ptr [[D_ADDR]], align 8 |
| // CHECK-NEXT: [[TMP0:%.*]] = load double, ptr [[D_ADDR]], align 8 |
| // CHECK-NEXT: [[CAST_SPLAT:%.*]] = insertelement <1 x double> poison, double [[TMP0]], i64 0 |
| // CHECK-NEXT: [[TMP1:%.*]] = shufflevector <1 x double> [[CAST_SPLAT]], <1 x double> poison, <4 x i32> zeroinitializer |
| // CHECK-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 4, !nonnull [[META4]], !align [[META5]] |
| // CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x double> [[TMP1]], i32 0 |
| // CHECK-NEXT: [[TMP4:%.*]] = getelementptr <16 x double>, ptr [[TMP2]], i32 0, i32 1 |
| // CHECK-NEXT: store double [[TMP3]], ptr [[TMP4]], align 8 |
| // CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x double> [[TMP1]], i32 1 |
| // CHECK-NEXT: [[TMP6:%.*]] = getelementptr <16 x double>, ptr [[TMP2]], i32 0, i32 5 |
| // CHECK-NEXT: store double [[TMP5]], ptr [[TMP6]], align 8 |
| // CHECK-NEXT: [[TMP7:%.*]] = extractelement <4 x double> [[TMP1]], i32 2 |
| // CHECK-NEXT: [[TMP8:%.*]] = getelementptr <16 x double>, ptr [[TMP2]], i32 0, i32 9 |
| // CHECK-NEXT: store double [[TMP7]], ptr [[TMP8]], align 8 |
| // CHECK-NEXT: [[TMP9:%.*]] = extractelement <4 x double> [[TMP1]], i32 3 |
| // CHECK-NEXT: [[TMP10:%.*]] = getelementptr <16 x double>, ptr [[TMP2]], i32 0, i32 13 |
| // CHECK-NEXT: store double [[TMP9]], ptr [[TMP10]], align 8 |
| // CHECK-NEXT: ret void |
| // |
| void OnesSwizzleToScalar(out double4x4 A, double D) { |
| A._m10_m11_m12_m13 = D.xxxx; |
| } |
| |
| // CHECK-LABEL: define hidden void @_Z19OnesSwizzleToVectorRu11matrix_typeILm4ELm4EdEDv4_d( |
| // CHECK-SAME: ptr noalias noundef nonnull align 8 dereferenceable(128) [[A:%.*]], <4 x double> noundef nofpclass(nan inf) [[V:%.*]]) #[[ATTR0]] { |
| // CHECK-NEXT: [[ENTRY:.*:]] |
| // CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 |
| // CHECK-NEXT: [[V_ADDR:%.*]] = alloca <4 x double>, align 8 |
| // CHECK-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 |
| // CHECK-NEXT: store <4 x double> [[V]], ptr [[V_ADDR]], align 8 |
| // CHECK-NEXT: [[TMP0:%.*]] = load <4 x double>, ptr [[V_ADDR]], align 8 |
| // CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4, !nonnull [[META4]], !align [[META5]] |
| // CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x double> [[TMP0]], i32 0 |
| // CHECK-NEXT: [[TMP3:%.*]] = getelementptr <16 x double>, ptr [[TMP1]], i32 0, i32 4 |
| // CHECK-NEXT: store double [[TMP2]], ptr [[TMP3]], align 8 |
| // CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x double> [[TMP0]], i32 1 |
| // CHECK-NEXT: [[TMP5:%.*]] = getelementptr <16 x double>, ptr [[TMP1]], i32 0, i32 5 |
| // CHECK-NEXT: store double [[TMP4]], ptr [[TMP5]], align 8 |
| // CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x double> [[TMP0]], i32 2 |
| // CHECK-NEXT: [[TMP7:%.*]] = getelementptr <16 x double>, ptr [[TMP1]], i32 0, i32 6 |
| // CHECK-NEXT: store double [[TMP6]], ptr [[TMP7]], align 8 |
| // CHECK-NEXT: [[TMP8:%.*]] = extractelement <4 x double> [[TMP0]], i32 3 |
| // CHECK-NEXT: [[TMP9:%.*]] = getelementptr <16 x double>, ptr [[TMP1]], i32 0, i32 7 |
| // CHECK-NEXT: store double [[TMP8]], ptr [[TMP9]], align 8 |
| // CHECK-NEXT: ret void |
| // |
| void OnesSwizzleToVector(out double4x4 A, double4 V) { |
| A._m01_m11_m21_m31 = V; |
| } |
| |
| // CHECK-LABEL: define hidden void @_Z19TwosSwizzleToScalarRu11matrix_typeILm4ELm4EdEd( |
| // CHECK-SAME: ptr noalias noundef nonnull align 8 dereferenceable(128) [[A:%.*]], double noundef nofpclass(nan inf) [[D:%.*]]) #[[ATTR0]] { |
| // CHECK-NEXT: [[ENTRY:.*:]] |
| // CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 |
| // CHECK-NEXT: [[D_ADDR:%.*]] = alloca double, align 8 |
| // CHECK-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 |
| // CHECK-NEXT: store double [[D]], ptr [[D_ADDR]], align 8 |
| // CHECK-NEXT: [[TMP0:%.*]] = load double, ptr [[D_ADDR]], align 8 |
| // CHECK-NEXT: [[CAST_SPLAT:%.*]] = insertelement <1 x double> poison, double [[TMP0]], i64 0 |
| // CHECK-NEXT: [[TMP1:%.*]] = shufflevector <1 x double> [[CAST_SPLAT]], <1 x double> poison, <4 x i32> zeroinitializer |
| // CHECK-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 4, !nonnull [[META4]], !align [[META5]] |
| // CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x double> [[TMP1]], i32 0 |
| // CHECK-NEXT: [[TMP4:%.*]] = getelementptr <16 x double>, ptr [[TMP2]], i32 0, i32 2 |
| // CHECK-NEXT: store double [[TMP3]], ptr [[TMP4]], align 8 |
| // CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x double> [[TMP1]], i32 1 |
| // CHECK-NEXT: [[TMP6:%.*]] = getelementptr <16 x double>, ptr [[TMP2]], i32 0, i32 6 |
| // CHECK-NEXT: store double [[TMP5]], ptr [[TMP6]], align 8 |
| // CHECK-NEXT: [[TMP7:%.*]] = extractelement <4 x double> [[TMP1]], i32 2 |
| // CHECK-NEXT: [[TMP8:%.*]] = getelementptr <16 x double>, ptr [[TMP2]], i32 0, i32 10 |
| // CHECK-NEXT: store double [[TMP7]], ptr [[TMP8]], align 8 |
| // CHECK-NEXT: [[TMP9:%.*]] = extractelement <4 x double> [[TMP1]], i32 3 |
| // CHECK-NEXT: [[TMP10:%.*]] = getelementptr <16 x double>, ptr [[TMP2]], i32 0, i32 14 |
| // CHECK-NEXT: store double [[TMP9]], ptr [[TMP10]], align 8 |
| // CHECK-NEXT: ret void |
| // |
| void TwosSwizzleToScalar(out double4x4 A, double D) { |
| A._m20_m21_m22_m23 = D.xxxx; |
| } |
| |
| // CHECK-LABEL: define hidden void @_Z19TwosSwizzleToVectorRu11matrix_typeILm4ELm4EdEDv4_d( |
| // CHECK-SAME: ptr noalias noundef nonnull align 8 dereferenceable(128) [[A:%.*]], <4 x double> noundef nofpclass(nan inf) [[V:%.*]]) #[[ATTR0]] { |
| // CHECK-NEXT: [[ENTRY:.*:]] |
| // CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 |
| // CHECK-NEXT: [[V_ADDR:%.*]] = alloca <4 x double>, align 8 |
| // CHECK-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 |
| // CHECK-NEXT: store <4 x double> [[V]], ptr [[V_ADDR]], align 8 |
| // CHECK-NEXT: [[TMP0:%.*]] = load <4 x double>, ptr [[V_ADDR]], align 8 |
| // CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4, !nonnull [[META4]], !align [[META5]] |
| // CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x double> [[TMP0]], i32 0 |
| // CHECK-NEXT: [[TMP3:%.*]] = getelementptr <16 x double>, ptr [[TMP1]], i32 0, i32 8 |
| // CHECK-NEXT: store double [[TMP2]], ptr [[TMP3]], align 8 |
| // CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x double> [[TMP0]], i32 1 |
| // CHECK-NEXT: [[TMP5:%.*]] = getelementptr <16 x double>, ptr [[TMP1]], i32 0, i32 9 |
| // CHECK-NEXT: store double [[TMP4]], ptr [[TMP5]], align 8 |
| // CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x double> [[TMP0]], i32 2 |
| // CHECK-NEXT: [[TMP7:%.*]] = getelementptr <16 x double>, ptr [[TMP1]], i32 0, i32 10 |
| // CHECK-NEXT: store double [[TMP6]], ptr [[TMP7]], align 8 |
| // CHECK-NEXT: [[TMP8:%.*]] = extractelement <4 x double> [[TMP0]], i32 3 |
| // CHECK-NEXT: [[TMP9:%.*]] = getelementptr <16 x double>, ptr [[TMP1]], i32 0, i32 11 |
| // CHECK-NEXT: store double [[TMP8]], ptr [[TMP9]], align 8 |
| // CHECK-NEXT: ret void |
| // |
| void TwosSwizzleToVector(out double4x4 A, double4 V) { |
| A._m02_m12_m22_m32 = V; |
| } |
| |
| // CHECK-LABEL: define hidden void @_Z21ThreesSwizzleToScalarRu11matrix_typeILm4ELm4EdEd( |
| // CHECK-SAME: ptr noalias noundef nonnull align 8 dereferenceable(128) [[A:%.*]], double noundef nofpclass(nan inf) [[D:%.*]]) #[[ATTR0]] { |
| // CHECK-NEXT: [[ENTRY:.*:]] |
| // CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 |
| // CHECK-NEXT: [[D_ADDR:%.*]] = alloca double, align 8 |
| // CHECK-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 |
| // CHECK-NEXT: store double [[D]], ptr [[D_ADDR]], align 8 |
| // CHECK-NEXT: [[TMP0:%.*]] = load double, ptr [[D_ADDR]], align 8 |
| // CHECK-NEXT: [[CAST_SPLAT:%.*]] = insertelement <1 x double> poison, double [[TMP0]], i64 0 |
| // CHECK-NEXT: [[TMP1:%.*]] = shufflevector <1 x double> [[CAST_SPLAT]], <1 x double> poison, <4 x i32> zeroinitializer |
| // CHECK-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 4, !nonnull [[META4]], !align [[META5]] |
| // CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x double> [[TMP1]], i32 0 |
| // CHECK-NEXT: [[TMP4:%.*]] = getelementptr <16 x double>, ptr [[TMP2]], i32 0, i32 3 |
| // CHECK-NEXT: store double [[TMP3]], ptr [[TMP4]], align 8 |
| // CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x double> [[TMP1]], i32 1 |
| // CHECK-NEXT: [[TMP6:%.*]] = getelementptr <16 x double>, ptr [[TMP2]], i32 0, i32 7 |
| // CHECK-NEXT: store double [[TMP5]], ptr [[TMP6]], align 8 |
| // CHECK-NEXT: [[TMP7:%.*]] = extractelement <4 x double> [[TMP1]], i32 2 |
| // CHECK-NEXT: [[TMP8:%.*]] = getelementptr <16 x double>, ptr [[TMP2]], i32 0, i32 11 |
| // CHECK-NEXT: store double [[TMP7]], ptr [[TMP8]], align 8 |
| // CHECK-NEXT: [[TMP9:%.*]] = extractelement <4 x double> [[TMP1]], i32 3 |
| // CHECK-NEXT: [[TMP10:%.*]] = getelementptr <16 x double>, ptr [[TMP2]], i32 0, i32 15 |
| // CHECK-NEXT: store double [[TMP9]], ptr [[TMP10]], align 8 |
| // CHECK-NEXT: ret void |
| // |
| void ThreesSwizzleToScalar(out double4x4 A, double D) { |
| A._m30_m31_m32_m33 = D.xxxx; |
| } |
| |
| // CHECK-LABEL: define hidden void @_Z21ThreesSwizzleToVectorRu11matrix_typeILm4ELm4EdEDv4_d( |
| // CHECK-SAME: ptr noalias noundef nonnull align 8 dereferenceable(128) [[A:%.*]], <4 x double> noundef nofpclass(nan inf) [[V:%.*]]) #[[ATTR0]] { |
| // CHECK-NEXT: [[ENTRY:.*:]] |
| // CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4 |
| // CHECK-NEXT: [[V_ADDR:%.*]] = alloca <4 x double>, align 8 |
| // CHECK-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4 |
| // CHECK-NEXT: store <4 x double> [[V]], ptr [[V_ADDR]], align 8 |
| // CHECK-NEXT: [[TMP0:%.*]] = load <4 x double>, ptr [[V_ADDR]], align 8 |
| // CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4, !nonnull [[META4]], !align [[META5]] |
| // CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x double> [[TMP0]], i32 0 |
| // CHECK-NEXT: [[TMP3:%.*]] = getelementptr <16 x double>, ptr [[TMP1]], i32 0, i32 12 |
| // CHECK-NEXT: store double [[TMP2]], ptr [[TMP3]], align 8 |
| // CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x double> [[TMP0]], i32 1 |
| // CHECK-NEXT: [[TMP5:%.*]] = getelementptr <16 x double>, ptr [[TMP1]], i32 0, i32 13 |
| // CHECK-NEXT: store double [[TMP4]], ptr [[TMP5]], align 8 |
| // CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x double> [[TMP0]], i32 2 |
| // CHECK-NEXT: [[TMP7:%.*]] = getelementptr <16 x double>, ptr [[TMP1]], i32 0, i32 14 |
| // CHECK-NEXT: store double [[TMP6]], ptr [[TMP7]], align 8 |
| // CHECK-NEXT: [[TMP8:%.*]] = extractelement <4 x double> [[TMP0]], i32 3 |
| // CHECK-NEXT: [[TMP9:%.*]] = getelementptr <16 x double>, ptr [[TMP1]], i32 0, i32 15 |
| // CHECK-NEXT: store double [[TMP8]], ptr [[TMP9]], align 8 |
| // CHECK-NEXT: ret void |
| // |
| void ThreesSwizzleToVector(out double4x4 A, double4 V) { |
| A._m03_m13_m23_m33 = V; |
| } |
| //. |
| // CHECK: [[META4]] = !{} |
| // CHECK: [[META5]] = !{i64 8} |
| //. |