| // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 5 |
| // REQUIRES: powerpc-registered-target |
| // RUN: %clang_cc1 -triple powerpc64le-unknown-linux -O2 -target-cpu pwr7 \ |
| // RUN: -emit-llvm %s -o - | FileCheck %s |
| // RUN: %clang_cc1 -triple powerpc64-unknown-aix -O2 -target-cpu pwr7 \ |
| // RUN: -emit-llvm %s -o - | FileCheck %s |
| // RUN: not %clang_cc1 -triple powerpc-unknown-aix -O2 -target-cpu pwr7 \ |
| // RUN: -emit-llvm %s -o - 2>&1 | FileCheck %s --check-prefix=CHECK-32-ERROR |
| |
| // CHECK-LABEL: define{{.*}} i64 @cdtbcd_test(i64 |
| // CHECK-NEXT: [[ENTRY:.*:]] |
| // CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.ppc.cdtbcdd(i64 |
| // CHECK-NEXT: ret i64 [[TMP0]] |
| // CHECK-32-ERROR: error: this builtin is only available on 64-bit targets |
| // CHECK-32-ERROR: #define __cdtbcd __builtin_ppc_cdtbcd |
| long long cdtbcd_test(long long ll) { |
| return __cdtbcd (ll); |
| } |
| |
| // CHECK-LABEL: define{{.*}} i32 @cdtbcd_test_ui(i32 |
| // CHECK-NEXT: [[ENTRY:.*:]] |
| // CHECK-NEXT: [[CONV:%.*]] = zext i32 {{.*}} to i64 |
| // CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.ppc.cdtbcdd(i64 [[CONV]]) |
| // CHECK-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP0]] to i32 |
| // CHECK-NEXT: ret i32 [[CONV1]] |
| // CHECK-32-ERROR: error: this builtin is only available on 64-bit targets |
| // CHECK-32-ERROR: #define __cdtbcd __builtin_ppc_cdtbcd |
| unsigned int cdtbcd_test_ui(unsigned int ui) { |
| return __cdtbcd (ui); |
| } |
| |
| // CHECK-LABEL: define{{.*}} i64 @cbcdtd_test(i64 |
| // CHECK-NEXT: [[ENTRY:.*:]] |
| // CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.ppc.cbcdtdd(i64 |
| // CHECK-NEXT: ret i64 [[TMP0]] |
| // CHECK-32-ERROR: error: this builtin is only available on 64-bit targets |
| // CHECK-32-ERROR: #define __cbcdtd __builtin_ppc_cbcdtd |
| long long cbcdtd_test(long long ll) { |
| return __cbcdtd (ll); |
| } |
| |
| // CHECK-LABEL: define{{.*}} i32 @cbcdtd_test_ui(i32 |
| // CHECK-NEXT: [[ENTRY:.*:]] |
| // CHECK-NEXT: [[CONV:%.*]] = zext i32 {{.*}} to i64 |
| // CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.ppc.cbcdtdd(i64 [[CONV]]) |
| // CHECK-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP0]] to i32 |
| // CHECK-NEXT: ret i32 [[CONV1]] |
| // CHECK-32-ERROR: error: this builtin is only available on 64-bit targets |
| // CHECK-32-ERROR: #define __cbcdtd __builtin_ppc_cbcdtd |
| unsigned int cbcdtd_test_ui(unsigned int ui) { |
| return __cbcdtd (ui); |
| } |
| |
| // CHECK-LABEL: define{{.*}} i64 @addg6s_test(i64 |
| // CHECK-NEXT: [[ENTRY:.*:]] |
| // CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.ppc.addg6sd(i64 {{.*}}, i64 {{.*}}) |
| // CHECK-NEXT: ret i64 [[TMP0]] |
| // CHECK-32-ERROR: error: this builtin is only available on 64-bit targets |
| // CHECK-32-ERROR: #define __addg6s __builtin_ppc_addg6s |
| long long addg6s_test(long long ll, long long ll2) { |
| return __addg6s (ll, ll2); |
| } |
| |
| // CHECK-LABEL: define{{.*}} i32 @addg6s_test_ui(i32 |
| // CHECK-NEXT: [[ENTRY:.*:]] |
| // CHECK-NEXT: [[CONV:%.*]] = zext i32 {{.*}} to i64 |
| // CHECK-NEXT: [[CONV1:%.*]] = zext i32 {{.*}} to i64 |
| // CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.ppc.addg6sd(i64 {{.*}}, i64 |
| // CHECK-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP0]] to i32 |
| // CHECK-NEXT: ret i32 [[CONV2]] |
| // CHECK-32-ERROR: error: this builtin is only available on 64-bit targets |
| // CHECK-32-ERROR: #define __addg6s __builtin_ppc_addg6s |
| unsigned int addg6s_test_ui(unsigned int ui, unsigned int ui2) { |
| return __addg6s (ui, ui2); |
| } |
