| // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py |
| // RUN: %clang_cc1 -triple riscv64-none-linux-gnu -target-feature +f -target-feature +d -target-feature +zve64d -mvscale-min=1 -mvscale-max=1 -S -O1 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-128 |
| // RUN: %clang_cc1 -triple riscv64-none-linux-gnu -target-feature +f -target-feature +d -target-feature +zve64d -mvscale-min=4 -mvscale-max=4 -S -O1 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-512 |
| |
| // REQUIRES: riscv-registered-target |
| |
| #include <stdint.h> |
| |
| typedef __rvv_int8m1_t vint8m1_t; |
| typedef __rvv_uint8m1_t vuint8m1_t; |
| typedef __rvv_int16m1_t vint16m1_t; |
| typedef __rvv_uint16m1_t vuint16m1_t; |
| typedef __rvv_int32m1_t vint32m1_t; |
| typedef __rvv_uint32m1_t vuint32m1_t; |
| typedef __rvv_int64m1_t vint64m1_t; |
| typedef __rvv_uint64m1_t vuint64m1_t; |
| typedef __rvv_float32m1_t vfloat32m1_t; |
| typedef __rvv_float64m1_t vfloat64m1_t; |
| |
| typedef vint64m1_t fixed_int64m1_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen))); |
| |
| fixed_int64m1_t global_i64; |
| |
| //===----------------------------------------------------------------------===// |
| // WRITES |
| //===----------------------------------------------------------------------===// |
| |
| // CHECK-128-LABEL: @write_global_i64( |
| // CHECK-128-NEXT: entry: |
| // CHECK-128-NEXT: [[CASTFIXEDSVE:%.*]] = tail call <1 x i64> @llvm.vector.extract.v1i64.nxv1i64(<vscale x 1 x i64> [[V:%.*]], i64 0) |
| // CHECK-128-NEXT: store <1 x i64> [[CASTFIXEDSVE]], ptr @global_i64, align 8, !tbaa [[TBAA4:![0-9]+]] |
| // CHECK-128-NEXT: ret void |
| // |
| // CHECK-512-LABEL: @write_global_i64( |
| // CHECK-512-NEXT: entry: |
| // CHECK-512-NEXT: [[CASTFIXEDSVE:%.*]] = tail call <4 x i64> @llvm.vector.extract.v4i64.nxv1i64(<vscale x 1 x i64> [[V:%.*]], i64 0) |
| // CHECK-512-NEXT: store <4 x i64> [[CASTFIXEDSVE]], ptr @global_i64, align 8, !tbaa [[TBAA4:![0-9]+]] |
| // CHECK-512-NEXT: ret void |
| // |
| void write_global_i64(vint64m1_t v) { global_i64 = v; } |
| |
| //===----------------------------------------------------------------------===// |
| // READS |
| //===----------------------------------------------------------------------===// |
| |
| // CHECK-128-LABEL: @read_global_i64( |
| // CHECK-128-NEXT: entry: |
| // CHECK-128-NEXT: [[TMP0:%.*]] = load <1 x i64>, ptr @global_i64, align 8, !tbaa [[TBAA4]] |
| // CHECK-128-NEXT: [[CASTSCALABLESVE:%.*]] = tail call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v1i64(<vscale x 1 x i64> undef, <1 x i64> [[TMP0]], i64 0) |
| // CHECK-128-NEXT: ret <vscale x 1 x i64> [[CASTSCALABLESVE]] |
| // |
| // CHECK-512-LABEL: @read_global_i64( |
| // CHECK-512-NEXT: entry: |
| // CHECK-512-NEXT: [[TMP0:%.*]] = load <4 x i64>, ptr @global_i64, align 8, !tbaa [[TBAA4]] |
| // CHECK-512-NEXT: [[CASTSCALABLESVE:%.*]] = tail call <vscale x 1 x i64> @llvm.vector.insert.nxv1i64.v4i64(<vscale x 1 x i64> undef, <4 x i64> [[TMP0]], i64 0) |
| // CHECK-512-NEXT: ret <vscale x 1 x i64> [[CASTSCALABLESVE]] |
| // |
| vint64m1_t read_global_i64() { return global_i64; } |
