| // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 6 |
| // RUN: %clang_cc1 -O3 -triple powerpc64le-unknown-unknown -target-cpu future \ |
| // RUN: -emit-llvm %s -o - | FileCheck %s |
| // RUN: %clang_cc1 -O3 -triple powerpc64-ibm-aix -target-cpu future \ |
| // RUN: -emit-llvm %s -o - | FileCheck %s --check-prefix=AIX |
| |
| |
| // CHECK-LABEL: define dso_local void @test_dmxvi8gerx4( |
| // CHECK-SAME: ptr noundef readnone captures(none) [[VDMRP:%.*]], ptr noundef readonly captures(none) [[VPP:%.*]], <16 x i8> noundef [[VC:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RESP:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] { |
| // CHECK-NEXT: [[ENTRY:.*:]] |
| // CHECK-NEXT: [[TMP0:%.*]] = load <256 x i1>, ptr [[VPP]], align 32, !tbaa [[__VECTOR_PAIR_TBAA2:![0-9]+]] |
| // CHECK-NEXT: [[TMP1:%.*]] = tail call <1024 x i1> @llvm.ppc.mma.dmxvi8gerx4(<256 x i1> [[TMP0]], <16 x i8> [[VC]]) |
| // CHECK-NEXT: store <1024 x i1> [[TMP1]], ptr [[RESP]], align 128, !tbaa [[__DMR1024_TBAA6:![0-9]+]] |
| // CHECK-NEXT: ret void |
| // |
| // AIX-LABEL: define void @test_dmxvi8gerx4( |
| // AIX-SAME: ptr noundef readnone captures(none) [[VDMRP:%.*]], ptr noundef readonly captures(none) [[VPP:%.*]], <16 x i8> noundef [[VC:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RESP:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] { |
| // AIX-NEXT: [[ENTRY:.*:]] |
| // AIX-NEXT: [[TMP0:%.*]] = load <256 x i1>, ptr [[VPP]], align 32, !tbaa [[__VECTOR_PAIR_TBAA2:![0-9]+]] |
| // AIX-NEXT: [[TMP1:%.*]] = tail call <1024 x i1> @llvm.ppc.mma.dmxvi8gerx4(<256 x i1> [[TMP0]], <16 x i8> [[VC]]) |
| // AIX-NEXT: store <1024 x i1> [[TMP1]], ptr [[RESP]], align 128, !tbaa [[__DMR1024_TBAA6:![0-9]+]] |
| // AIX-NEXT: ret void |
| // |
| void test_dmxvi8gerx4(unsigned char *vdmrp, unsigned char *vpp, vector unsigned char vc, unsigned char *resp) { |
| __dmr1024 vdmr = *((__dmr1024 *)vdmrp); |
| __vector_pair vp = *((__vector_pair *)vpp); |
| __builtin_mma_dmxvi8gerx4(&vdmr, vp, vc); |
| *((__dmr1024 *)resp) = vdmr; |
| } |
| |
| // CHECK-LABEL: define dso_local void @test_pmdmxvi8gerx4( |
| // CHECK-SAME: ptr noundef readnone captures(none) [[VDMRP:%.*]], ptr noundef readonly captures(none) [[VPP:%.*]], <16 x i8> noundef [[VC:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RESP:%.*]]) local_unnamed_addr #[[ATTR0]] { |
| // CHECK-NEXT: [[ENTRY:.*:]] |
| // CHECK-NEXT: [[TMP0:%.*]] = load <256 x i1>, ptr [[VPP]], align 32, !tbaa [[__VECTOR_PAIR_TBAA2]] |
| // CHECK-NEXT: [[TMP1:%.*]] = tail call <1024 x i1> @llvm.ppc.mma.pmdmxvi8gerx4(<256 x i1> [[TMP0]], <16 x i8> [[VC]], i32 0, i32 0, i32 0) |
| // CHECK-NEXT: store <1024 x i1> [[TMP1]], ptr [[RESP]], align 128, !tbaa [[__DMR1024_TBAA6]] |
| // CHECK-NEXT: ret void |
| // |
| // AIX-LABEL: define void @test_pmdmxvi8gerx4( |
| // AIX-SAME: ptr noundef readnone captures(none) [[VDMRP:%.*]], ptr noundef readonly captures(none) [[VPP:%.*]], <16 x i8> noundef [[VC:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RESP:%.*]]) local_unnamed_addr #[[ATTR0]] { |
| // AIX-NEXT: [[ENTRY:.*:]] |
| // AIX-NEXT: [[TMP0:%.*]] = load <256 x i1>, ptr [[VPP]], align 32, !tbaa [[__VECTOR_PAIR_TBAA2]] |
| // AIX-NEXT: [[TMP1:%.*]] = tail call <1024 x i1> @llvm.ppc.mma.pmdmxvi8gerx4(<256 x i1> [[TMP0]], <16 x i8> [[VC]], i32 0, i32 0, i32 0) |
| // AIX-NEXT: store <1024 x i1> [[TMP1]], ptr [[RESP]], align 128, !tbaa [[__DMR1024_TBAA6]] |
| // AIX-NEXT: ret void |
| // |
| void test_pmdmxvi8gerx4(unsigned char *vdmrp, unsigned char *vpp, vector unsigned char vc, unsigned char *resp) { |
| __dmr1024 vdmr = *((__dmr1024 *)vdmrp); |
| __vector_pair vp = *((__vector_pair *)vpp); |
| __builtin_mma_pmdmxvi8gerx4(&vdmr, vp, vc, 0, 0, 0); |
| *((__dmr1024 *)resp) = vdmr; |
| } |
| |
| // CHECK-LABEL: define dso_local void @test_dmxvi8gerx4pp( |
| // CHECK-SAME: ptr noundef readonly captures(none) [[VDMRP:%.*]], ptr noundef readonly captures(none) [[VPP:%.*]], <16 x i8> noundef [[VC:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RESP:%.*]]) local_unnamed_addr #[[ATTR0]] { |
| // CHECK-NEXT: [[ENTRY:.*:]] |
| // CHECK-NEXT: [[TMP0:%.*]] = load <1024 x i1>, ptr [[VDMRP]], align 128, !tbaa [[__DMR1024_TBAA6]] |
| // CHECK-NEXT: [[TMP1:%.*]] = load <256 x i1>, ptr [[VPP]], align 32, !tbaa [[__VECTOR_PAIR_TBAA2]] |
| // CHECK-NEXT: [[TMP2:%.*]] = tail call <1024 x i1> @llvm.ppc.mma.dmxvi8gerx4pp(<1024 x i1> [[TMP0]], <256 x i1> [[TMP1]], <16 x i8> [[VC]]) |
| // CHECK-NEXT: store <1024 x i1> [[TMP2]], ptr [[RESP]], align 128, !tbaa [[__DMR1024_TBAA6]] |
| // CHECK-NEXT: ret void |
| // |
| // AIX-LABEL: define void @test_dmxvi8gerx4pp( |
| // AIX-SAME: ptr noundef readonly captures(none) [[VDMRP:%.*]], ptr noundef readonly captures(none) [[VPP:%.*]], <16 x i8> noundef [[VC:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RESP:%.*]]) local_unnamed_addr #[[ATTR0]] { |
| // AIX-NEXT: [[ENTRY:.*:]] |
| // AIX-NEXT: [[TMP0:%.*]] = load <1024 x i1>, ptr [[VDMRP]], align 128, !tbaa [[__DMR1024_TBAA6]] |
| // AIX-NEXT: [[TMP1:%.*]] = load <256 x i1>, ptr [[VPP]], align 32, !tbaa [[__VECTOR_PAIR_TBAA2]] |
| // AIX-NEXT: [[TMP2:%.*]] = tail call <1024 x i1> @llvm.ppc.mma.dmxvi8gerx4pp(<1024 x i1> [[TMP0]], <256 x i1> [[TMP1]], <16 x i8> [[VC]]) |
| // AIX-NEXT: store <1024 x i1> [[TMP2]], ptr [[RESP]], align 128, !tbaa [[__DMR1024_TBAA6]] |
| // AIX-NEXT: ret void |
| // |
| void test_dmxvi8gerx4pp(unsigned char *vdmrp, unsigned char *vpp, vector unsigned char vc, unsigned char *resp) { |
| __dmr1024 vdmr = *((__dmr1024 *)vdmrp); |
| __vector_pair vp = *((__vector_pair *)vpp); |
| __builtin_mma_dmxvi8gerx4pp(&vdmr, vp, vc); |
| *((__dmr1024 *)resp) = vdmr; |
| } |
| |
| // CHECK-LABEL: define dso_local void @test_pmdmxvi8gerx4pp( |
| // CHECK-SAME: ptr noundef readonly captures(none) [[VDMRP:%.*]], ptr noundef readonly captures(none) [[VPP:%.*]], <16 x i8> noundef [[VC:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RESP:%.*]]) local_unnamed_addr #[[ATTR0]] { |
| // CHECK-NEXT: [[ENTRY:.*:]] |
| // CHECK-NEXT: [[TMP0:%.*]] = load <1024 x i1>, ptr [[VDMRP]], align 128, !tbaa [[__DMR1024_TBAA6]] |
| // CHECK-NEXT: [[TMP1:%.*]] = load <256 x i1>, ptr [[VPP]], align 32, !tbaa [[__VECTOR_PAIR_TBAA2]] |
| // CHECK-NEXT: [[TMP2:%.*]] = tail call <1024 x i1> @llvm.ppc.mma.pmdmxvi8gerx4pp(<1024 x i1> [[TMP0]], <256 x i1> [[TMP1]], <16 x i8> [[VC]], i32 0, i32 0, i32 0) |
| // CHECK-NEXT: store <1024 x i1> [[TMP2]], ptr [[RESP]], align 128, !tbaa [[__DMR1024_TBAA6]] |
| // CHECK-NEXT: ret void |
| // |
| // AIX-LABEL: define void @test_pmdmxvi8gerx4pp( |
| // AIX-SAME: ptr noundef readonly captures(none) [[VDMRP:%.*]], ptr noundef readonly captures(none) [[VPP:%.*]], <16 x i8> noundef [[VC:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RESP:%.*]]) local_unnamed_addr #[[ATTR0]] { |
| // AIX-NEXT: [[ENTRY:.*:]] |
| // AIX-NEXT: [[TMP0:%.*]] = load <1024 x i1>, ptr [[VDMRP]], align 128, !tbaa [[__DMR1024_TBAA6]] |
| // AIX-NEXT: [[TMP1:%.*]] = load <256 x i1>, ptr [[VPP]], align 32, !tbaa [[__VECTOR_PAIR_TBAA2]] |
| // AIX-NEXT: [[TMP2:%.*]] = tail call <1024 x i1> @llvm.ppc.mma.pmdmxvi8gerx4pp(<1024 x i1> [[TMP0]], <256 x i1> [[TMP1]], <16 x i8> [[VC]], i32 0, i32 0, i32 0) |
| // AIX-NEXT: store <1024 x i1> [[TMP2]], ptr [[RESP]], align 128, !tbaa [[__DMR1024_TBAA6]] |
| // AIX-NEXT: ret void |
| // |
| void test_pmdmxvi8gerx4pp(unsigned char *vdmrp, unsigned char *vpp, vector unsigned char vc, unsigned char *resp) { |
| __dmr1024 vdmr = *((__dmr1024 *)vdmrp); |
| __vector_pair vp = *((__vector_pair *)vpp); |
| __builtin_mma_pmdmxvi8gerx4pp(&vdmr, vp, vc, 0, 0, 0); |
| *((__dmr1024 *)resp) = vdmr; |
| } |
| |
| // CHECK-LABEL: define dso_local void @test_dmxvi8gerx4spp( |
| // CHECK-SAME: ptr noundef readonly captures(none) [[VDMRP:%.*]], ptr noundef readonly captures(none) [[VPP:%.*]], <16 x i8> noundef [[VC:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RESP:%.*]]) local_unnamed_addr #[[ATTR0]] { |
| // CHECK-NEXT: [[ENTRY:.*:]] |
| // CHECK-NEXT: [[TMP0:%.*]] = load <1024 x i1>, ptr [[VDMRP]], align 128, !tbaa [[__DMR1024_TBAA6]] |
| // CHECK-NEXT: [[TMP1:%.*]] = load <256 x i1>, ptr [[VPP]], align 32, !tbaa [[__VECTOR_PAIR_TBAA2]] |
| // CHECK-NEXT: [[TMP2:%.*]] = tail call <1024 x i1> @llvm.ppc.mma.dmxvi8gerx4spp(<1024 x i1> [[TMP0]], <256 x i1> [[TMP1]], <16 x i8> [[VC]]) |
| // CHECK-NEXT: store <1024 x i1> [[TMP2]], ptr [[RESP]], align 128, !tbaa [[__DMR1024_TBAA6]] |
| // CHECK-NEXT: ret void |
| // |
| // AIX-LABEL: define void @test_dmxvi8gerx4spp( |
| // AIX-SAME: ptr noundef readonly captures(none) [[VDMRP:%.*]], ptr noundef readonly captures(none) [[VPP:%.*]], <16 x i8> noundef [[VC:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RESP:%.*]]) local_unnamed_addr #[[ATTR0]] { |
| // AIX-NEXT: [[ENTRY:.*:]] |
| // AIX-NEXT: [[TMP0:%.*]] = load <1024 x i1>, ptr [[VDMRP]], align 128, !tbaa [[__DMR1024_TBAA6]] |
| // AIX-NEXT: [[TMP1:%.*]] = load <256 x i1>, ptr [[VPP]], align 32, !tbaa [[__VECTOR_PAIR_TBAA2]] |
| // AIX-NEXT: [[TMP2:%.*]] = tail call <1024 x i1> @llvm.ppc.mma.dmxvi8gerx4spp(<1024 x i1> [[TMP0]], <256 x i1> [[TMP1]], <16 x i8> [[VC]]) |
| // AIX-NEXT: store <1024 x i1> [[TMP2]], ptr [[RESP]], align 128, !tbaa [[__DMR1024_TBAA6]] |
| // AIX-NEXT: ret void |
| // |
| void test_dmxvi8gerx4spp(unsigned char *vdmrp, unsigned char *vpp, vector unsigned char vc, unsigned char *resp) { |
| __dmr1024 vdmr = *((__dmr1024 *)vdmrp); |
| __vector_pair vp = *((__vector_pair *)vpp); |
| __builtin_mma_dmxvi8gerx4spp(&vdmr, vp, vc); |
| *((__dmr1024 *)resp) = vdmr; |
| } |
| |
| // CHECK-LABEL: define dso_local void @test_pmdmxvi8gerx4spp( |
| // CHECK-SAME: ptr noundef readonly captures(none) [[VDMRP:%.*]], ptr noundef readonly captures(none) [[VPP:%.*]], <16 x i8> noundef [[VC:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RESP:%.*]]) local_unnamed_addr #[[ATTR0]] { |
| // CHECK-NEXT: [[ENTRY:.*:]] |
| // CHECK-NEXT: [[TMP0:%.*]] = load <1024 x i1>, ptr [[VDMRP]], align 128, !tbaa [[__DMR1024_TBAA6]] |
| // CHECK-NEXT: [[TMP1:%.*]] = load <256 x i1>, ptr [[VPP]], align 32, !tbaa [[__VECTOR_PAIR_TBAA2]] |
| // CHECK-NEXT: [[TMP2:%.*]] = tail call <1024 x i1> @llvm.ppc.mma.pmdmxvi8gerx4spp(<1024 x i1> [[TMP0]], <256 x i1> [[TMP1]], <16 x i8> [[VC]], i32 0, i32 0, i32 0) |
| // CHECK-NEXT: store <1024 x i1> [[TMP2]], ptr [[RESP]], align 128, !tbaa [[__DMR1024_TBAA6]] |
| // CHECK-NEXT: ret void |
| // |
| // AIX-LABEL: define void @test_pmdmxvi8gerx4spp( |
| // AIX-SAME: ptr noundef readonly captures(none) [[VDMRP:%.*]], ptr noundef readonly captures(none) [[VPP:%.*]], <16 x i8> noundef [[VC:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RESP:%.*]]) local_unnamed_addr #[[ATTR0]] { |
| // AIX-NEXT: [[ENTRY:.*:]] |
| // AIX-NEXT: [[TMP0:%.*]] = load <1024 x i1>, ptr [[VDMRP]], align 128, !tbaa [[__DMR1024_TBAA6]] |
| // AIX-NEXT: [[TMP1:%.*]] = load <256 x i1>, ptr [[VPP]], align 32, !tbaa [[__VECTOR_PAIR_TBAA2]] |
| // AIX-NEXT: [[TMP2:%.*]] = tail call <1024 x i1> @llvm.ppc.mma.pmdmxvi8gerx4spp(<1024 x i1> [[TMP0]], <256 x i1> [[TMP1]], <16 x i8> [[VC]], i32 0, i32 0, i32 0) |
| // AIX-NEXT: store <1024 x i1> [[TMP2]], ptr [[RESP]], align 128, !tbaa [[__DMR1024_TBAA6]] |
| // AIX-NEXT: ret void |
| // |
| void test_pmdmxvi8gerx4spp(unsigned char *vdmrp, unsigned char *vpp, vector unsigned char vc, unsigned char *resp) { |
| __dmr1024 vdmr = *((__dmr1024 *)vdmrp); |
| __vector_pair vp = *((__vector_pair *)vpp); |
| __builtin_mma_pmdmxvi8gerx4spp(&vdmr, vp, vc, 0, 0, 0); |
| *((__dmr1024 *)resp) = vdmr; |
| } |
| |
| // CHECK-LABEL: define dso_local void @test_dmf_basic( |
| // CHECK-SAME: ptr noundef readonly captures(none) [[P:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RES1:%.*]], ptr noundef captures(none) [[RES2:%.*]]) local_unnamed_addr #[[ATTR0]] { |
| // CHECK-NEXT: [[ENTRY:.*:]] |
| // CHECK-NEXT: [[TMP0:%.*]] = tail call <1024 x i1> @llvm.ppc.mma.dmsetdmrz() |
| // CHECK-NEXT: [[TMP1:%.*]] = tail call <1024 x i1> @llvm.ppc.mma.dmmr(<1024 x i1> [[TMP0]]) |
| // CHECK-NEXT: store <1024 x i1> [[TMP1]], ptr [[RES1]], align 128 |
| // CHECK-NEXT: [[TMP2:%.*]] = load <1024 x i1>, ptr [[RES2]], align 128 |
| // CHECK-NEXT: [[TMP3:%.*]] = load <1024 x i1>, ptr [[P]], align 128 |
| // CHECK-NEXT: [[TMP4:%.*]] = tail call <1024 x i1> @llvm.ppc.mma.dmxor(<1024 x i1> [[TMP2]], <1024 x i1> [[TMP3]]) |
| // CHECK-NEXT: store <1024 x i1> [[TMP4]], ptr [[RES2]], align 128 |
| // CHECK-NEXT: ret void |
| // |
| // AIX-LABEL: define void @test_dmf_basic( |
| // AIX-SAME: ptr noundef readonly captures(none) [[P:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RES1:%.*]], ptr noundef captures(none) [[RES2:%.*]]) local_unnamed_addr #[[ATTR0]] { |
| // AIX-NEXT: [[ENTRY:.*:]] |
| // AIX-NEXT: [[TMP0:%.*]] = tail call <1024 x i1> @llvm.ppc.mma.dmsetdmrz() |
| // AIX-NEXT: [[TMP1:%.*]] = tail call <1024 x i1> @llvm.ppc.mma.dmmr(<1024 x i1> [[TMP0]]) |
| // AIX-NEXT: store <1024 x i1> [[TMP1]], ptr [[RES1]], align 128 |
| // AIX-NEXT: [[TMP2:%.*]] = load <1024 x i1>, ptr [[RES2]], align 128 |
| // AIX-NEXT: [[TMP3:%.*]] = load <1024 x i1>, ptr [[P]], align 128 |
| // AIX-NEXT: [[TMP4:%.*]] = tail call <1024 x i1> @llvm.ppc.mma.dmxor(<1024 x i1> [[TMP2]], <1024 x i1> [[TMP3]]) |
| // AIX-NEXT: store <1024 x i1> [[TMP4]], ptr [[RES2]], align 128 |
| // AIX-NEXT: ret void |
| // |
| void test_dmf_basic(char *p, char *res1, char *res2) { |
| __dmr1024 x[2]; |
| __builtin_mma_dmsetdmrz(&x[0]); |
| __builtin_mma_dmmr((__dmr1024*)res1, &x[0]); |
| __builtin_mma_dmxor((__dmr1024*)res2, (__dmr1024*)p); |
| } |
| |
| // CHECK-LABEL: define dso_local void @test_dmf_basic2( |
| // CHECK-SAME: ptr noundef readonly captures(none) [[P1:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RES1:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RES2:%.*]], ptr noundef readonly captures(none) [[V:%.*]]) local_unnamed_addr #[[ATTR0]] { |
| // CHECK-NEXT: [[ENTRY:.*:]] |
| // CHECK-NEXT: [[TMP0:%.*]] = load <16 x i8>, ptr [[V]], align 16, !tbaa [[CHAR_TBAA8:![0-9]+]] |
| // CHECK-NEXT: [[TMP1:%.*]] = tail call <1024 x i1> @llvm.ppc.mma.build.dmr(<16 x i8> [[TMP0]], <16 x i8> [[TMP0]], <16 x i8> [[TMP0]], <16 x i8> [[TMP0]], <16 x i8> [[TMP0]], <16 x i8> [[TMP0]], <16 x i8> [[TMP0]], <16 x i8> [[TMP0]]) |
| // CHECK-NEXT: store <1024 x i1> [[TMP1]], ptr [[RES2]], align 128 |
| // CHECK-NEXT: [[TMP2:%.*]] = load <1024 x i1>, ptr [[P1]], align 128 |
| // CHECK-NEXT: store <1024 x i1> [[TMP2]], ptr [[RES1]], align 128 |
| // CHECK-NEXT: ret void |
| // |
| // AIX-LABEL: define void @test_dmf_basic2( |
| // AIX-SAME: ptr noundef readonly captures(none) [[P1:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RES1:%.*]], ptr noundef writeonly captures(none) initializes((0, 128)) [[RES2:%.*]], ptr noundef readonly captures(none) [[V:%.*]]) local_unnamed_addr #[[ATTR0]] { |
| // AIX-NEXT: [[ENTRY:.*:]] |
| // AIX-NEXT: [[TMP0:%.*]] = load <16 x i8>, ptr [[V]], align 16, !tbaa [[CHAR_TBAA8:![0-9]+]] |
| // AIX-NEXT: [[TMP1:%.*]] = tail call <1024 x i1> @llvm.ppc.mma.build.dmr(<16 x i8> [[TMP0]], <16 x i8> [[TMP0]], <16 x i8> [[TMP0]], <16 x i8> [[TMP0]], <16 x i8> [[TMP0]], <16 x i8> [[TMP0]], <16 x i8> [[TMP0]], <16 x i8> [[TMP0]]) |
| // AIX-NEXT: store <1024 x i1> [[TMP1]], ptr [[RES2]], align 128 |
| // AIX-NEXT: [[TMP2:%.*]] = load <1024 x i1>, ptr [[P1]], align 128 |
| // AIX-NEXT: store <1024 x i1> [[TMP2]], ptr [[RES1]], align 128 |
| // AIX-NEXT: ret void |
| // |
| void test_dmf_basic2(char *p1, char *res1, char *res2, |
| vector unsigned char *v) { |
| vector unsigned char vv = *v; |
| __builtin_mma_build_dmr((__dmr1024*)res2, vv, vv, vv, vv, vv, vv, vv, vv); |
| __builtin_mma_disassemble_dmr(res1, (__dmr1024*)p1); |
| } |
| //. |
| // CHECK: [[__VECTOR_PAIR_TBAA2]] = !{[[META3:![0-9]+]], [[META3]], i64 0} |
| // CHECK: [[META3]] = !{!"__vector_pair", [[META4:![0-9]+]], i64 0} |
| // CHECK: [[META4]] = !{!"omnipotent char", [[META5:![0-9]+]], i64 0} |
| // CHECK: [[META5]] = !{!"Simple C/C++ TBAA"} |
| // CHECK: [[__DMR1024_TBAA6]] = !{[[META7:![0-9]+]], [[META7]], i64 0} |
| // CHECK: [[META7]] = !{!"__dmr1024", [[META4]], i64 0} |
| // CHECK: [[CHAR_TBAA8]] = !{[[META4]], [[META4]], i64 0} |
| //. |
| // AIX: [[__VECTOR_PAIR_TBAA2]] = !{[[META3:![0-9]+]], [[META3]], i64 0} |
| // AIX: [[META3]] = !{!"__vector_pair", [[META4:![0-9]+]], i64 0} |
| // AIX: [[META4]] = !{!"omnipotent char", [[META5:![0-9]+]], i64 0} |
| // AIX: [[META5]] = !{!"Simple C/C++ TBAA"} |
| // AIX: [[__DMR1024_TBAA6]] = !{[[META7:![0-9]+]], [[META7]], i64 0} |
| // AIX: [[META7]] = !{!"__dmr1024", [[META4]], i64 0} |
| // AIX: [[CHAR_TBAA8]] = !{[[META4]], [[META4]], i64 0} |
| //. |