[X86] Support -march=rocketlake
Reviewed By: skan, craig.topper, MaskRay
Differential Revision: https://reviews.llvm.org/D100085
GitOrigin-RevId: 3fc1fe8db830524596bee0d35814d76e5d17ed39
diff --git a/lib/Basic/Targets/X86.cpp b/lib/Basic/Targets/X86.cpp
index 694a809..75d4aa7 100644
--- a/lib/Basic/Targets/X86.cpp
+++ b/lib/Basic/Targets/X86.cpp
@@ -467,6 +467,7 @@
case CK_Cooperlake:
case CK_Cannonlake:
case CK_IcelakeClient:
+ case CK_Rocketlake:
case CK_IcelakeServer:
case CK_Tigerlake:
case CK_SapphireRapids:
@@ -1314,6 +1315,7 @@
case CK_Tigerlake:
case CK_SapphireRapids:
case CK_IcelakeClient:
+ case CK_Rocketlake:
case CK_IcelakeServer:
case CK_Alderlake:
case CK_KNL:
diff --git a/test/CodeGen/attr-target-mv.c b/test/CodeGen/attr-target-mv.c
index ef966cf..54fa1b8 100644
--- a/test/CodeGen/attr-target-mv.c
+++ b/test/CodeGen/attr-target-mv.c
@@ -13,6 +13,7 @@
int __attribute__((target("arch=tigerlake"))) foo(void) {return 9;}
int __attribute__((target("arch=sapphirerapids"))) foo(void) {return 10;}
int __attribute__((target("arch=alderlake"))) foo(void) {return 11;}
+int __attribute__((target("arch=rocketlake"))) foo(void) {return 12;}
int __attribute__((target("default"))) foo(void) { return 2; }
int bar() {
@@ -97,6 +98,8 @@
// LINUX: ret i32 10
// LINUX: define{{.*}} i32 @foo.arch_alderlake()
// LINUX: ret i32 11
+// LINUX: define{{.*}} i32 @foo.arch_rocketlake()
+// LINUX: ret i32 12
// LINUX: define{{.*}} i32 @foo()
// LINUX: ret i32 2
// LINUX: define{{.*}} i32 @bar()
diff --git a/test/CodeGen/target-builtin-noerror.c b/test/CodeGen/target-builtin-noerror.c
index 808f3a0..12d23ae 100644
--- a/test/CodeGen/target-builtin-noerror.c
+++ b/test/CodeGen/target-builtin-noerror.c
@@ -116,6 +116,7 @@
(void)__builtin_cpu_is("knl");
(void)__builtin_cpu_is("knm");
(void)__builtin_cpu_is("nehalem");
+ (void)__builtin_cpu_is("rocketlake");
(void)__builtin_cpu_is("sandybridge");
(void)__builtin_cpu_is("shanghai");
(void)__builtin_cpu_is("silvermont");
diff --git a/test/Driver/x86-march.c b/test/Driver/x86-march.c
index 515981e..46d8d5d 100644
--- a/test/Driver/x86-march.c
+++ b/test/Driver/x86-march.c
@@ -72,6 +72,10 @@
// RUN: | FileCheck %s -check-prefix=icelake-client
// icelake-client: "-target-cpu" "icelake-client"
//
+// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=rocketlake 2>&1 \
+// RUN: | FileCheck %s -check-prefix=rocketlake
+// rocketlake: "-target-cpu" "rocketlake"
+//
// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=icelake-server 2>&1 \
// RUN: | FileCheck %s -check-prefix=icelake-server
// icelake-server: "-target-cpu" "icelake-server"
diff --git a/test/Misc/target-invalid-cpu-note.c b/test/Misc/target-invalid-cpu-note.c
index 43ccdcc..b248baa 100644
--- a/test/Misc/target-invalid-cpu-note.c
+++ b/test/Misc/target-invalid-cpu-note.c
@@ -21,7 +21,7 @@
// X86-SAME: nocona, core2, penryn, bonnell, atom, silvermont, slm, goldmont, goldmont-plus, tremont,
// X86-SAME: nehalem, corei7, westmere, sandybridge, corei7-avx, ivybridge,
// X86-SAME: core-avx-i, haswell, core-avx2, broadwell, skylake, skylake-avx512,
-// X86-SAME: skx, cascadelake, cooperlake, cannonlake, icelake-client, icelake-server, tigerlake, sapphirerapids, alderlake, knl, knm, lakemont, k6, k6-2, k6-3,
+// X86-SAME: skx, cascadelake, cooperlake, cannonlake, icelake-client, rocketlake, icelake-server, tigerlake, sapphirerapids, alderlake, knl, knm, lakemont, k6, k6-2, k6-3,
// X86-SAME: athlon, athlon-tbird, athlon-xp, athlon-mp, athlon-4, k8, athlon64,
// X86-SAME: athlon-fx, opteron, k8-sse3, athlon64-sse3, opteron-sse3, amdfam10,
// X86-SAME: barcelona, btver1, btver2, bdver1, bdver2, bdver3, bdver4, znver1, znver2, znver3,
@@ -33,7 +33,7 @@
// X86_64-SAME: atom, silvermont, slm, goldmont, goldmont-plus, tremont, nehalem, corei7, westmere,
// X86_64-SAME: sandybridge, corei7-avx, ivybridge, core-avx-i, haswell,
// X86_64-SAME: core-avx2, broadwell, skylake, skylake-avx512, skx, cascadelake, cooperlake, cannonlake,
-// X86_64-SAME: icelake-client, icelake-server, tigerlake, sapphirerapids, alderlake, knl, knm, k8, athlon64, athlon-fx, opteron, k8-sse3,
+// X86_64-SAME: icelake-client, rocketlake, icelake-server, tigerlake, sapphirerapids, alderlake, knl, knm, k8, athlon64, athlon-fx, opteron, k8-sse3,
// X86_64-SAME: athlon64-sse3, opteron-sse3, amdfam10, barcelona, btver1,
// X86_64-SAME: btver2, bdver1, bdver2, bdver3, bdver4, znver1, znver2, znver3,
// X86_64-SAME: x86-64, x86-64-v2, x86-64-v3, x86-64-v4{{$}}
@@ -46,7 +46,7 @@
// TUNE_X86-SAME: nocona, core2, penryn, bonnell, atom, silvermont, slm, goldmont, goldmont-plus, tremont,
// TUNE_X86-SAME: nehalem, corei7, westmere, sandybridge, corei7-avx, ivybridge,
// TUNE_X86-SAME: core-avx-i, haswell, core-avx2, broadwell, skylake, skylake-avx512,
-// TUNE_X86-SAME: skx, cascadelake, cooperlake, cannonlake, icelake-client, icelake-server, tigerlake, sapphirerapids, alderlake, knl, knm, lakemont, k6, k6-2, k6-3,
+// TUNE_X86-SAME: skx, cascadelake, cooperlake, cannonlake, icelake-client, rocketlake, icelake-server, tigerlake, sapphirerapids, alderlake, knl, knm, lakemont, k6, k6-2, k6-3,
// TUNE_X86-SAME: athlon, athlon-tbird, athlon-xp, athlon-mp, athlon-4, k8, athlon64,
// TUNE_X86-SAME: athlon-fx, opteron, k8-sse3, athlon64-sse3, opteron-sse3, amdfam10,
// TUNE_X86-SAME: barcelona, btver1, btver2, bdver1, bdver2, bdver3, bdver4, znver1, znver2, znver3,
@@ -60,7 +60,7 @@
// TUNE_X86_64-SAME: nocona, core2, penryn, bonnell, atom, silvermont, slm, goldmont, goldmont-plus, tremont,
// TUNE_X86_64-SAME: nehalem, corei7, westmere, sandybridge, corei7-avx, ivybridge,
// TUNE_X86_64-SAME: core-avx-i, haswell, core-avx2, broadwell, skylake, skylake-avx512,
-// TUNE_X86_64-SAME: skx, cascadelake, cooperlake, cannonlake, icelake-client, icelake-server, tigerlake, sapphirerapids, alderlake, knl, knm, lakemont, k6, k6-2, k6-3,
+// TUNE_X86_64-SAME: skx, cascadelake, cooperlake, cannonlake, icelake-client, rocketlake, icelake-server, tigerlake, sapphirerapids, alderlake, knl, knm, lakemont, k6, k6-2, k6-3,
// TUNE_X86_64-SAME: athlon, athlon-tbird, athlon-xp, athlon-mp, athlon-4, k8, athlon64,
// TUNE_X86_64-SAME: athlon-fx, opteron, k8-sse3, athlon64-sse3, opteron-sse3, amdfam10,
// TUNE_X86_64-SAME: barcelona, btver1, btver2, bdver1, bdver2, bdver3, bdver4, znver1, znver2, znver3,
diff --git a/test/Preprocessor/predefined-arch-macros.c b/test/Preprocessor/predefined-arch-macros.c
index bf253d1..4e01d02 100644
--- a/test/Preprocessor/predefined-arch-macros.c
+++ b/test/Preprocessor/predefined-arch-macros.c
@@ -1280,7 +1280,10 @@
// RUN: %clang -march=icelake-client -m32 -E -dM %s -o - 2>&1 \
// RUN: -target i386-unknown-linux \
-// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_ICL_M32
+// RUN: | FileCheck -match-full-lines %s -check-prefixes=CHECK_ICL_M32,CHECK_ICL_M32S
+// RUN: %clang -march=rocketlake -m32 -E -dM %s -o - 2>&1 \
+// RUN: -target i386-unknown-linux \
+// RUN: | FileCheck -match-full-lines %s -check-prefixes=CHECK_ICL_M32,CHECK_RKL_M32S
// CHECK_ICL_M32: #define __AES__ 1
// CHECK_ICL_M32: #define __AVX2__ 1
// CHECK_ICL_M32: #define __AVX512BITALG__ 1
@@ -1313,7 +1316,8 @@
// CHECK_ICL_M32: #define __RDPID__ 1
// CHECK_ICL_M32: #define __RDRND__ 1
// CHECK_ICL_M32: #define __RDSEED__ 1
-// CHECK_ICL_M32: #define __SGX__ 1
+// CHECK_ICL_M32S: #define __SGX__ 1
+// CHECK_RKL_M32S-NOT: #define __SGX__ 1
// CHECK_ICL_M32: #define __SHA__ 1
// CHECK_ICL_M32: #define __SSE2__ 1
// CHECK_ICL_M32: #define __SSE3__ 1
@@ -1337,7 +1341,10 @@
// RUN: %clang -march=icelake-client -m64 -E -dM %s -o - 2>&1 \
// RUN: -target i386-unknown-linux \
-// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_ICL_M64
+// RUN: | FileCheck -match-full-lines %s -check-prefixes=CHECK_ICL_M64,CHECK_ICL_M64S
+// RUN: %clang -march=rocketlake -m64 -E -dM %s -o - 2>&1 \
+// RUN: -target i386-unknown-linux \
+// RUN: | FileCheck -match-full-lines %s -check-prefixes=CHECK_ICL_M64,CHECK_RKL_M64S
// CHECK_ICL_M64: #define __AES__ 1
// CHECK_ICL_M64: #define __AVX2__ 1
// CHECK_ICL_M64: #define __AVX512BITALG__ 1
@@ -1370,7 +1377,8 @@
// CHECK_ICL_M64: #define __RDPID__ 1
// CHECK_ICL_M64: #define __RDRND__ 1
// CHECK_ICL_M64: #define __RDSEED__ 1
-// CHECK_ICL_M64: #define __SGX__ 1
+// CHECK_ICL_M64S: #define __SGX__ 1
+// CHECK_RKL_M64S-NOT: #define __SGX__ 1
// CHECK_ICL_M64: #define __SHA__ 1
// CHECK_ICL_M64: #define __SSE2__ 1
// CHECK_ICL_M64: #define __SSE3__ 1
