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Zoran Jovanovicada38ef2014-03-27 12:38:40 +00001//===-- MipsAsmBackend.cpp - Mips Asm Backend ----------------------------===//
Bruno Cardoso Lopesc85e3ff2011-11-11 22:58:42 +00002//
Chandler Carruth2946cd72019-01-19 08:50:56 +00003// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
Bruno Cardoso Lopesc85e3ff2011-11-11 22:58:42 +00006//
7//===----------------------------------------------------------------------===//
8//
Zoran Jovanovicada38ef2014-03-27 12:38:40 +00009// This file implements the MipsAsmBackend class.
Bruno Cardoso Lopesc85e3ff2011-11-11 22:58:42 +000010//
11//===----------------------------------------------------------------------===//
12//
13
Zoran Jovanovicada38ef2014-03-27 12:38:40 +000014#include "MCTargetDesc/MipsAsmBackend.h"
Simon Atanasyan9265dca2018-09-17 21:21:57 +000015#include "MCTargetDesc/MipsABIInfo.h"
Chandler Carruth6bda14b2017-06-06 11:49:48 +000016#include "MCTargetDesc/MipsFixupKinds.h"
Akira Hatanaka587fe6c2011-09-30 21:04:02 +000017#include "MCTargetDesc/MipsMCTargetDesc.h"
Fangrui Song6717dc52024-07-21 11:17:19 -070018#include "llvm/ADT/StringSwitch.h"
Bruno Cardoso Lopesc85e3ff2011-11-11 22:58:42 +000019#include "llvm/MC/MCAsmBackend.h"
Akira Hatanaka587fe6c2011-09-30 21:04:02 +000020#include "llvm/MC/MCAssembler.h"
Matheus Almeidae0d75aa2013-12-13 11:11:02 +000021#include "llvm/MC/MCContext.h"
Akira Hatanaka587fe6c2011-09-30 21:04:02 +000022#include "llvm/MC/MCELFObjectWriter.h"
Craig Topper6e80c282012-03-26 06:58:25 +000023#include "llvm/MC/MCFixupKindInfo.h"
Akira Hatanaka587fe6c2011-09-30 21:04:02 +000024#include "llvm/MC/MCObjectWriter.h"
Akira Hatanaka587fe6c2011-09-30 21:04:02 +000025#include "llvm/MC/MCSubtargetInfo.h"
Simon Atanasyan117665582017-09-21 10:44:26 +000026#include "llvm/MC/MCTargetOptions.h"
Daniel Sandersfe98b2f2016-05-03 13:35:44 +000027#include "llvm/MC/MCValue.h"
Akira Hatanaka587fe6c2011-09-30 21:04:02 +000028#include "llvm/Support/ErrorHandling.h"
Matheus Almeidae0d75aa2013-12-13 11:11:02 +000029#include "llvm/Support/MathExtras.h"
Chandler Carruth8a8cd2ba2014-01-07 11:48:04 +000030#include "llvm/Support/raw_ostream.h"
Bruno Cardoso Lopes61e6d982011-12-07 00:28:57 +000031
Akira Hatanaka587fe6c2011-09-30 21:04:02 +000032using namespace llvm;
33
Bruno Cardoso Lopes61e6d982011-12-07 00:28:57 +000034// Prepare value for the target space for it
Matheus Almeidae0d75aa2013-12-13 11:11:02 +000035static unsigned adjustFixupValue(const MCFixup &Fixup, uint64_t Value,
Alex Bradbury866113c2017-04-05 10:16:14 +000036 MCContext &Ctx) {
Matheus Almeidae0d75aa2013-12-13 11:11:02 +000037
38 unsigned Kind = Fixup.getKind();
Bruno Cardoso Lopesc85e3ff2011-11-11 22:58:42 +000039
40 // Add/subtract and shift
41 switch (Kind) {
42 default:
Bruno Cardoso Lopes61e6d982011-12-07 00:28:57 +000043 return 0;
Ed Maste2a710d02014-03-03 14:27:49 +000044 case FK_Data_2:
Bruno Cardoso Lopes61e6d982011-12-07 00:28:57 +000045 case Mips::fixup_Mips_LO16:
Jack Carterc3dd91c2013-01-08 19:01:28 +000046 case Mips::fixup_Mips_GPREL16:
Jack Carterb9f9de92012-06-27 22:48:25 +000047 case Mips::fixup_Mips_GPOFF_HI:
48 case Mips::fixup_Mips_GPOFF_LO:
49 case Mips::fixup_Mips_GOT_PAGE:
50 case Mips::fixup_Mips_GOT_OFST:
Jack Carter5ddcfda2012-07-13 19:15:47 +000051 case Mips::fixup_Mips_GOT_DISP:
Jack Carterb05cb672012-11-21 23:38:59 +000052 case Mips::fixup_Mips_GOT_LO16:
53 case Mips::fixup_Mips_CALL_LO16:
Simon Atanasyana1d69f92018-05-29 11:33:54 +000054 case Mips::fixup_MICROMIPS_GPOFF_HI:
55 case Mips::fixup_MICROMIPS_GPOFF_LO:
Zoran Jovanovice7ae8af2013-10-23 16:14:44 +000056 case Mips::fixup_MICROMIPS_LO16:
57 case Mips::fixup_MICROMIPS_GOT_PAGE:
58 case Mips::fixup_MICROMIPS_GOT_OFST:
59 case Mips::fixup_MICROMIPS_GOT_DISP:
Zoran Jovanovicb355e8f2014-05-27 14:58:51 +000060 case Mips::fixup_MIPS_PCLO16:
Daniel Sandersfe98b2f2016-05-03 13:35:44 +000061 Value &= 0xffff;
62 break;
Fangrui Songb65e0942025-03-01 10:26:49 -080063 case Mips::fixup_Mips_AnyImm16:
64 if (!isInt<16>(Value) && !isUInt<16>(Value))
65 Ctx.reportError(Fixup.getLoc(),
66 "fixup value out of range [-32768, 65535]");
67 break;
Fangrui Song60486292025-03-02 14:59:20 -080068 case Mips::fixup_Mips_GPREL32:
69 case Mips::fixup_Mips_DTPREL32:
70 case Mips::fixup_Mips_DTPREL64:
71 case Mips::fixup_Mips_TPREL32:
72 case Mips::fixup_Mips_TPREL64:
Daniel Sandersfe98b2f2016-05-03 13:35:44 +000073 case FK_Data_4:
74 case FK_Data_8:
Daniel Sanders3feeb9c2016-08-08 11:50:25 +000075 case Mips::fixup_Mips_SUB:
76 case Mips::fixup_MICROMIPS_SUB:
Bruno Cardoso Lopesc85e3ff2011-11-11 22:58:42 +000077 break;
78 case Mips::fixup_Mips_PC16:
Bruno Cardoso Lopesc85e3ff2011-11-11 22:58:42 +000079 // The displacement is then divided by 4 to give us an 18 bit
Matheus Almeidae0d75aa2013-12-13 11:11:02 +000080 // address range. Forcing a signed division because Value can be negative.
81 Value = (int64_t)Value / 4;
82 // We now check if Value can be encoded as a 16-bit signed immediate.
Alex Bradbury866113c2017-04-05 10:16:14 +000083 if (!isInt<16>(Value)) {
84 Ctx.reportError(Fixup.getLoc(), "out of range PC16 fixup");
Oliver Stannard9be59af2015-11-17 10:00:43 +000085 return 0;
86 }
Bruno Cardoso Lopesc85e3ff2011-11-11 22:58:42 +000087 break;
Zoran Jovanovicb9c07f32014-06-12 12:40:00 +000088 case Mips::fixup_MIPS_PC19_S2:
Zoran Jovanovic6764fa72016-04-21 14:09:35 +000089 case Mips::fixup_MICROMIPS_PC19_S2:
Zoran Jovanovicb9c07f32014-06-12 12:40:00 +000090 // Forcing a signed division because Value can be negative.
91 Value = (int64_t)Value / 4;
92 // We now check if Value can be encoded as a 19-bit signed immediate.
Alex Bradbury866113c2017-04-05 10:16:14 +000093 if (!isInt<19>(Value)) {
94 Ctx.reportError(Fixup.getLoc(), "out of range PC19 fixup");
Oliver Stannard9be59af2015-11-17 10:00:43 +000095 return 0;
96 }
Zoran Jovanovicb9c07f32014-06-12 12:40:00 +000097 break;
Bruno Cardoso Lopesc85e3ff2011-11-11 22:58:42 +000098 case Mips::fixup_Mips_26:
99 // So far we are only using this type for jumps.
100 // The displacement is then divided by 4 to give us an 28 bit
101 // address range.
102 Value >>= 2;
103 break;
Akira Hatanakaf5ddf132011-11-23 22:18:04 +0000104 case Mips::fixup_Mips_HI16:
Daniel Sandersfe98b2f2016-05-03 13:35:44 +0000105 case Mips::fixup_Mips_GOT:
Daniel Sandersa2bde882016-05-16 09:33:59 +0000106 case Mips::fixup_MICROMIPS_GOT16:
Jack Carterb05cb672012-11-21 23:38:59 +0000107 case Mips::fixup_Mips_GOT_HI16:
108 case Mips::fixup_Mips_CALL_HI16:
Zoran Jovanovice7ae8af2013-10-23 16:14:44 +0000109 case Mips::fixup_MICROMIPS_HI16:
Zoran Jovanovicb355e8f2014-05-27 14:58:51 +0000110 case Mips::fixup_MIPS_PCHI16:
Jack Carter84491ab2012-08-06 21:26:03 +0000111 // Get the 2nd 16-bits. Also add 1 if bit 15 is 1.
Akira Hatanakada728192012-03-27 01:50:08 +0000112 Value = ((Value + 0x8000) >> 16) & 0xffff;
Akira Hatanakaf5ddf132011-11-23 22:18:04 +0000113 break;
Jack Carter84491ab2012-08-06 21:26:03 +0000114 case Mips::fixup_Mips_HIGHER:
Simon Atanasyan6be87bc2018-05-29 10:27:44 +0000115 case Mips::fixup_MICROMIPS_HIGHER:
Jack Carter84491ab2012-08-06 21:26:03 +0000116 // Get the 3rd 16-bits.
117 Value = ((Value + 0x80008000LL) >> 32) & 0xffff;
118 break;
119 case Mips::fixup_Mips_HIGHEST:
Simon Atanasyan6be87bc2018-05-29 10:27:44 +0000120 case Mips::fixup_MICROMIPS_HIGHEST:
Jack Carter84491ab2012-08-06 21:26:03 +0000121 // Get the 4th 16-bits.
122 Value = ((Value + 0x800080008000LL) >> 48) & 0xffff;
123 break;
Zoran Jovanovic507e0842013-10-29 16:38:59 +0000124 case Mips::fixup_MICROMIPS_26_S1:
125 Value >>= 1;
126 break;
Jozef Kolek9761e962015-01-12 12:03:34 +0000127 case Mips::fixup_MICROMIPS_PC7_S1:
128 Value -= 4;
129 // Forcing a signed division because Value can be negative.
130 Value = (int64_t) Value / 2;
131 // We now check if Value can be encoded as a 7-bit signed immediate.
Alex Bradbury866113c2017-04-05 10:16:14 +0000132 if (!isInt<7>(Value)) {
133 Ctx.reportError(Fixup.getLoc(), "out of range PC7 fixup");
Oliver Stannard9be59af2015-11-17 10:00:43 +0000134 return 0;
135 }
Jozef Kolek9761e962015-01-12 12:03:34 +0000136 break;
Jozef Kolek5cfebdd2015-01-21 12:39:30 +0000137 case Mips::fixup_MICROMIPS_PC10_S1:
138 Value -= 2;
139 // Forcing a signed division because Value can be negative.
140 Value = (int64_t) Value / 2;
141 // We now check if Value can be encoded as a 10-bit signed immediate.
Alex Bradbury866113c2017-04-05 10:16:14 +0000142 if (!isInt<10>(Value)) {
143 Ctx.reportError(Fixup.getLoc(), "out of range PC10 fixup");
Oliver Stannard9be59af2015-11-17 10:00:43 +0000144 return 0;
145 }
Jozef Kolek5cfebdd2015-01-21 12:39:30 +0000146 break;
Zoran Jovanovic8a80aa72013-11-04 14:53:22 +0000147 case Mips::fixup_MICROMIPS_PC16_S1:
148 Value -= 4;
Matheus Almeidae0d75aa2013-12-13 11:11:02 +0000149 // Forcing a signed division because Value can be negative.
150 Value = (int64_t)Value / 2;
151 // We now check if Value can be encoded as a 16-bit signed immediate.
Alex Bradbury866113c2017-04-05 10:16:14 +0000152 if (!isInt<16>(Value)) {
153 Ctx.reportError(Fixup.getLoc(), "out of range PC16 fixup");
Oliver Stannard9be59af2015-11-17 10:00:43 +0000154 return 0;
155 }
Zoran Jovanovic8a80aa72013-11-04 14:53:22 +0000156 break;
Zoran Jovanovica5acdcf2014-06-13 14:26:47 +0000157 case Mips::fixup_MIPS_PC18_S3:
158 // Forcing a signed division because Value can be negative.
159 Value = (int64_t)Value / 8;
160 // We now check if Value can be encoded as a 18-bit signed immediate.
Alex Bradbury866113c2017-04-05 10:16:14 +0000161 if (!isInt<18>(Value)) {
162 Ctx.reportError(Fixup.getLoc(), "out of range PC18 fixup");
Oliver Stannard9be59af2015-11-17 10:00:43 +0000163 return 0;
164 }
Zoran Jovanovica5acdcf2014-06-13 14:26:47 +0000165 break;
Zoran Jovanovic8e366822016-04-22 10:15:12 +0000166 case Mips::fixup_MICROMIPS_PC18_S3:
167 // Check alignment.
Alex Bradbury866113c2017-04-05 10:16:14 +0000168 if ((Value & 7)) {
169 Ctx.reportError(Fixup.getLoc(), "out of range PC18 fixup");
Zoran Jovanovic8e366822016-04-22 10:15:12 +0000170 }
171 // Forcing a signed division because Value can be negative.
172 Value = (int64_t)Value / 8;
173 // We now check if Value can be encoded as a 18-bit signed immediate.
Alex Bradbury866113c2017-04-05 10:16:14 +0000174 if (!isInt<18>(Value)) {
175 Ctx.reportError(Fixup.getLoc(), "out of range PC18 fixup");
Zoran Jovanovic8e366822016-04-22 10:15:12 +0000176 return 0;
177 }
178 break;
Zoran Jovanovic10e06da2014-05-27 12:55:40 +0000179 case Mips::fixup_MIPS_PC21_S2:
Zoran Jovanovic10e06da2014-05-27 12:55:40 +0000180 // Forcing a signed division because Value can be negative.
181 Value = (int64_t) Value / 4;
182 // We now check if Value can be encoded as a 21-bit signed immediate.
Alex Bradbury866113c2017-04-05 10:16:14 +0000183 if (!isInt<21>(Value)) {
184 Ctx.reportError(Fixup.getLoc(), "out of range PC21 fixup");
Oliver Stannard9be59af2015-11-17 10:00:43 +0000185 return 0;
186 }
Zoran Jovanovic10e06da2014-05-27 12:55:40 +0000187 break;
188 case Mips::fixup_MIPS_PC26_S2:
Zoran Jovanovic10e06da2014-05-27 12:55:40 +0000189 // Forcing a signed division because Value can be negative.
190 Value = (int64_t) Value / 4;
191 // We now check if Value can be encoded as a 26-bit signed immediate.
Alex Bradbury866113c2017-04-05 10:16:14 +0000192 if (!isInt<26>(Value)) {
193 Ctx.reportError(Fixup.getLoc(), "out of range PC26 fixup");
Oliver Stannard9be59af2015-11-17 10:00:43 +0000194 return 0;
195 }
Zoran Jovanovic10e06da2014-05-27 12:55:40 +0000196 break;
Zoran Jovanovic02b70032016-04-21 13:43:26 +0000197 case Mips::fixup_MICROMIPS_PC26_S1:
198 // Forcing a signed division because Value can be negative.
199 Value = (int64_t)Value / 2;
200 // We now check if Value can be encoded as a 26-bit signed immediate.
Alex Bradbury866113c2017-04-05 10:16:14 +0000201 if (!isInt<26>(Value)) {
Fangrui Song349006b2022-01-15 00:37:24 -0800202 Ctx.reportError(Fixup.getLoc(), "out of range PC26 fixup");
Zoran Jovanovic02b70032016-04-21 13:43:26 +0000203 return 0;
204 }
205 break;
Zoran Jovanovic5f94ced2016-05-19 12:20:40 +0000206 case Mips::fixup_MICROMIPS_PC21_S1:
207 // Forcing a signed division because Value can be negative.
208 Value = (int64_t)Value / 2;
209 // We now check if Value can be encoded as a 21-bit signed immediate.
Alex Bradbury866113c2017-04-05 10:16:14 +0000210 if (!isInt<21>(Value)) {
211 Ctx.reportError(Fixup.getLoc(), "out of range PC21 fixup");
Zoran Jovanovic5f94ced2016-05-19 12:20:40 +0000212 return 0;
213 }
214 break;
Bruno Cardoso Lopesc85e3ff2011-11-11 22:58:42 +0000215 }
216
217 return Value;
218}
219
Peter Collingbournedcd7d6c2018-05-21 19:20:29 +0000220std::unique_ptr<MCObjectTargetWriter>
221MipsAsmBackend::createObjectTargetWriter() const {
222 return createMipsELFObjectWriter(TheTriple, IsN32);
Zoran Jovanovicada38ef2014-03-27 12:38:40 +0000223}
Akira Hatanaka1ee768d2012-03-01 01:53:15 +0000224
Zoran Jovanovic842f20e2014-04-03 12:01:01 +0000225// Little-endian fixup data byte ordering:
226// mips32r2: a | b | x | x
227// microMIPS: x | x | a | b
228
229static bool needsMMLEByteOrder(unsigned Kind) {
Jozef Kolek5cfebdd2015-01-21 12:39:30 +0000230 return Kind != Mips::fixup_MICROMIPS_PC10_S1 &&
231 Kind >= Mips::fixup_MICROMIPS_26_S1 &&
Zoran Jovanovic842f20e2014-04-03 12:01:01 +0000232 Kind < Mips::LastTargetFixupKind;
233}
234
235// Calculate index for microMIPS specific little endian byte order
236static unsigned calculateMMLEIndex(unsigned i) {
237 assert(i <= 3 && "Index out of range!");
238
239 return (1 - i / 2) * 2 + i % 2;
240}
241
Zoran Jovanovicada38ef2014-03-27 12:38:40 +0000242/// ApplyFixup - Apply the \p Value for given \p Fixup into the provided
243/// data fragment, at the offset specified by the fixup and following the
244/// fixup kind as appropriate.
Rafael Espindola801b42d2017-06-23 22:52:36 +0000245void MipsAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
246 const MCValue &Target,
Rafael Espindola88d9e372017-06-21 23:06:53 +0000247 MutableArrayRef<char> Data, uint64_t Value,
Peter Smith57f661b2018-06-06 09:40:06 +0000248 bool IsResolved,
249 const MCSubtargetInfo *STI) const {
Zoran Jovanovicada38ef2014-03-27 12:38:40 +0000250 MCFixupKind Kind = Fixup.getKind();
Rafael Espindolaf35129212017-06-24 00:26:57 +0000251 MCContext &Ctx = Asm.getContext();
Alex Bradbury866113c2017-04-05 10:16:14 +0000252 Value = adjustFixupValue(Fixup, Value, Ctx);
Akira Hatanaka1ee768d2012-03-01 01:53:15 +0000253
Zoran Jovanovicada38ef2014-03-27 12:38:40 +0000254 if (!Value)
255 return; // Doesn't change encoding.
256
257 // Where do we start in the object
258 unsigned Offset = Fixup.getOffset();
259 // Number of bytes we need to fixup
260 unsigned NumBytes = (getFixupKindInfo(Kind).TargetSize + 7) / 8;
261 // Used to point to big endian bytes
262 unsigned FullSize;
263
264 switch ((unsigned)Kind) {
265 case FK_Data_2:
266 case Mips::fixup_Mips_16:
Jozef Kolek5cfebdd2015-01-21 12:39:30 +0000267 case Mips::fixup_MICROMIPS_PC10_S1:
Zoran Jovanovicada38ef2014-03-27 12:38:40 +0000268 FullSize = 2;
269 break;
270 case FK_Data_8:
271 case Mips::fixup_Mips_64:
272 FullSize = 8;
273 break;
274 case FK_Data_4:
275 default:
276 FullSize = 4;
277 break;
Akira Hatanaka1ee768d2012-03-01 01:53:15 +0000278 }
Akira Hatanaka44220ca2011-09-30 21:23:45 +0000279
Zoran Jovanovicada38ef2014-03-27 12:38:40 +0000280 // Grab current value, if any, from bits.
281 uint64_t CurVal = 0;
Bruno Cardoso Lopesc85e3ff2011-11-11 22:58:42 +0000282
Zoran Jovanovic842f20e2014-04-03 12:01:01 +0000283 bool microMipsLEByteOrder = needsMMLEByteOrder((unsigned) Kind);
284
Zoran Jovanovicada38ef2014-03-27 12:38:40 +0000285 for (unsigned i = 0; i != NumBytes; ++i) {
Kazu Hirata4a0ccfa2023-10-12 21:21:44 -0700286 unsigned Idx = Endian == llvm::endianness::little
Peter Collingbourne571a3302018-05-21 17:57:19 +0000287 ? (microMipsLEByteOrder ? calculateMMLEIndex(i) : i)
288 : (FullSize - 1 - i);
Zoran Jovanovicada38ef2014-03-27 12:38:40 +0000289 CurVal |= (uint64_t)((uint8_t)Data[Offset + Idx]) << (i*8);
Akira Hatanaka0137dfe2012-03-21 00:52:01 +0000290 }
Bruno Cardoso Lopesc85e3ff2011-11-11 22:58:42 +0000291
Zoran Jovanovicada38ef2014-03-27 12:38:40 +0000292 uint64_t Mask = ((uint64_t)(-1) >>
293 (64 - getFixupKindInfo(Kind).TargetSize));
294 CurVal |= Value & Mask;
Bruno Cardoso Lopesc85e3ff2011-11-11 22:58:42 +0000295
Zoran Jovanovicada38ef2014-03-27 12:38:40 +0000296 // Write out the fixed up bytes back to the code/data bits.
297 for (unsigned i = 0; i != NumBytes; ++i) {
Kazu Hirata4a0ccfa2023-10-12 21:21:44 -0700298 unsigned Idx = Endian == llvm::endianness::little
Peter Collingbourne571a3302018-05-21 17:57:19 +0000299 ? (microMipsLEByteOrder ? calculateMMLEIndex(i) : i)
300 : (FullSize - 1 - i);
Zoran Jovanovicada38ef2014-03-27 12:38:40 +0000301 Data[Offset + Idx] = (uint8_t)((CurVal >> (i*8)) & 0xff);
Akira Hatanaka44220ca2011-09-30 21:23:45 +0000302 }
Zoran Jovanovicada38ef2014-03-27 12:38:40 +0000303}
Akira Hatanaka44220ca2011-09-30 21:23:45 +0000304
Fangrui Songf4c16c42022-12-04 21:36:08 +0000305std::optional<MCFixupKind> MipsAsmBackend::getFixupKind(StringRef Name) const {
Fangrui Songdd587352022-06-30 16:39:23 -0700306 unsigned Type = llvm::StringSwitch<unsigned>(Name)
307 .Case("BFD_RELOC_NONE", ELF::R_MIPS_NONE)
308 .Case("BFD_RELOC_16", ELF::R_MIPS_16)
309 .Case("BFD_RELOC_32", ELF::R_MIPS_32)
310 .Case("BFD_RELOC_64", ELF::R_MIPS_64)
311 .Default(-1u);
312 if (Type != -1u)
313 return static_cast<MCFixupKind>(FirstLiteralRelocationKind + Type);
314
Fangrui Songf4c16c42022-12-04 21:36:08 +0000315 return StringSwitch<std::optional<MCFixupKind>>(Name)
Fangrui Song43ca0e92019-05-17 02:51:54 +0000316 .Case("R_MIPS_NONE", FK_NONE)
David Majnemerce108422016-01-19 23:05:27 +0000317 .Case("R_MIPS_32", FK_Data_4)
Simon Atanasyan3a44bcf2018-06-01 16:37:42 +0000318 .Case("R_MIPS_CALL_HI16", (MCFixupKind)Mips::fixup_Mips_CALL_HI16)
319 .Case("R_MIPS_CALL_LO16", (MCFixupKind)Mips::fixup_Mips_CALL_LO16)
320 .Case("R_MIPS_CALL16", (MCFixupKind)Mips::fixup_Mips_CALL16)
321 .Case("R_MIPS_GOT16", (MCFixupKind)Mips::fixup_Mips_GOT)
322 .Case("R_MIPS_GOT_PAGE", (MCFixupKind)Mips::fixup_Mips_GOT_PAGE)
323 .Case("R_MIPS_GOT_OFST", (MCFixupKind)Mips::fixup_Mips_GOT_OFST)
324 .Case("R_MIPS_GOT_DISP", (MCFixupKind)Mips::fixup_Mips_GOT_DISP)
325 .Case("R_MIPS_GOT_HI16", (MCFixupKind)Mips::fixup_Mips_GOT_HI16)
326 .Case("R_MIPS_GOT_LO16", (MCFixupKind)Mips::fixup_Mips_GOT_LO16)
327 .Case("R_MIPS_TLS_GOTTPREL", (MCFixupKind)Mips::fixup_Mips_GOTTPREL)
328 .Case("R_MIPS_TLS_DTPREL_HI16", (MCFixupKind)Mips::fixup_Mips_DTPREL_HI)
329 .Case("R_MIPS_TLS_DTPREL_LO16", (MCFixupKind)Mips::fixup_Mips_DTPREL_LO)
330 .Case("R_MIPS_TLS_GD", (MCFixupKind)Mips::fixup_Mips_TLSGD)
331 .Case("R_MIPS_TLS_LDM", (MCFixupKind)Mips::fixup_Mips_TLSLDM)
332 .Case("R_MIPS_TLS_TPREL_HI16", (MCFixupKind)Mips::fixup_Mips_TPREL_HI)
333 .Case("R_MIPS_TLS_TPREL_LO16", (MCFixupKind)Mips::fixup_Mips_TPREL_LO)
334 .Case("R_MICROMIPS_CALL16", (MCFixupKind)Mips::fixup_MICROMIPS_CALL16)
335 .Case("R_MICROMIPS_GOT_DISP", (MCFixupKind)Mips::fixup_MICROMIPS_GOT_DISP)
336 .Case("R_MICROMIPS_GOT_PAGE", (MCFixupKind)Mips::fixup_MICROMIPS_GOT_PAGE)
337 .Case("R_MICROMIPS_GOT_OFST", (MCFixupKind)Mips::fixup_MICROMIPS_GOT_OFST)
338 .Case("R_MICROMIPS_GOT16", (MCFixupKind)Mips::fixup_MICROMIPS_GOT16)
339 .Case("R_MICROMIPS_TLS_GOTTPREL",
340 (MCFixupKind)Mips::fixup_MICROMIPS_GOTTPREL)
341 .Case("R_MICROMIPS_TLS_DTPREL_HI16",
342 (MCFixupKind)Mips::fixup_MICROMIPS_TLS_DTPREL_HI16)
343 .Case("R_MICROMIPS_TLS_DTPREL_LO16",
344 (MCFixupKind)Mips::fixup_MICROMIPS_TLS_DTPREL_LO16)
345 .Case("R_MICROMIPS_TLS_GD", (MCFixupKind)Mips::fixup_MICROMIPS_TLS_GD)
346 .Case("R_MICROMIPS_TLS_LDM", (MCFixupKind)Mips::fixup_MICROMIPS_TLS_LDM)
347 .Case("R_MICROMIPS_TLS_TPREL_HI16",
348 (MCFixupKind)Mips::fixup_MICROMIPS_TLS_TPREL_HI16)
349 .Case("R_MICROMIPS_TLS_TPREL_LO16",
350 (MCFixupKind)Mips::fixup_MICROMIPS_TLS_TPREL_LO16)
Vladimir Stefanovic64ad1cf2018-11-21 16:38:34 +0000351 .Case("R_MIPS_JALR", (MCFixupKind)Mips::fixup_Mips_JALR)
352 .Case("R_MICROMIPS_JALR", (MCFixupKind)Mips::fixup_MICROMIPS_JALR)
David Majnemerce108422016-01-19 23:05:27 +0000353 .Default(MCAsmBackend::getFixupKind(Name));
Daniel Sanders9f6ad492015-11-12 13:33:00 +0000354}
355
Zoran Jovanovicada38ef2014-03-27 12:38:40 +0000356const MCFixupKindInfo &MipsAsmBackend::
357getFixupKindInfo(MCFixupKind Kind) const {
Alexander Richardsone8059b12018-03-27 10:08:12 +0000358 const static MCFixupKindInfo LittleEndianInfos[] = {
Fangrui Songb356a302025-03-01 10:16:02 -0800359 // This table *must* be in same the order of fixup_* kinds in
360 // MipsFixupKinds.h.
361 //
362 // name offset bits flags
363 // clang-format off
Zoran Jovanovicada38ef2014-03-27 12:38:40 +0000364 { "fixup_Mips_16", 0, 16, 0 },
365 { "fixup_Mips_32", 0, 32, 0 },
366 { "fixup_Mips_REL32", 0, 32, 0 },
Fangrui Song60486292025-03-02 14:59:20 -0800367 { "fixup_Mips_GPREL32", 0, 32, 0 },
368 { "fixup_Mips_DTPREL32", 0, 32, 0 },
369 { "fixup_Mips_DTPREL64", 0, 64, 0 },
370 { "fixup_Mips_TPREL32", 0, 32, 0 },
371 { "fixup_Mips_TPREL64", 0, 64, 0 },
Zoran Jovanovicada38ef2014-03-27 12:38:40 +0000372 { "fixup_Mips_26", 0, 26, 0 },
373 { "fixup_Mips_HI16", 0, 16, 0 },
374 { "fixup_Mips_LO16", 0, 16, 0 },
Fangrui Songb65e0942025-03-01 10:26:49 -0800375 { "fixup_Mips_AnyImm16", 0, 16, 0 },
Zoran Jovanovicada38ef2014-03-27 12:38:40 +0000376 { "fixup_Mips_GPREL16", 0, 16, 0 },
377 { "fixup_Mips_LITERAL", 0, 16, 0 },
Daniel Sandersfe98b2f2016-05-03 13:35:44 +0000378 { "fixup_Mips_GOT", 0, 16, 0 },
Zoran Jovanovicada38ef2014-03-27 12:38:40 +0000379 { "fixup_Mips_PC16", 0, 16, MCFixupKindInfo::FKF_IsPCRel },
380 { "fixup_Mips_CALL16", 0, 16, 0 },
Zoran Jovanovicada38ef2014-03-27 12:38:40 +0000381 { "fixup_Mips_SHIFT5", 6, 5, 0 },
382 { "fixup_Mips_SHIFT6", 6, 5, 0 },
383 { "fixup_Mips_64", 0, 64, 0 },
384 { "fixup_Mips_TLSGD", 0, 16, 0 },
385 { "fixup_Mips_GOTTPREL", 0, 16, 0 },
386 { "fixup_Mips_TPREL_HI", 0, 16, 0 },
387 { "fixup_Mips_TPREL_LO", 0, 16, 0 },
388 { "fixup_Mips_TLSLDM", 0, 16, 0 },
389 { "fixup_Mips_DTPREL_HI", 0, 16, 0 },
390 { "fixup_Mips_DTPREL_LO", 0, 16, 0 },
391 { "fixup_Mips_Branch_PCRel", 0, 16, MCFixupKindInfo::FKF_IsPCRel },
392 { "fixup_Mips_GPOFF_HI", 0, 16, 0 },
Simon Atanasyana1d69f92018-05-29 11:33:54 +0000393 { "fixup_MICROMIPS_GPOFF_HI",0, 16, 0 },
Zoran Jovanovicada38ef2014-03-27 12:38:40 +0000394 { "fixup_Mips_GPOFF_LO", 0, 16, 0 },
Simon Atanasyana1d69f92018-05-29 11:33:54 +0000395 { "fixup_MICROMIPS_GPOFF_LO",0, 16, 0 },
Zoran Jovanovicada38ef2014-03-27 12:38:40 +0000396 { "fixup_Mips_GOT_PAGE", 0, 16, 0 },
397 { "fixup_Mips_GOT_OFST", 0, 16, 0 },
398 { "fixup_Mips_GOT_DISP", 0, 16, 0 },
399 { "fixup_Mips_HIGHER", 0, 16, 0 },
Simon Atanasyan6be87bc2018-05-29 10:27:44 +0000400 { "fixup_MICROMIPS_HIGHER", 0, 16, 0 },
Zoran Jovanovicada38ef2014-03-27 12:38:40 +0000401 { "fixup_Mips_HIGHEST", 0, 16, 0 },
Simon Atanasyan6be87bc2018-05-29 10:27:44 +0000402 { "fixup_MICROMIPS_HIGHEST", 0, 16, 0 },
Zoran Jovanovicada38ef2014-03-27 12:38:40 +0000403 { "fixup_Mips_GOT_HI16", 0, 16, 0 },
404 { "fixup_Mips_GOT_LO16", 0, 16, 0 },
405 { "fixup_Mips_CALL_HI16", 0, 16, 0 },
406 { "fixup_Mips_CALL_LO16", 0, 16, 0 },
Zoran Jovanovica5acdcf2014-06-13 14:26:47 +0000407 { "fixup_Mips_PC18_S3", 0, 18, MCFixupKindInfo::FKF_IsPCRel },
Zoran Jovanovicb9c07f32014-06-12 12:40:00 +0000408 { "fixup_MIPS_PC19_S2", 0, 19, MCFixupKindInfo::FKF_IsPCRel },
Zoran Jovanovic10e06da2014-05-27 12:55:40 +0000409 { "fixup_MIPS_PC21_S2", 0, 21, MCFixupKindInfo::FKF_IsPCRel },
410 { "fixup_MIPS_PC26_S2", 0, 26, MCFixupKindInfo::FKF_IsPCRel },
Zoran Jovanovicb355e8f2014-05-27 14:58:51 +0000411 { "fixup_MIPS_PCHI16", 0, 16, MCFixupKindInfo::FKF_IsPCRel },
412 { "fixup_MIPS_PCLO16", 0, 16, MCFixupKindInfo::FKF_IsPCRel },
Zoran Jovanovicada38ef2014-03-27 12:38:40 +0000413 { "fixup_MICROMIPS_26_S1", 0, 26, 0 },
414 { "fixup_MICROMIPS_HI16", 0, 16, 0 },
415 { "fixup_MICROMIPS_LO16", 0, 16, 0 },
416 { "fixup_MICROMIPS_GOT16", 0, 16, 0 },
Jozef Kolek9761e962015-01-12 12:03:34 +0000417 { "fixup_MICROMIPS_PC7_S1", 0, 7, MCFixupKindInfo::FKF_IsPCRel },
Jozef Kolek5cfebdd2015-01-21 12:39:30 +0000418 { "fixup_MICROMIPS_PC10_S1", 0, 10, MCFixupKindInfo::FKF_IsPCRel },
Zoran Jovanovicada38ef2014-03-27 12:38:40 +0000419 { "fixup_MICROMIPS_PC16_S1", 0, 16, MCFixupKindInfo::FKF_IsPCRel },
Zoran Jovanovic02b70032016-04-21 13:43:26 +0000420 { "fixup_MICROMIPS_PC26_S1", 0, 26, MCFixupKindInfo::FKF_IsPCRel },
Zoran Jovanovic6764fa72016-04-21 14:09:35 +0000421 { "fixup_MICROMIPS_PC19_S2", 0, 19, MCFixupKindInfo::FKF_IsPCRel },
Zoran Jovanovic8e366822016-04-22 10:15:12 +0000422 { "fixup_MICROMIPS_PC18_S3", 0, 18, MCFixupKindInfo::FKF_IsPCRel },
Zoran Jovanovic5f94ced2016-05-19 12:20:40 +0000423 { "fixup_MICROMIPS_PC21_S1", 0, 21, MCFixupKindInfo::FKF_IsPCRel },
Zoran Jovanovicada38ef2014-03-27 12:38:40 +0000424 { "fixup_MICROMIPS_CALL16", 0, 16, 0 },
425 { "fixup_MICROMIPS_GOT_DISP", 0, 16, 0 },
426 { "fixup_MICROMIPS_GOT_PAGE", 0, 16, 0 },
427 { "fixup_MICROMIPS_GOT_OFST", 0, 16, 0 },
428 { "fixup_MICROMIPS_TLS_GD", 0, 16, 0 },
429 { "fixup_MICROMIPS_TLS_LDM", 0, 16, 0 },
430 { "fixup_MICROMIPS_TLS_DTPREL_HI16", 0, 16, 0 },
431 { "fixup_MICROMIPS_TLS_DTPREL_LO16", 0, 16, 0 },
Simon Atanasyan3979f432017-04-30 04:27:23 +0000432 { "fixup_MICROMIPS_GOTTPREL", 0, 16, 0 },
Zoran Jovanovicada38ef2014-03-27 12:38:40 +0000433 { "fixup_MICROMIPS_TLS_TPREL_HI16", 0, 16, 0 },
Daniel Sanders3feeb9c2016-08-08 11:50:25 +0000434 { "fixup_MICROMIPS_TLS_TPREL_LO16", 0, 16, 0 },
435 { "fixup_Mips_SUB", 0, 64, 0 },
Vladimir Stefanovic64ad1cf2018-11-21 16:38:34 +0000436 { "fixup_MICROMIPS_SUB", 0, 64, 0 },
437 { "fixup_Mips_JALR", 0, 32, 0 },
Fangrui Songb356a302025-03-01 10:16:02 -0800438 { "fixup_MICROMIPS_JALR", 0, 32, 0 },
439 // clang-format on
Zoran Jovanovicada38ef2014-03-27 12:38:40 +0000440 };
Joe Loser5e96cea2022-09-06 18:06:58 -0600441 static_assert(std::size(LittleEndianInfos) == Mips::NumTargetFixupKinds,
Alexander Richardsone8059b12018-03-27 10:08:12 +0000442 "Not all MIPS little endian fixup kinds added!");
Akira Hatanaka44220ca2011-09-30 21:23:45 +0000443
Alexander Richardsone8059b12018-03-27 10:08:12 +0000444 const static MCFixupKindInfo BigEndianInfos[] = {
Fangrui Songb356a302025-03-01 10:16:02 -0800445 // This table *must* be in same the order of fixup_* kinds in
446 // MipsFixupKinds.h.
447 //
448 // name offset bits flags
449 // clang-format off
Daniel Sanders683ed962014-05-23 13:35:24 +0000450 { "fixup_Mips_16", 16, 16, 0 },
451 { "fixup_Mips_32", 0, 32, 0 },
452 { "fixup_Mips_REL32", 0, 32, 0 },
Fangrui Song60486292025-03-02 14:59:20 -0800453 { "fixup_Mips_GPREL32", 0, 32, 0 },
454 { "fixup_Mips_DTPREL32", 0, 32, 0 },
455 { "fixup_Mips_DTPREL64", 0, 64, 0 },
456 { "fixup_Mips_TPREL32", 0, 32, 0 },
457 { "fixup_Mips_TPREL64", 0, 64, 0 },
Daniel Sanders683ed962014-05-23 13:35:24 +0000458 { "fixup_Mips_26", 6, 26, 0 },
459 { "fixup_Mips_HI16", 16, 16, 0 },
460 { "fixup_Mips_LO16", 16, 16, 0 },
Fangrui Songb65e0942025-03-01 10:26:49 -0800461 { "fixup_Mips_AnyImm16", 16, 16, 0 },
Daniel Sanders683ed962014-05-23 13:35:24 +0000462 { "fixup_Mips_GPREL16", 16, 16, 0 },
463 { "fixup_Mips_LITERAL", 16, 16, 0 },
Daniel Sandersfe98b2f2016-05-03 13:35:44 +0000464 { "fixup_Mips_GOT", 16, 16, 0 },
Daniel Sanders683ed962014-05-23 13:35:24 +0000465 { "fixup_Mips_PC16", 16, 16, MCFixupKindInfo::FKF_IsPCRel },
466 { "fixup_Mips_CALL16", 16, 16, 0 },
Daniel Sanders683ed962014-05-23 13:35:24 +0000467 { "fixup_Mips_SHIFT5", 21, 5, 0 },
468 { "fixup_Mips_SHIFT6", 21, 5, 0 },
469 { "fixup_Mips_64", 0, 64, 0 },
470 { "fixup_Mips_TLSGD", 16, 16, 0 },
471 { "fixup_Mips_GOTTPREL", 16, 16, 0 },
472 { "fixup_Mips_TPREL_HI", 16, 16, 0 },
473 { "fixup_Mips_TPREL_LO", 16, 16, 0 },
474 { "fixup_Mips_TLSLDM", 16, 16, 0 },
475 { "fixup_Mips_DTPREL_HI", 16, 16, 0 },
476 { "fixup_Mips_DTPREL_LO", 16, 16, 0 },
477 { "fixup_Mips_Branch_PCRel",16, 16, MCFixupKindInfo::FKF_IsPCRel },
478 { "fixup_Mips_GPOFF_HI", 16, 16, 0 },
Simon Atanasyana1d69f92018-05-29 11:33:54 +0000479 { "fixup_MICROMIPS_GPOFF_HI", 16, 16, 0 },
Daniel Sanders683ed962014-05-23 13:35:24 +0000480 { "fixup_Mips_GPOFF_LO", 16, 16, 0 },
Simon Atanasyana1d69f92018-05-29 11:33:54 +0000481 { "fixup_MICROMIPS_GPOFF_LO", 16, 16, 0 },
Daniel Sanders683ed962014-05-23 13:35:24 +0000482 { "fixup_Mips_GOT_PAGE", 16, 16, 0 },
483 { "fixup_Mips_GOT_OFST", 16, 16, 0 },
484 { "fixup_Mips_GOT_DISP", 16, 16, 0 },
485 { "fixup_Mips_HIGHER", 16, 16, 0 },
Simon Atanasyan6be87bc2018-05-29 10:27:44 +0000486 { "fixup_MICROMIPS_HIGHER", 16, 16, 0 },
Daniel Sanders683ed962014-05-23 13:35:24 +0000487 { "fixup_Mips_HIGHEST", 16, 16, 0 },
Simon Atanasyan6be87bc2018-05-29 10:27:44 +0000488 { "fixup_MICROMIPS_HIGHEST",16, 16, 0 },
Daniel Sanders683ed962014-05-23 13:35:24 +0000489 { "fixup_Mips_GOT_HI16", 16, 16, 0 },
490 { "fixup_Mips_GOT_LO16", 16, 16, 0 },
491 { "fixup_Mips_CALL_HI16", 16, 16, 0 },
492 { "fixup_Mips_CALL_LO16", 16, 16, 0 },
Zoran Jovanovica5acdcf2014-06-13 14:26:47 +0000493 { "fixup_Mips_PC18_S3", 14, 18, MCFixupKindInfo::FKF_IsPCRel },
Zoran Jovanovicb9c07f32014-06-12 12:40:00 +0000494 { "fixup_MIPS_PC19_S2", 13, 19, MCFixupKindInfo::FKF_IsPCRel },
Zoran Jovanovic10e06da2014-05-27 12:55:40 +0000495 { "fixup_MIPS_PC21_S2", 11, 21, MCFixupKindInfo::FKF_IsPCRel },
496 { "fixup_MIPS_PC26_S2", 6, 26, MCFixupKindInfo::FKF_IsPCRel },
Zoran Jovanovicb355e8f2014-05-27 14:58:51 +0000497 { "fixup_MIPS_PCHI16", 16, 16, MCFixupKindInfo::FKF_IsPCRel },
498 { "fixup_MIPS_PCLO16", 16, 16, MCFixupKindInfo::FKF_IsPCRel },
Daniel Sanders683ed962014-05-23 13:35:24 +0000499 { "fixup_MICROMIPS_26_S1", 6, 26, 0 },
500 { "fixup_MICROMIPS_HI16", 16, 16, 0 },
501 { "fixup_MICROMIPS_LO16", 16, 16, 0 },
502 { "fixup_MICROMIPS_GOT16", 16, 16, 0 },
Jozef Kolek9761e962015-01-12 12:03:34 +0000503 { "fixup_MICROMIPS_PC7_S1", 9, 7, MCFixupKindInfo::FKF_IsPCRel },
Jozef Kolek5cfebdd2015-01-21 12:39:30 +0000504 { "fixup_MICROMIPS_PC10_S1", 6, 10, MCFixupKindInfo::FKF_IsPCRel },
Daniel Sanders683ed962014-05-23 13:35:24 +0000505 { "fixup_MICROMIPS_PC16_S1",16, 16, MCFixupKindInfo::FKF_IsPCRel },
Zoran Jovanovic02b70032016-04-21 13:43:26 +0000506 { "fixup_MICROMIPS_PC26_S1", 6, 26, MCFixupKindInfo::FKF_IsPCRel },
Zoran Jovanovic6764fa72016-04-21 14:09:35 +0000507 { "fixup_MICROMIPS_PC19_S2",13, 19, MCFixupKindInfo::FKF_IsPCRel },
Zoran Jovanovic8e366822016-04-22 10:15:12 +0000508 { "fixup_MICROMIPS_PC18_S3",14, 18, MCFixupKindInfo::FKF_IsPCRel },
Zoran Jovanovic5f94ced2016-05-19 12:20:40 +0000509 { "fixup_MICROMIPS_PC21_S1",11, 21, MCFixupKindInfo::FKF_IsPCRel },
Daniel Sanders683ed962014-05-23 13:35:24 +0000510 { "fixup_MICROMIPS_CALL16", 16, 16, 0 },
511 { "fixup_MICROMIPS_GOT_DISP", 16, 16, 0 },
512 { "fixup_MICROMIPS_GOT_PAGE", 16, 16, 0 },
513 { "fixup_MICROMIPS_GOT_OFST", 16, 16, 0 },
514 { "fixup_MICROMIPS_TLS_GD", 16, 16, 0 },
515 { "fixup_MICROMIPS_TLS_LDM", 16, 16, 0 },
516 { "fixup_MICROMIPS_TLS_DTPREL_HI16", 16, 16, 0 },
517 { "fixup_MICROMIPS_TLS_DTPREL_LO16", 16, 16, 0 },
Simon Atanasyan3979f432017-04-30 04:27:23 +0000518 { "fixup_MICROMIPS_GOTTPREL", 16, 16, 0 },
Daniel Sanders683ed962014-05-23 13:35:24 +0000519 { "fixup_MICROMIPS_TLS_TPREL_HI16", 16, 16, 0 },
Daniel Sanders3feeb9c2016-08-08 11:50:25 +0000520 { "fixup_MICROMIPS_TLS_TPREL_LO16", 16, 16, 0 },
521 { "fixup_Mips_SUB", 0, 64, 0 },
Vladimir Stefanovic64ad1cf2018-11-21 16:38:34 +0000522 { "fixup_MICROMIPS_SUB", 0, 64, 0 },
523 { "fixup_Mips_JALR", 0, 32, 0 },
Fangrui Songb356a302025-03-01 10:16:02 -0800524 { "fixup_MICROMIPS_JALR", 0, 32, 0 },
525 // clang-format on
Daniel Sanders683ed962014-05-23 13:35:24 +0000526 };
Joe Loser5e96cea2022-09-06 18:06:58 -0600527 static_assert(std::size(BigEndianInfos) == Mips::NumTargetFixupKinds,
Alexander Richardsone8059b12018-03-27 10:08:12 +0000528 "Not all MIPS big endian fixup kinds added!");
Daniel Sanders683ed962014-05-23 13:35:24 +0000529
Fangrui Songf9bd89b2025-04-18 18:18:30 -0700530 if (mc::isRelocation(Kind))
Fangrui Songdd587352022-06-30 16:39:23 -0700531 return MCAsmBackend::getFixupKindInfo(FK_NONE);
Zoran Jovanovicada38ef2014-03-27 12:38:40 +0000532 if (Kind < FirstTargetFixupKind)
533 return MCAsmBackend::getFixupKindInfo(Kind);
Akira Hatanaka44220ca2011-09-30 21:23:45 +0000534
Fangrui Song2c35cb62025-03-16 23:50:46 -0700535 assert(unsigned(Kind - FirstTargetFixupKind) < Mips::NumTargetFixupKinds &&
536 "Invalid kind!");
Daniel Sanders683ed962014-05-23 13:35:24 +0000537
Kazu Hirata4a0ccfa2023-10-12 21:21:44 -0700538 if (Endian == llvm::endianness::little)
Daniel Sanders683ed962014-05-23 13:35:24 +0000539 return LittleEndianInfos[Kind - FirstTargetFixupKind];
540 return BigEndianInfos[Kind - FirstTargetFixupKind];
Zoran Jovanovicada38ef2014-03-27 12:38:40 +0000541}
Jim Grosbach25b63fa2011-12-06 00:47:03 +0000542
Zoran Jovanovicada38ef2014-03-27 12:38:40 +0000543/// WriteNopData - Write an (optimal) nop sequence of Count bytes
544/// to the given output. If the target cannot generate such a sequence,
545/// it should return an error.
546///
547/// \return - True on success.
Peter Smithe63455d2021-08-09 11:40:22 +0100548bool MipsAsmBackend::writeNopData(raw_ostream &OS, uint64_t Count,
549 const MCSubtargetInfo *STI) const {
Zoran Jovanovicada38ef2014-03-27 12:38:40 +0000550 // Check for a less than instruction size number of bytes
551 // FIXME: 16 bit instructions are not handled yet here.
552 // We shouldn't be using a hard coded number for instruction size.
Joerg Sonnenbergerf148a6d2014-10-02 13:41:42 +0000553
554 // If the count is not 4-byte aligned, we must be writing data into the text
555 // section (otherwise we have unaligned instructions, and thus have far
556 // bigger problems), so just write zeros instead.
Peter Collingbourne571a3302018-05-21 17:57:19 +0000557 OS.write_zeros(Count);
Zoran Jovanovicada38ef2014-03-27 12:38:40 +0000558 return true;
559}
Simon Atanasyan117665582017-09-21 10:44:26 +0000560
Simon Atanasyan3a44bcf2018-06-01 16:37:42 +0000561bool MipsAsmBackend::shouldForceRelocation(const MCAssembler &Asm,
562 const MCFixup &Fixup,
Craig Toppere87f33d2023-12-07 13:17:58 -0800563 const MCValue &Target,
564 const MCSubtargetInfo *STI) {
Simon Atanasyan3a44bcf2018-06-01 16:37:42 +0000565 const unsigned FixupKind = Fixup.getKind();
566 switch (FixupKind) {
567 default:
568 return false;
569 // All these relocations require special processing
570 // at linking time. Delegate this work to a linker.
571 case Mips::fixup_Mips_CALL_HI16:
572 case Mips::fixup_Mips_CALL_LO16:
573 case Mips::fixup_Mips_CALL16:
574 case Mips::fixup_Mips_GOT:
575 case Mips::fixup_Mips_GOT_PAGE:
576 case Mips::fixup_Mips_GOT_OFST:
577 case Mips::fixup_Mips_GOT_DISP:
578 case Mips::fixup_Mips_GOT_HI16:
579 case Mips::fixup_Mips_GOT_LO16:
580 case Mips::fixup_Mips_GOTTPREL:
581 case Mips::fixup_Mips_DTPREL_HI:
582 case Mips::fixup_Mips_DTPREL_LO:
583 case Mips::fixup_Mips_TLSGD:
584 case Mips::fixup_Mips_TLSLDM:
585 case Mips::fixup_Mips_TPREL_HI:
586 case Mips::fixup_Mips_TPREL_LO:
Vladimir Stefanovic64ad1cf2018-11-21 16:38:34 +0000587 case Mips::fixup_Mips_JALR:
Simon Atanasyan3a44bcf2018-06-01 16:37:42 +0000588 case Mips::fixup_MICROMIPS_CALL16:
589 case Mips::fixup_MICROMIPS_GOT_DISP:
590 case Mips::fixup_MICROMIPS_GOT_PAGE:
591 case Mips::fixup_MICROMIPS_GOT_OFST:
592 case Mips::fixup_MICROMIPS_GOT16:
593 case Mips::fixup_MICROMIPS_GOTTPREL:
594 case Mips::fixup_MICROMIPS_TLS_DTPREL_HI16:
595 case Mips::fixup_MICROMIPS_TLS_DTPREL_LO16:
596 case Mips::fixup_MICROMIPS_TLS_GD:
597 case Mips::fixup_MICROMIPS_TLS_LDM:
598 case Mips::fixup_MICROMIPS_TLS_TPREL_HI16:
599 case Mips::fixup_MICROMIPS_TLS_TPREL_LO16:
Vladimir Stefanovic64ad1cf2018-11-21 16:38:34 +0000600 case Mips::fixup_MICROMIPS_JALR:
Simon Atanasyan3a44bcf2018-06-01 16:37:42 +0000601 return true;
602 }
603}
604
Hervé Poussineaud8a5fae2024-12-20 10:31:38 +0100605namespace {
606
607class WindowsMipsAsmBackend : public MipsAsmBackend {
608public:
609 WindowsMipsAsmBackend(const Target &T, const MCRegisterInfo &MRI,
610 const MCSubtargetInfo &STI)
611 : MipsAsmBackend(T, MRI, STI.getTargetTriple(), STI.getCPU(), false) {}
612
613 std::unique_ptr<MCObjectTargetWriter>
614 createObjectTargetWriter() const override {
615 return createMipsWinCOFFObjectWriter();
616 }
617};
618
619} // end anonymous namespace
620
Simon Atanasyan117665582017-09-21 10:44:26 +0000621MCAsmBackend *llvm::createMipsAsmBackend(const Target &T,
Alex Bradburyb22f7512018-01-03 08:53:05 +0000622 const MCSubtargetInfo &STI,
Simon Atanasyan117665582017-09-21 10:44:26 +0000623 const MCRegisterInfo &MRI,
Simon Atanasyan117665582017-09-21 10:44:26 +0000624 const MCTargetOptions &Options) {
Hervé Poussineaud8a5fae2024-12-20 10:31:38 +0100625 const Triple &TheTriple = STI.getTargetTriple();
626 if (TheTriple.isOSWindows() && TheTriple.isOSBinFormatCOFF())
627 return new WindowsMipsAsmBackend(T, MRI, STI);
628
Simon Atanasyan0bd82a92019-11-02 16:33:10 +0300629 MipsABIInfo ABI = MipsABIInfo::computeTargetABI(STI.getTargetTriple(),
630 STI.getCPU(), Options);
631 return new MipsAsmBackend(T, MRI, STI.getTargetTriple(), STI.getCPU(),
632 ABI.IsN32());
Simon Atanasyan117665582017-09-21 10:44:26 +0000633}