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llvm / llvm-project / f54f4cf262bd286c6f14f4faae035a4df9db32e8 / . / llvm / test / MC / RISCV / xqcisync-valid.s
blob: 84ea74b74564f88d7f63bb46b112825d3657c3db [file] [log] [blame]
Sudharsan Veeravallie7107972025-03-22 11:07:48 +0530[diff] [blame]1# Xqcisync - Qualcomm uC Sync Delay Extension
Fangrui Songa1f1bbf2025-04-08 19:42:43 -0700[diff] [blame]2# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-xqcisync -M no-aliases -show-encoding \
Sudharsan Veeravallif54f4cf2025-05-06 13:05:56 +0530[diff] [blame^]3# RUN: | FileCheck -check-prefixes=CHECK-ENC,CHECK-INST,CHECK-NOALIAS %s
Sudharsan Veeravallie7107972025-03-22 11:07:48 +0530[diff] [blame]4# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+experimental-xqcisync < %s \
5# RUN: | llvm-objdump --mattr=+experimental-xqcisync -M no-aliases --no-print-imm-hex -d - \
6# RUN: | FileCheck -check-prefix=CHECK-INST %s
7# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-xqcisync -show-encoding \
Sudharsan Veeravallif54f4cf2025-05-06 13:05:56 +0530[diff] [blame^]8# RUN: | FileCheck -check-prefixes=CHECK-ENC,CHECK-INST,CHECK-ALIAS %s
Sudharsan Veeravallie7107972025-03-22 11:07:48 +0530[diff] [blame]9# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+experimental-xqcisync < %s \
10# RUN: | llvm-objdump --mattr=+experimental-xqcisync --no-print-imm-hex -d - \
11# RUN: | FileCheck -check-prefix=CHECK-INST %s
12
13# CHECK-INST: qc.c.delay 10
14# CHECK-ENC: encoding: [0x2a,0x00]
15qc.c.delay 10
16
Sudharsan Veeravallif54f4cf2025-05-06 13:05:56 +0530[diff] [blame^]17# CHECK-INST: qc.sync 9
18# CHECK-ENC: encoding: [0x13,0x30,0x90,0x10]
19qc.sync 9
Sudharsan Veeravallie7107972025-03-22 11:07:48 +0530[diff] [blame]20
21# CHECK-INST: qc.syncr 23
22# CHECK-ENC: encoding: [0x13,0x30,0x70,0x21]
23qc.syncr 23
24
Sudharsan Veeravallif54f4cf2025-05-06 13:05:56 +0530[diff] [blame^]25# CHECK-INST: qc.syncwf 30
26# CHECK-ENC: encoding: [0x13,0x30,0xe0,0x41]
27qc.syncwf 30
Sudharsan Veeravallie7107972025-03-22 11:07:48 +0530[diff] [blame]28
Sudharsan Veeravallif54f4cf2025-05-06 13:05:56 +0530[diff] [blame^]29# CHECK-INST: qc.syncwl 6
30# CHECK-ENC: encoding: [0x13,0x30,0x60,0x80]
31qc.syncwl 6
Sudharsan Veeravallie7107972025-03-22 11:07:48 +0530[diff] [blame]32
Sudharsan Veeravallif54f4cf2025-05-06 13:05:56 +0530[diff] [blame^]33# CHECK-NOALIAS: qc.c.sync 0
34# CHECK-ALIAS: qc.sync 0
Sudharsan Veeravallie7107972025-03-22 11:07:48 +0530[diff] [blame]35# CHECK-ENC: encoding: [0x01,0x80]
36qc.c.sync 0
37
Sudharsan Veeravallif54f4cf2025-05-06 13:05:56 +0530[diff] [blame^]38# CHECK-NOALIAS: qc.c.syncr 15
39# CHECK-ALIAS: qc.syncr 15
Sudharsan Veeravallie7107972025-03-22 11:07:48 +0530[diff] [blame]40# CHECK-ENC: encoding: [0x01,0x87]
41qc.c.syncr 15
42
Sudharsan Veeravallif54f4cf2025-05-06 13:05:56 +0530[diff] [blame^]43# CHECK-NOALIAS: qc.c.syncwf 31
44# CHECK-ALIAS: qc.syncwf 31
Sudharsan Veeravallie7107972025-03-22 11:07:48 +0530[diff] [blame]45# CHECK-ENC: encoding: [0x81,0x93]
46qc.c.syncwf 31
47
Sudharsan Veeravallif54f4cf2025-05-06 13:05:56 +0530[diff] [blame^]48# CHECK-NOALIAS: qc.c.syncwl 4
49# CHECK-ALIAS: qc.syncwl 4
Sudharsan Veeravallie7107972025-03-22 11:07:48 +0530[diff] [blame]50# CHECK-ENC: encoding: [0x81,0x95]
51qc.c.syncwl 4
Sudharsan Veeravallif54f4cf2025-05-06 13:05:56 +0530[diff] [blame^]52
53# Check that compressed patterns work
54
55# CHECK-NOALIAS: qc.c.sync 8
56# CHECK-ALIAS: qc.sync 8
57# CHECK-ENC: encoding: [0x01,0x82]
58qc.sync 8
59
60# CHECK-NOALIAS: qc.c.syncr 31
61# CHECK-ALIAS: qc.syncr 31
62# CHECK-ENC: encoding: [0x81,0x87]
63qc.syncr 31
64
65# CHECK-NOALIAS: qc.c.syncwf 0
66# CHECK-ALIAS: qc.syncwf 0
67# CHECK-ENC: encoding: [0x01,0x90]
68qc.syncwf 0
69
70# CHECK-NOALIAS: qc.c.syncwl 16
71# CHECK-ALIAS: qc.syncwl 16
72# CHECK-ENC: encoding: [0x81,0x96]
73qc.syncwl 16