blob: a727e51bdd45f4ffcc326efd79b7af3f2cf81771 [file] [log] [blame]
Fangrui Song012dd422020-10-12 09:35:22 -07001// RUN: %clang -target x86_64 -march=x86-64 -E -dM %s > %tv1
2// RUN: FileCheck %s --check-prefix=X86_64_V1 < %tv1
3
4// X86_64_V1: #define __MMX__ 1
5// X86_64_V1: #define __SSE2_MATH__ 1
6// X86_64_V1: #define __SSE2__ 1
7// X86_64_V1: #define __SSE_MATH__ 1
8// X86_64_V1: #define __SSE__ 1
9// X86_64_V1: #define __amd64 1
10// X86_64_V1: #define __amd64__ 1
11// X86_64_V1: #define __k8 1
12// X86_64_V1: #define __k8__ 1
13// X86_64_V1: #define __x86_64 1
14// X86_64_V1: #define __x86_64__ 1
15
16// RUN: %clang -target x86_64 -march=x86-64-v2 -E -dM %s > %tv2
17// RUN: diff %tv1 %tv2 > %t.txt || true
18// RUN: FileCheck %s --check-prefix=X86_64_V2 < %t.txt
19
20/// v2 is close to Nehalem.
21// X86_64_V2: #define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_16 1
22// X86_64_V2: #define __LAHF_SAHF__ 1
23// X86_64_V2: #define __POPCNT__ 1
24// X86_64_V2: #define __SSE3__ 1
25// X86_64_V2-NEXT: #define __SSE4_1__ 1
26// X86_64_V2-NEXT: #define __SSE4_2__ 1
27// X86_64_V2: #define __SSSE3__ 1
28
29/// v3 is close to Haswell.
30// RUN: %clang -target x86_64 -march=x86-64-v3 -E -dM %s > %tv3
31// RUN: diff %tv2 %tv3 > %t.txt || true
32// RUN: FileCheck %s --check-prefix=X86_64_V3 < %t.txt
33
34// X86_64_V3: #define __AVX2__ 1
35// X86_64_V3-NEXT: #define __AVX__ 1
36// X86_64_V3: #define __BMI2__ 1
37// X86_64_V3-NEXT: #define __BMI__ 1
38// X86_64_V3: #define __F16C__ 1
39// X86_64_V3: #define __FMA__ 1
40// X86_64_V3: #define __LZCNT__ 1
41// X86_64_V3: #define __MOVBE__ 1
42// X86_64_V3: #define __XSAVE__ 1
43
44/// v4 is close to the AVX-512 level implemented by Xeon Scalable Processors.
45// RUN: %clang -target x86_64 -march=x86-64-v4 -E -dM %s > %tv4
46// RUN: diff %tv3 %tv4 > %t.txt || true
47// RUN: FileCheck %s --check-prefix=X86_64_V4 < %t.txt
48
49// X86_64_V4: #define __AVX512BW__ 1
50// X86_64_V4-NEXT: #define __AVX512CD__ 1
51// X86_64_V4-NEXT: #define __AVX512DQ__ 1
52// X86_64_V4-NEXT: #define __AVX512F__ 1
53// X86_64_V4-NEXT: #define __AVX512VL__ 1
54// X86_64_V4-NOT: #define __AVX512{{.*}}
XinWang10057ec762023-10-10 09:32:32 +080055// X86_64_V4: #define __EVEX512__ 1