Matt Arsenault | a66fca4 | 2020-09-28 13:42:17 -0400 | [diff] [blame] | 1 | # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py |
Jeremy Morse | fc9dae4 | 2021-11-29 22:25:42 +0000 | [diff] [blame] | 2 | # RUN: llc -O0 -mtriple=x86_64-unknown-linux-gnu -start-before=regallocfast -stop-after=livedebugvalues -verify-machineinstrs -o - %s -experimental-debug-variable-locations=true | FileCheck %s |
Matt Arsenault | a66fca4 | 2020-09-28 13:42:17 -0400 | [diff] [blame] | 3 | # DBG_VALUEs for %0 should be present in the use blocks |
| 4 | |
| 5 | --- | |
| 6 | define dso_local i32 @foo(i32 %a) #0 !dbg !6 { |
| 7 | entry: |
| 8 | %a.addr = alloca i32, align 4 |
Nikita Popov | 60442f0 | 2023-01-05 13:13:06 +0100 | [diff] [blame] | 9 | %saved_stack = alloca ptr, align 8 |
Matt Arsenault | a66fca4 | 2020-09-28 13:42:17 -0400 | [diff] [blame] | 10 | %__vla_expr0 = alloca i64, align 8 |
| 11 | %i = alloca i32, align 4 |
Nikita Popov | 60442f0 | 2023-01-05 13:13:06 +0100 | [diff] [blame] | 12 | store i32 %a, ptr %a.addr, align 4 |
| 13 | call void @llvm.dbg.declare(metadata ptr %a.addr, metadata !11, metadata !DIExpression()), !dbg !12 |
| 14 | %0 = load i32, ptr %a.addr, align 4, !dbg !13 |
Matt Arsenault | a66fca4 | 2020-09-28 13:42:17 -0400 | [diff] [blame] | 15 | %1 = zext i32 %0 to i64, !dbg !14 |
Nikita Popov | 60442f0 | 2023-01-05 13:13:06 +0100 | [diff] [blame] | 16 | %2 = call ptr @llvm.stacksave(), !dbg !14 |
| 17 | store ptr %2, ptr %saved_stack, align 8, !dbg !14 |
Matt Arsenault | a66fca4 | 2020-09-28 13:42:17 -0400 | [diff] [blame] | 18 | %vla = alloca i32, i64 %1, align 16, !dbg !14 |
Nikita Popov | 60442f0 | 2023-01-05 13:13:06 +0100 | [diff] [blame] | 19 | store i64 %1, ptr %__vla_expr0, align 8, !dbg !14 |
| 20 | call void @llvm.dbg.declare(metadata ptr %__vla_expr0, metadata !15, metadata !DIExpression()), !dbg !17 |
| 21 | call void @llvm.dbg.declare(metadata ptr %vla, metadata !18, metadata !DIExpression()), !dbg !22 |
| 22 | call void @llvm.dbg.declare(metadata ptr %i, metadata !23, metadata !DIExpression()), !dbg !25 |
| 23 | store i32 0, ptr %i, align 4, !dbg !25 |
Matt Arsenault | a66fca4 | 2020-09-28 13:42:17 -0400 | [diff] [blame] | 24 | br label %for.cond, !dbg !26 |
| 25 | |
| 26 | for.cond: ; preds = %for.inc, %entry |
Nikita Popov | 60442f0 | 2023-01-05 13:13:06 +0100 | [diff] [blame] | 27 | %3 = load i32, ptr %i, align 4, !dbg !27 |
| 28 | %4 = load i32, ptr %a.addr, align 4, !dbg !29 |
Matt Arsenault | a66fca4 | 2020-09-28 13:42:17 -0400 | [diff] [blame] | 29 | %cmp = icmp slt i32 %3, %4, !dbg !30 |
| 30 | br i1 %cmp, label %for.body, label %for.end, !dbg !31 |
| 31 | |
| 32 | for.body: ; preds = %for.cond |
Nikita Popov | 60442f0 | 2023-01-05 13:13:06 +0100 | [diff] [blame] | 33 | %5 = load i32, ptr %a.addr, align 4, !dbg !32 |
| 34 | %6 = load i32, ptr %i, align 4, !dbg !33 |
Matt Arsenault | a66fca4 | 2020-09-28 13:42:17 -0400 | [diff] [blame] | 35 | %sub = sub nsw i32 %5, %6, !dbg !34 |
Nikita Popov | 60442f0 | 2023-01-05 13:13:06 +0100 | [diff] [blame] | 36 | %7 = load i32, ptr %i, align 4, !dbg !35 |
Matt Arsenault | a66fca4 | 2020-09-28 13:42:17 -0400 | [diff] [blame] | 37 | %idxprom = sext i32 %7 to i64, !dbg !36 |
Nikita Popov | 60442f0 | 2023-01-05 13:13:06 +0100 | [diff] [blame] | 38 | %arrayidx = getelementptr inbounds i32, ptr %vla, i64 %idxprom, !dbg !36 |
| 39 | store i32 %sub, ptr %arrayidx, align 4, !dbg !37 |
Matt Arsenault | a66fca4 | 2020-09-28 13:42:17 -0400 | [diff] [blame] | 40 | br label %for.inc, !dbg !36 |
| 41 | |
| 42 | for.inc: ; preds = %for.body |
Nikita Popov | 60442f0 | 2023-01-05 13:13:06 +0100 | [diff] [blame] | 43 | %8 = load i32, ptr %i, align 4, !dbg !38 |
Matt Arsenault | a66fca4 | 2020-09-28 13:42:17 -0400 | [diff] [blame] | 44 | %inc = add nsw i32 %8, 1, !dbg !38 |
Nikita Popov | 60442f0 | 2023-01-05 13:13:06 +0100 | [diff] [blame] | 45 | store i32 %inc, ptr %i, align 4, !dbg !38 |
Matt Arsenault | a66fca4 | 2020-09-28 13:42:17 -0400 | [diff] [blame] | 46 | br label %for.cond, !dbg !39, !llvm.loop !40 |
| 47 | |
| 48 | for.end: ; preds = %for.cond |
Nikita Popov | 60442f0 | 2023-01-05 13:13:06 +0100 | [diff] [blame] | 49 | %9 = load i32, ptr %a.addr, align 4, !dbg !42 |
Matt Arsenault | a66fca4 | 2020-09-28 13:42:17 -0400 | [diff] [blame] | 50 | %sub1 = sub nsw i32 %9, 1, !dbg !43 |
| 51 | %idxprom2 = sext i32 %sub1 to i64, !dbg !44 |
Nikita Popov | 60442f0 | 2023-01-05 13:13:06 +0100 | [diff] [blame] | 52 | %arrayidx3 = getelementptr inbounds i32, ptr %vla, i64 %idxprom2, !dbg !44 |
| 53 | %10 = load i32, ptr %arrayidx3, align 4, !dbg !44 |
| 54 | %11 = load ptr, ptr %saved_stack, align 8, !dbg !45 |
| 55 | call void @llvm.stackrestore(ptr %11), !dbg !45 |
Matt Arsenault | a66fca4 | 2020-09-28 13:42:17 -0400 | [diff] [blame] | 56 | ret i32 %10, !dbg !45 |
| 57 | } |
| 58 | |
| 59 | declare void @llvm.dbg.declare(metadata, metadata, metadata) #1 |
Nikita Popov | 60442f0 | 2023-01-05 13:13:06 +0100 | [diff] [blame] | 60 | declare ptr @llvm.stacksave() #2 |
| 61 | declare void @llvm.stackrestore(ptr) #2 |
Matt Arsenault | a66fca4 | 2020-09-28 13:42:17 -0400 | [diff] [blame] | 62 | |
| 63 | attributes #0 = { noinline nounwind optnone uwtable } |
| 64 | attributes #1 = { nounwind readnone speculatable willreturn } |
| 65 | attributes #2 = { nounwind } |
| 66 | |
| 67 | !llvm.dbg.cu = !{!0} |
| 68 | !llvm.module.flags = !{!3, !4, !5} |
| 69 | |
| 70 | !0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 12.0.0 (git@github.com:llvm/llvm-project.git 954995d0a45729c7935b82258c166524ee87ad3f)", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, splitDebugInlining: false, nameTableKind: None) |
| 71 | !1 = !DIFile(filename: "/home/matt/src/llvm-project/lldb/test/API/lang/c/vla/main.c", directory: "/home/matt/src/llvm-project/build_debug_lldbg") |
| 72 | !2 = !{} |
| 73 | !3 = !{i32 7, !"Dwarf Version", i32 4} |
| 74 | !4 = !{i32 2, !"Debug Info Version", i32 3} |
| 75 | !5 = !{i32 1, !"wchar_size", i32 4} |
| 76 | !6 = distinct !DISubprogram(name: "foo", scope: !7, file: !7, line: 3, type: !8, scopeLine: 3, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition, unit: !0, retainedNodes: !2) |
| 77 | !7 = !DIFile(filename: "lldb/test/API/lang/c/vla/main.c", directory: "/home/matt/src/llvm-project") |
| 78 | !8 = !DISubroutineType(types: !9) |
| 79 | !9 = !{!10, !10} |
| 80 | !10 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed) |
| 81 | !11 = !DILocalVariable(name: "a", arg: 1, scope: !6, file: !7, line: 3, type: !10) |
| 82 | !12 = !DILocation(line: 3, column: 13, scope: !6) |
| 83 | !13 = !DILocation(line: 4, column: 11, scope: !6) |
| 84 | !14 = !DILocation(line: 4, column: 3, scope: !6) |
| 85 | !15 = !DILocalVariable(name: "__vla_expr0", scope: !6, type: !16, flags: DIFlagArtificial) |
| 86 | !16 = !DIBasicType(name: "long unsigned int", size: 64, encoding: DW_ATE_unsigned) |
| 87 | !17 = !DILocation(line: 0, scope: !6) |
| 88 | !18 = !DILocalVariable(name: "vla", scope: !6, file: !7, line: 4, type: !19) |
| 89 | !19 = !DICompositeType(tag: DW_TAG_array_type, baseType: !10, elements: !20) |
| 90 | !20 = !{!21} |
| 91 | !21 = !DISubrange(count: !15) |
| 92 | !22 = !DILocation(line: 4, column: 7, scope: !6) |
| 93 | !23 = !DILocalVariable(name: "i", scope: !24, file: !7, line: 6, type: !10) |
| 94 | !24 = distinct !DILexicalBlock(scope: !6, file: !7, line: 6, column: 3) |
| 95 | !25 = !DILocation(line: 6, column: 12, scope: !24) |
| 96 | !26 = !DILocation(line: 6, column: 8, scope: !24) |
| 97 | !27 = !DILocation(line: 6, column: 19, scope: !28) |
| 98 | !28 = distinct !DILexicalBlock(scope: !24, file: !7, line: 6, column: 3) |
| 99 | !29 = !DILocation(line: 6, column: 23, scope: !28) |
| 100 | !30 = !DILocation(line: 6, column: 21, scope: !28) |
| 101 | !31 = !DILocation(line: 6, column: 3, scope: !24) |
| 102 | !32 = !DILocation(line: 7, column: 14, scope: !28) |
| 103 | !33 = !DILocation(line: 7, column: 16, scope: !28) |
| 104 | !34 = !DILocation(line: 7, column: 15, scope: !28) |
| 105 | !35 = !DILocation(line: 7, column: 9, scope: !28) |
| 106 | !36 = !DILocation(line: 7, column: 5, scope: !28) |
| 107 | !37 = !DILocation(line: 7, column: 12, scope: !28) |
| 108 | !38 = !DILocation(line: 6, column: 26, scope: !28) |
| 109 | !39 = !DILocation(line: 6, column: 3, scope: !28) |
| 110 | !40 = distinct !{!40, !31, !41} |
| 111 | !41 = !DILocation(line: 7, column: 16, scope: !24) |
| 112 | !42 = !DILocation(line: 10, column: 14, scope: !6) |
| 113 | !43 = !DILocation(line: 10, column: 15, scope: !6) |
| 114 | !44 = !DILocation(line: 10, column: 10, scope: !6) |
| 115 | !45 = !DILocation(line: 11, column: 1, scope: !6) |
| 116 | |
| 117 | ... |
| 118 | --- |
| 119 | name: foo |
| 120 | tracksRegLiveness: true |
| 121 | frameInfo: |
Jonas Paulsson | 09bc6ab | 2024-03-18 10:37:59 -0400 | [diff] [blame] | 122 | adjustsStack: true |
Matt Arsenault | a66fca4 | 2020-09-28 13:42:17 -0400 | [diff] [blame] | 123 | hasCalls: true |
| 124 | stack: |
| 125 | - { id: 0, name: a.addr, size: 4, alignment: 4, debug-info-variable: '!11', |
| 126 | debug-info-expression: '!DIExpression()', debug-info-location: '!12' } |
| 127 | - { id: 1, name: __vla_expr0, size: 8, alignment: 8, debug-info-variable: '!15', |
| 128 | debug-info-expression: '!DIExpression()', debug-info-location: '!17' } |
| 129 | - { id: 2, name: i, size: 4, alignment: 4, debug-info-variable: '!23', |
| 130 | debug-info-expression: '!DIExpression()', debug-info-location: '!25' } |
| 131 | - { id: 3, name: vla, type: variable-sized, alignment: 1 } |
| 132 | body: | |
| 133 | ; CHECK-LABEL: name: foo |
| 134 | ; CHECK: bb.0.entry: |
| 135 | ; CHECK: successors: %bb.1(0x80000000) |
| 136 | ; CHECK: liveins: $edi, $rbx |
| 137 | ; CHECK: frame-setup PUSH64r killed $rbp, implicit-def $rsp, implicit $rsp |
| 138 | ; CHECK: CFI_INSTRUCTION def_cfa_offset 16 |
| 139 | ; CHECK: CFI_INSTRUCTION offset $rbp, -16 |
| 140 | ; CHECK: $rbp = frame-setup MOV64rr $rsp |
| 141 | ; CHECK: CFI_INSTRUCTION def_cfa_register $rbp |
| 142 | ; CHECK: frame-setup PUSH64r killed $rbx, implicit-def $rsp, implicit $rsp, debug-location !13 |
Shengchen Kan | c81a121 | 2023-05-19 22:21:56 +0800 | [diff] [blame] | 143 | ; CHECK: $rsp = frame-setup SUB64ri32 $rsp, 40, implicit-def dead $eflags |
Matt Arsenault | a66fca4 | 2020-09-28 13:42:17 -0400 | [diff] [blame] | 144 | ; CHECK: CFI_INSTRUCTION offset $rbx, -24 |
Matt Arsenault | fae0569 | 2021-05-19 22:25:51 -0400 | [diff] [blame] | 145 | ; CHECK: renamable $eax = MOV32rm $rbp, 1, $noreg, -12, $noreg, debug-location !13 :: (dereferenceable load (s32) from %ir.a.addr) |
Matt Arsenault | a66fca4 | 2020-09-28 13:42:17 -0400 | [diff] [blame] | 146 | ; CHECK: renamable $rax = KILL killed renamable $eax, debug-location !13 |
| 147 | ; CHECK: $rcx = MOV64rr $rsp, debug-location !14 |
Matt Arsenault | fae0569 | 2021-05-19 22:25:51 -0400 | [diff] [blame] | 148 | ; CHECK: MOV64mr $rbp, 1, $noreg, -40, $noreg, $rcx :: (store (s64) into %stack.4) |
Matt Arsenault | a66fca4 | 2020-09-28 13:42:17 -0400 | [diff] [blame] | 149 | ; CHECK: DBG_VALUE $rbp, 0, !18, !DIExpression(DW_OP_constu, 40, DW_OP_minus, DW_OP_deref), debug-location !22 |
| 150 | ; CHECK: $rsp = MOV64rr $rcx, debug-location !14 |
Matt Arsenault | fae0569 | 2021-05-19 22:25:51 -0400 | [diff] [blame] | 151 | ; CHECK: MOV64mr $rbp, 1, $noreg, -24, $noreg, killed renamable $rax, debug-location !14 :: (store (s64) into %ir.__vla_expr0) |
Matt Arsenault | a66fca4 | 2020-09-28 13:42:17 -0400 | [diff] [blame] | 152 | ; CHECK: DBG_VALUE renamable $rcx, 0, !18, !DIExpression(), debug-location !22 |
Matt Arsenault | fae0569 | 2021-05-19 22:25:51 -0400 | [diff] [blame] | 153 | ; CHECK: MOV32mi $rbp, 1, $noreg, -28, $noreg, 0, debug-location !25 :: (store (s32) into %ir.i) |
Matt Arsenault | a66fca4 | 2020-09-28 13:42:17 -0400 | [diff] [blame] | 154 | ; CHECK: DBG_VALUE $rbp, 0, !18, !DIExpression(DW_OP_constu, 40, DW_OP_minus, DW_OP_deref), debug-location !22 |
| 155 | ; CHECK: bb.1.for.cond: |
| 156 | ; CHECK: successors: %bb.4(0x40000000), %bb.2(0x40000000) |
| 157 | ; CHECK: DBG_VALUE $rbp, 0, !18, !DIExpression(DW_OP_constu, 40, DW_OP_minus, DW_OP_deref), debug-location !22 |
Matt Arsenault | fae0569 | 2021-05-19 22:25:51 -0400 | [diff] [blame] | 158 | ; CHECK: renamable $eax = MOV32rm $rbp, 1, $noreg, -28, $noreg, debug-location !27 :: (load (s32) from %ir.i) |
| 159 | ; CHECK: CMP32rm killed renamable $eax, $rbp, 1, $noreg, -12, $noreg, implicit-def $eflags, debug-location !30 :: (load (s32) from %ir.a.addr) |
Matt Arsenault | a66fca4 | 2020-09-28 13:42:17 -0400 | [diff] [blame] | 160 | ; CHECK: JCC_1 %bb.4, 13, implicit killed $eflags, debug-location !31 |
| 161 | ; CHECK: bb.2.for.body: |
| 162 | ; CHECK: successors: %bb.3(0x80000000) |
| 163 | ; CHECK: DBG_VALUE $rbp, 0, !18, !DIExpression(DW_OP_constu, 40, DW_OP_minus, DW_OP_deref), debug-location !22 |
Matt Arsenault | fae0569 | 2021-05-19 22:25:51 -0400 | [diff] [blame] | 164 | ; CHECK: $rax = MOV64rm $rbp, 1, $noreg, -40, $noreg :: (load (s64) from %stack.4) |
| 165 | ; CHECK: renamable $edx = MOV32rm $rbp, 1, $noreg, -12, $noreg, debug-location !32 :: (load (s32) from %ir.a.addr) |
| 166 | ; CHECK: renamable $rcx = MOVSX64rm32 $rbp, 1, $noreg, -28, $noreg, debug-location !36 :: (load (s32) from %ir.i) |
| 167 | ; CHECK: MOV32mr renamable $rax, 4, killed renamable $rcx, 0, $noreg, killed renamable $edx, debug-location !37 :: (store (s32) into %ir.arrayidx) |
Matt Arsenault | a66fca4 | 2020-09-28 13:42:17 -0400 | [diff] [blame] | 168 | ; CHECK: bb.3.for.inc: |
| 169 | ; CHECK: successors: %bb.1(0x80000000) |
| 170 | ; CHECK: DBG_VALUE $rbp, 0, !18, !DIExpression(DW_OP_constu, 40, DW_OP_minus, DW_OP_deref), debug-location !22 |
| 171 | ; CHECK: JMP_1 %bb.1, debug-location !39 |
| 172 | ; CHECK: bb.4.for.end: |
| 173 | ; CHECK: DBG_VALUE $rbp, 0, !18, !DIExpression(DW_OP_constu, 40, DW_OP_minus, DW_OP_deref), debug-location !22 |
| 174 | ; CHECK: $rax = IMPLICIT_DEF |
Matt Arsenault | fae0569 | 2021-05-19 22:25:51 -0400 | [diff] [blame] | 175 | ; CHECK: $rax = MOV64rm $rbp, 1, $noreg, -40, $noreg :: (load (s64) from %stack.4) |
Matt Arsenault | a66fca4 | 2020-09-28 13:42:17 -0400 | [diff] [blame] | 176 | ; CHECK: dead $rbx = IMPLICIT_DEF |
| 177 | ; CHECK: dead $rcx = IMPLICIT_DEF |
| 178 | ; CHECK: dead $rdx = IMPLICIT_DEF |
| 179 | ; CHECK: renamable $rcx = IMPLICIT_DEF |
Matt Arsenault | fae0569 | 2021-05-19 22:25:51 -0400 | [diff] [blame] | 180 | ; CHECK: renamable $eax = MOV32rm killed renamable $rax, 4, killed renamable $rcx, 0, $noreg, debug-location !44 :: (load (s32) from %ir.arrayidx3) |
Matt Arsenault | a66fca4 | 2020-09-28 13:42:17 -0400 | [diff] [blame] | 181 | ; CHECK: $rsp = LEA64r $rbp, 1, $noreg, -8, $noreg, debug-location !45 |
| 182 | ; CHECK: $rbx = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !45 |
| 183 | ; CHECK: $rbp = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !45 |
| 184 | ; CHECK: CFI_INSTRUCTION def_cfa $rsp, 8, debug-location !45 |
Simon Pilgrim | d391e4f | 2021-11-07 15:06:54 +0000 | [diff] [blame] | 185 | ; CHECK: RET64 implicit killed $eax, debug-location !45 |
Matt Arsenault | a66fca4 | 2020-09-28 13:42:17 -0400 | [diff] [blame] | 186 | bb.0.entry: |
| 187 | liveins: $edi |
| 188 | |
| 189 | %0:gr32 = COPY $edi |
Matt Arsenault | fae0569 | 2021-05-19 22:25:51 -0400 | [diff] [blame] | 190 | %1:gr32 = MOV32rm %stack.0.a.addr, 1, $noreg, 0, $noreg, debug-location !13 :: (dereferenceable load (s32) from %ir.a.addr) |
Matt Arsenault | a66fca4 | 2020-09-28 13:42:17 -0400 | [diff] [blame] | 191 | %2:gr64_nosp = SUBREG_TO_REG 0, killed %1, %subreg.sub_32bit, debug-location !13 |
| 192 | ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp, debug-location !14 |
| 193 | %3:gr64 = COPY $rsp, debug-location !14 |
| 194 | $rsp = COPY %3, debug-location !14 |
| 195 | ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp, debug-location !14 |
Matt Arsenault | fae0569 | 2021-05-19 22:25:51 -0400 | [diff] [blame] | 196 | MOV64mr %stack.1.__vla_expr0, 1, $noreg, 0, $noreg, %2, debug-location !14 :: (store (s64) into %ir.__vla_expr0) |
Matt Arsenault | a66fca4 | 2020-09-28 13:42:17 -0400 | [diff] [blame] | 197 | DBG_VALUE %3, 0, !18, !DIExpression(), debug-location !22 |
Matt Arsenault | fae0569 | 2021-05-19 22:25:51 -0400 | [diff] [blame] | 198 | MOV32mi %stack.2.i, 1, $noreg, 0, $noreg, 0, debug-location !25 :: (store (s32) into %ir.i) |
Matt Arsenault | a66fca4 | 2020-09-28 13:42:17 -0400 | [diff] [blame] | 199 | |
| 200 | bb.1.for.cond: |
Matt Arsenault | fae0569 | 2021-05-19 22:25:51 -0400 | [diff] [blame] | 201 | %4:gr32 = MOV32rm %stack.2.i, 1, $noreg, 0, $noreg, debug-location !27 :: (load (s32) from %ir.i) |
| 202 | CMP32rm %4, %stack.0.a.addr, 1, $noreg, 0, $noreg, implicit-def $eflags, debug-location !30 :: (load (s32) from %ir.a.addr) |
Matt Arsenault | a66fca4 | 2020-09-28 13:42:17 -0400 | [diff] [blame] | 203 | JCC_1 %bb.4, 13, implicit $eflags, debug-location !31 |
| 204 | |
| 205 | bb.2.for.body: |
Matt Arsenault | fae0569 | 2021-05-19 22:25:51 -0400 | [diff] [blame] | 206 | %5:gr32 = MOV32rm %stack.0.a.addr, 1, $noreg, 0, $noreg, debug-location !32 :: (load (s32) from %ir.a.addr) |
| 207 | %6:gr64_nosp = MOVSX64rm32 %stack.2.i, 1, $noreg, 0, $noreg, debug-location !36 :: (load (s32) from %ir.i) |
| 208 | MOV32mr %3, 4, %6, 0, $noreg, killed %5, debug-location !37 :: (store (s32) into %ir.arrayidx) |
Matt Arsenault | a66fca4 | 2020-09-28 13:42:17 -0400 | [diff] [blame] | 209 | |
| 210 | bb.3.for.inc: |
| 211 | JMP_1 %bb.1, debug-location !39 |
| 212 | |
| 213 | bb.4.for.end: |
| 214 | $rax = IMPLICIT_DEF |
| 215 | $rbx = IMPLICIT_DEF |
| 216 | $rcx = IMPLICIT_DEF |
| 217 | $rdx = IMPLICIT_DEF |
| 218 | %7:gr64_nosp = IMPLICIT_DEF |
Matt Arsenault | fae0569 | 2021-05-19 22:25:51 -0400 | [diff] [blame] | 219 | %8:gr32 = MOV32rm %3, 4, %7, 0, $noreg, debug-location !44 :: (load (s32) from %ir.arrayidx3) |
Matt Arsenault | a66fca4 | 2020-09-28 13:42:17 -0400 | [diff] [blame] | 220 | $eax = COPY %8, debug-location !45 |
Simon Pilgrim | d391e4f | 2021-11-07 15:06:54 +0000 | [diff] [blame] | 221 | RET64 implicit $eax, debug-location !45 |
Matt Arsenault | a66fca4 | 2020-09-28 13:42:17 -0400 | [diff] [blame] | 222 | |
| 223 | ... |