Jay Foad | 683b9ed | 2021-07-21 11:29:04 +0100 | [diff] [blame] | 1 | ; RUN: llc -global-isel -mtriple=amdgcn-amd-amdpal -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN %s |
| 2 | |
Jay Foad | 683b9ed | 2021-07-21 11:29:04 +0100 | [diff] [blame] | 3 | ; GCN-LABEL: {{^}}test1: |
Jay Foad | 683b9ed | 2021-07-21 11:29:04 +0100 | [diff] [blame] | 4 | ; GCN: buffer_store_dword |
Jay Foad | 59f6865 | 2021-07-21 15:53:59 +0100 | [diff] [blame] | 5 | ; GCN: buffer_load_dword |
Jay Foad | 683b9ed | 2021-07-21 11:29:04 +0100 | [diff] [blame] | 6 | ; GCN: buffer_store_dword |
| 7 | define amdgpu_cs void @test1(<4 x i32> inreg %buf, i32 %off) { |
| 8 | .entry: |
| 9 | call void @llvm.amdgcn.raw.buffer.store.i32(i32 0, <4 x i32> %buf, i32 8, i32 0, i32 0) |
| 10 | %val = call i32 @llvm.amdgcn.raw.buffer.load.i32(<4 x i32> %buf, i32 %off, i32 0, i32 0) |
| 11 | call void @llvm.amdgcn.raw.buffer.store.i32(i32 %val, <4 x i32> %buf, i32 0, i32 0, i32 0) |
| 12 | ret void |
| 13 | } |
| 14 | |
Krzysztof Drewniak | faa2c67 | 2023-04-04 17:11:04 +0000 | [diff] [blame] | 15 | ; GCN-LABEL: {{^}}test1_ptrs: |
| 16 | ; GCN: buffer_store_dword |
| 17 | ; GCN: buffer_load_dword |
| 18 | ; GCN: buffer_store_dword |
| 19 | define amdgpu_cs void @test1_ptrs(ptr addrspace(8) inreg %buf, i32 %off) { |
| 20 | .entry: |
| 21 | call void @llvm.amdgcn.raw.ptr.buffer.store.i32(i32 0, ptr addrspace(8) %buf, i32 8, i32 0, i32 0) |
| 22 | %val = call i32 @llvm.amdgcn.raw.ptr.buffer.load.i32(ptr addrspace(8) %buf, i32 %off, i32 0, i32 0) |
| 23 | call void @llvm.amdgcn.raw.ptr.buffer.store.i32(i32 %val, ptr addrspace(8) %buf, i32 0, i32 0, i32 0) |
| 24 | ret void |
| 25 | } |
| 26 | |
| 27 | ;; In the future, the stores should be reorderable because they'd be known to be |
| 28 | ;; at distinct offsets. |
| 29 | ; GCN-LABEL: {{^}}test1_ptrs_reorderable: |
| 30 | ; GCN: buffer_store_dword |
| 31 | ; GCN: buffer_load_dword |
| 32 | ; GCN: buffer_store_dword |
| 33 | define amdgpu_cs void @test1_ptrs_reorderable(ptr addrspace(8) inreg %buf, i32 %off) { |
| 34 | .entry: |
| 35 | %shifted.off = shl i32 %off, 4 |
| 36 | call void @llvm.amdgcn.raw.ptr.buffer.store.i32(i32 0, ptr addrspace(8) %buf, i32 8, i32 0, i32 0) |
| 37 | %val = call i32 @llvm.amdgcn.raw.ptr.buffer.load.i32(ptr addrspace(8) %buf, i32 %shifted.off, i32 0, i32 0) |
| 38 | call void @llvm.amdgcn.raw.ptr.buffer.store.i32(i32 %val, ptr addrspace(8) %buf, i32 0, i32 0, i32 0) |
| 39 | ret void |
| 40 | } |
| 41 | |
Jay Foad | 683b9ed | 2021-07-21 11:29:04 +0100 | [diff] [blame] | 42 | declare i32 @llvm.amdgcn.raw.buffer.load.i32(<4 x i32>, i32, i32, i32) #2 |
| 43 | |
| 44 | declare void @llvm.amdgcn.raw.buffer.store.i32(i32, <4 x i32>, i32, i32, i32) #3 |
| 45 | |
Krzysztof Drewniak | faa2c67 | 2023-04-04 17:11:04 +0000 | [diff] [blame] | 46 | declare i32 @llvm.amdgcn.raw.ptr.buffer.load.i32(ptr addrspace(8) nocapture, i32, i32, i32) #4 |
| 47 | |
| 48 | declare void @llvm.amdgcn.raw.ptr.buffer.store.i32(i32, ptr addrspace(8) nocapture, i32, i32, i32) #5 |
| 49 | |
Jay Foad | 683b9ed | 2021-07-21 11:29:04 +0100 | [diff] [blame] | 50 | attributes #2 = { nounwind readonly } |
| 51 | attributes #3 = { nounwind writeonly } |
Krzysztof Drewniak | faa2c67 | 2023-04-04 17:11:04 +0000 | [diff] [blame] | 52 | attributes #4 = { nounwind memory(argmem: read) } |
| 53 | attributes #5 = { nounwind memory(argmem: write) } |