| ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 |
| ; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lasx < %s | FileCheck %s |
| ; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s |
| |
| define void @bswap_v16i16(ptr %src, ptr %dst) nounwind { |
| ; CHECK-LABEL: bswap_v16i16: |
| ; CHECK: # %bb.0: |
| ; CHECK-NEXT: xvld $xr0, $a0, 0 |
| ; CHECK-NEXT: xvshuf4i.b $xr0, $xr0, 177 |
| ; CHECK-NEXT: xvst $xr0, $a1, 0 |
| ; CHECK-NEXT: ret |
| %v = load <16 x i16>, ptr %src |
| %res = call <16 x i16> @llvm.bswap.v16i16(<16 x i16> %v) |
| store <16 x i16> %res, ptr %dst |
| ret void |
| } |
| |
| define void @bswap_v8i32(ptr %src, ptr %dst) nounwind { |
| ; CHECK-LABEL: bswap_v8i32: |
| ; CHECK: # %bb.0: |
| ; CHECK-NEXT: xvld $xr0, $a0, 0 |
| ; CHECK-NEXT: xvshuf4i.b $xr0, $xr0, 27 |
| ; CHECK-NEXT: xvst $xr0, $a1, 0 |
| ; CHECK-NEXT: ret |
| %v = load <8 x i32>, ptr %src |
| %res = call <8 x i32> @llvm.bswap.v8i32(<8 x i32> %v) |
| store <8 x i32> %res, ptr %dst |
| ret void |
| } |
| |
| define void @bswap_v4i64(ptr %src, ptr %dst) nounwind { |
| ; CHECK-LABEL: bswap_v4i64: |
| ; CHECK: # %bb.0: |
| ; CHECK-NEXT: xvld $xr0, $a0, 0 |
| ; CHECK-NEXT: xvshuf4i.b $xr0, $xr0, 27 |
| ; CHECK-NEXT: xvshuf4i.w $xr0, $xr0, 177 |
| ; CHECK-NEXT: xvst $xr0, $a1, 0 |
| ; CHECK-NEXT: ret |
| %v = load <4 x i64>, ptr %src |
| %res = call <4 x i64> @llvm.bswap.v4i64(<4 x i64> %v) |
| store <4 x i64> %res, ptr %dst |
| ret void |
| } |
| |
| declare <16 x i16> @llvm.bswap.v16i16(<16 x i16>) |
| declare <8 x i32> @llvm.bswap.v8i32(<8 x i32>) |
| declare <4 x i64> @llvm.bswap.v4i64(<4 x i64>) |