llvm/test/Transforms/LoopInterchange/pr43326-ideal-access-pattern.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
; RUN: opt < %s -passes=loop-interchange -cache-line-size=64 -S | FileCheck %s

; Triply nested loop, should be able to do interchange three times
; to get the ideal access pattern.
; void f(int e[restrict 10][10][10], int f[restrict 10][10][10]) {
;   for (int a = 0; a < 10; a++) {
;     for (int b = 0; b < 10; b++) {
;       for (int c = 0; c < 10; c++) {
;         f[c][b][a] = e[c][b][a];
;       }
;     }
;   }
; }

define void @pr43326-triply-nested(ptr noalias %e, ptr noalias %f) {
; CHECK-LABEL: define void @pr43326-triply-nested(
; CHECK-SAME: ptr noalias [[E:%.*]], ptr noalias [[F:%.*]]) {
; CHECK-NEXT:  [[ENTRY:.*:]]
; CHECK-NEXT:    br label %[[FOR_INNERMOST_PREHEADER:.*]]
; CHECK:       [[FOR_MIDDLE_HEADER_PREHEADER:.*]]:
; CHECK-NEXT:    br label %[[FOR_OUTERMOST_HEADER:.*]]
; CHECK:       [[FOR_OUTERMOST_HEADER]]:
; CHECK-NEXT:    [[INDVARS_OUTERMOST:%.*]] = phi i64 [ [[INDVARS_OUTERMOST_NEXT:%.*]], %[[FOR_OUTERMOST_LATCH:.*]] ], [ 0, %[[FOR_MIDDLE_HEADER_PREHEADER]] ]
; CHECK-NEXT:    br label %[[FOR_INNERMOST_SPLIT1:.*]]
; CHECK:       [[FOR_MIDDLE_HEADER_PREHEADER1:.*]]:
; CHECK-NEXT:    br label %[[FOR_MIDDLE_HEADER:.*]]
; CHECK:       [[FOR_COND_CLEANUP:.*]]:
; CHECK-NEXT:    ret void
; CHECK:       [[FOR_MIDDLE_HEADER]]:
; CHECK-NEXT:    [[INDVARS_MIDDLE:%.*]] = phi i64 [ [[TMP0:%.*]], %[[FOR_MIDDLE_LATCH:.*]] ], [ 0, %[[FOR_MIDDLE_HEADER_PREHEADER1]] ]
; CHECK-NEXT:    br label %[[FOR_OUTERMOST_HEADER_PREHEADER:.*]]
; CHECK:       [[FOR_INNERMOST_PREHEADER]]:
; CHECK-NEXT:    br label %[[FOR_INNERMOST:.*]]
; CHECK:       [[FOR_OUTERMOST_LATCH]]:
; CHECK-NEXT:    [[INDVARS_OUTERMOST_NEXT]] = add nuw nsw i64 [[INDVARS_OUTERMOST]], 1
; CHECK-NEXT:    [[EXITCOND_OUTERMOST:%.*]] = icmp ne i64 [[INDVARS_OUTERMOST_NEXT]], 10
; CHECK-NEXT:    br i1 [[EXITCOND_OUTERMOST]], label %[[FOR_OUTERMOST_HEADER]], label %[[FOR_MIDDLE_LATCH_SPLIT:.*]]
; CHECK:       [[FOR_MIDDLE_LATCH]]:
; CHECK-NEXT:    [[TMP0]] = add nuw nsw i64 [[INDVARS_MIDDLE]], 1
; CHECK-NEXT:    [[TMP1:%.*]] = icmp ne i64 [[TMP0]], 10
; CHECK-NEXT:    br i1 [[TMP1]], label %[[FOR_MIDDLE_HEADER]], label %[[FOR_INNERMOST_SPLIT_SPLIT:.*]]
; CHECK:       [[FOR_INNERMOST]]:
; CHECK-NEXT:    [[INDVARS_INNERMOST:%.*]] = phi i64 [ [[TMP5:%.*]], %[[FOR_MIDDLE_LATCH_SPLIT]] ], [ 0, %[[FOR_INNERMOST_PREHEADER]] ]
; CHECK-NEXT:    br label %[[FOR_MIDDLE_HEADER_PREHEADER]]
; CHECK:       [[FOR_INNERMOST_SPLIT1]]:
; CHECK-NEXT:    br label %[[FOR_MIDDLE_HEADER_PREHEADER1]]
; CHECK:       [[FOR_OUTERMOST_HEADER_PREHEADER]]:
; CHECK-NEXT:    [[ARRAYIDX12:%.*]] = getelementptr inbounds [10 x [10 x i32]], ptr [[E]], i64 [[INDVARS_INNERMOST]], i64 [[INDVARS_MIDDLE]], i64 [[INDVARS_OUTERMOST]]
; CHECK-NEXT:    [[TMP2:%.*]] = load i32, ptr [[ARRAYIDX12]], align 4
; CHECK-NEXT:    [[ARRAYIDX18:%.*]] = getelementptr inbounds [10 x [10 x i32]], ptr [[F]], i64 [[INDVARS_INNERMOST]], i64 [[INDVARS_MIDDLE]], i64 [[INDVARS_OUTERMOST]]
; CHECK-NEXT:    store i32 [[TMP2]], ptr [[ARRAYIDX18]], align 4
; CHECK-NEXT:    [[INDVARS_INNERMOST_NEXT:%.*]] = add nuw nsw i64 [[INDVARS_INNERMOST]], 1
; CHECK-NEXT:    [[EXITCOND_INNERMOST:%.*]] = icmp ne i64 [[INDVARS_INNERMOST_NEXT]], 10
; CHECK-NEXT:    br label %[[FOR_MIDDLE_LATCH]]
; CHECK:       [[FOR_INNERMOST_SPLIT_SPLIT]]:
; CHECK-NEXT:    [[TMP3:%.*]] = add nuw nsw i64 [[INDVARS_INNERMOST]], 1
; CHECK-NEXT:    [[TMP4:%.*]] = icmp ne i64 [[TMP3]], 10
; CHECK-NEXT:    br label %[[FOR_OUTERMOST_LATCH]]
; CHECK:       [[FOR_MIDDLE_LATCH_SPLIT]]:
; CHECK-NEXT:    [[TMP5]] = add nuw nsw i64 [[INDVARS_INNERMOST]], 1
; CHECK-NEXT:    [[TMP6:%.*]] = icmp ne i64 [[TMP5]], 10
; CHECK-NEXT:    br i1 [[TMP6]], label %[[FOR_INNERMOST]], label %[[FOR_COND_CLEANUP]]
;
entry:
  br label %for.outermost.header

for.outermost.header:                              ; preds = %entry, %for.outermost.latch
  %indvars.outermost = phi i64 [ 0, %entry ], [ %indvars.outermost.next, %for.outermost.latch ]
  br label %for.middle.header

for.cond.cleanup:                                 ; preds = %for.outermost.latch
  ret void

for.middle.header:                              ; preds = %for.outermost.header, %for.middle.latch
  %indvars.middle = phi i64 [ 0, %for.outermost.header ], [ %indvars.middle.next, %for.middle.latch ]
  br label %for.innermost

for.outermost.latch:                                ; preds = %for.middle.latch
  %indvars.outermost.next = add nuw nsw i64 %indvars.outermost, 1
  %exitcond.outermost = icmp ne i64 %indvars.outermost.next, 10
  br i1 %exitcond.outermost, label %for.outermost.header, label %for.cond.cleanup

for.middle.latch:                                ; preds = %for.innermost
  %indvars.middle.next = add nuw nsw i64 %indvars.middle, 1
  %exitcond.middle = icmp ne i64 %indvars.middle.next, 10
  br i1 %exitcond.middle, label %for.middle.header, label %for.outermost.latch

for.innermost:                                        ; preds = %for.middle.header, %for.innermost
  %indvars.innermost = phi i64 [ 0, %for.middle.header ], [ %indvars.innermost.next, %for.innermost ]
  %arrayidx12 = getelementptr inbounds [10 x [10 x i32]], ptr %e, i64 %indvars.innermost, i64 %indvars.middle, i64 %indvars.outermost
  %0 = load i32, ptr %arrayidx12
  %arrayidx18 = getelementptr inbounds [10 x [10 x i32]], ptr %f, i64 %indvars.innermost, i64 %indvars.middle, i64 %indvars.outermost
  store i32 %0, ptr %arrayidx18
  %indvars.innermost.next = add nuw nsw i64 %indvars.innermost, 1
  %exitcond.innermost = icmp ne i64 %indvars.innermost.next, 10
  br i1 %exitcond.innermost, label %for.innermost, label %for.middle.latch
}