llvm/test/Transforms/JumpThreading/loop-phi.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
; RUN: opt < %s -passes=jump-threading -S -jump-threading-across-loop-headers | FileCheck %s

; Make sure we correctly distinguish between %tmp15 and %tmp16 when we clone
; body2.

define i32 @test(i1 %ARG1, i1 %ARG2, i32 %n) {
; CHECK-LABEL: define i32 @test(
; CHECK-SAME: i1 [[ARG1:%.*]], i1 [[ARG2:%.*]], i32 [[N:%.*]]) {
; CHECK-NEXT:  head1:
; CHECK-NEXT:    br i1 [[ARG1]], label [[EXIT:%.*]], label [[BODY2:%.*]]
; CHECK:       head1.thread:
; CHECK-NEXT:    br i1 [[ARG1]], label [[EXIT]], label [[BODY2_THREAD9:%.*]]
; CHECK:       body2.thread9:
; CHECK-NEXT:    [[TMP1612:%.*]] = add i32 [[TMP165:%.*]], 1
; CHECK-NEXT:    br label [[LATCH1:%.*]]
; CHECK:       body1:
; CHECK-NEXT:    [[TMP12:%.*]] = icmp sgt i32 [[TMP165]], 1
; CHECK-NEXT:    br i1 [[TMP12]], label [[BODY2_THREAD:%.*]], label [[HEAD1_THREAD:%.*]]
; CHECK:       body2.thread:
; CHECK-NEXT:    [[TMP163:%.*]] = add i32 [[TMP165]], 1
; CHECK-NEXT:    br label [[LATCH1]]
; CHECK:       body2:
; CHECK-NEXT:    [[TMP14:%.*]] = phi i32 [ 0, [[HEAD1:%.*]] ]
; CHECK-NEXT:    [[TMP15:%.*]] = phi i32 [ 0, [[HEAD1]] ]
; CHECK-NEXT:    [[TMP16:%.*]] = add i32 [[TMP14]], 1
; CHECK-NEXT:    br i1 [[ARG2]], label [[EXIT]], label [[LATCH1]]
; CHECK:       latch1:
; CHECK-NEXT:    [[TMP165]] = phi i32 [ [[TMP163]], [[BODY2_THREAD]] ], [ [[TMP16]], [[BODY2]] ], [ [[TMP1612]], [[BODY2_THREAD9]] ]
; CHECK-NEXT:    [[TMP154:%.*]] = phi i32 [ [[TMP165]], [[BODY2_THREAD]] ], [ [[TMP15]], [[BODY2]] ], [ [[TMP165]], [[BODY2_THREAD9]] ]
; CHECK-NEXT:    [[TMP18:%.*]] = icmp sgt i32 [[TMP165]], [[N]]
; CHECK-NEXT:    br i1 [[TMP18]], label [[EXIT]], label [[BODY1:%.*]]
; CHECK:       exit:
; CHECK-NEXT:    [[RC:%.*]] = phi i32 [ [[TMP15]], [[BODY2]] ], [ [[TMP154]], [[LATCH1]] ], [ -1, [[HEAD1]] ], [ -1, [[HEAD1_THREAD]] ]
; CHECK-NEXT:    ret i32 [[RC]]
;
entry:
  br label %head1

head1:                                            ; preds = %entry, %body1
  %tmp = phi i32 [ 0, %entry ], [ %tmp16, %body1 ]
  %tmp3 = phi i32 [ 0, %entry ], [ %tmp16, %body1 ]
  %tmp4 = phi i32 [ 0, %entry ], [ %tmp16, %body1 ]
  br i1 %ARG1, label %exit, label %body2

body1:                                            ; preds = %latch1
  %tmp12 = icmp sgt i32 %tmp16, 1
  br i1 %tmp12, label %body2, label %head1

body2:                                            ; preds = %head1, %body1
  %tmp14 = phi i32 [ %tmp16, %body1 ], [ %tmp, %head1 ]
  %tmp15 = phi i32 [ %tmp16, %body1 ], [ %tmp3, %head1 ]
  %tmp16 = add i32 %tmp14, 1
  br i1 %ARG2, label %exit, label %latch1

latch1:                                           ; preds = %body2
  %tmp18 = icmp sgt i32 %tmp16, %n
  br i1 %tmp18, label %exit, label %body1

exit:                                             ; preds = %latch1, %body2, %head1
  %rc = phi i32 [ %tmp15, %body2 ], [ %tmp15, %latch1 ], [ -1, %head1 ]
  ret i32 %rc
}