llvm/test/CodeGen/X86/vec_setcc-3.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64    | FileCheck %s --check-prefixes=SSE2
; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE42
; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX2
; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX512

; ensure that the comparison result type is adjusted when peeking through truncations
define <8 x i1> @PR226365(<8 x i32> %a0, <8 x i32> %a1) {
; SSE2-LABEL: PR226365:
; SSE2:       # %bb.0:
; SSE2-NEXT:    pslld $16, %xmm1
; SSE2-NEXT:    psrad $16, %xmm1
; SSE2-NEXT:    pslld $16, %xmm0
; SSE2-NEXT:    psrad $16, %xmm0
; SSE2-NEXT:    packssdw %xmm1, %xmm0
; SSE2-NEXT:    pslld $16, %xmm3
; SSE2-NEXT:    psrad $16, %xmm3
; SSE2-NEXT:    pslld $16, %xmm2
; SSE2-NEXT:    psrad $16, %xmm2
; SSE2-NEXT:    packssdw %xmm3, %xmm2
; SSE2-NEXT:    psubusw %xmm2, %xmm0
; SSE2-NEXT:    pxor %xmm1, %xmm1
; SSE2-NEXT:    pcmpeqw %xmm1, %xmm0
; SSE2-NEXT:    retq
;
; SSE42-LABEL: PR226365:
; SSE42:       # %bb.0:
; SSE42-NEXT:    packusdw %xmm1, %xmm0
; SSE42-NEXT:    packusdw %xmm3, %xmm2
; SSE42-NEXT:    pminuw %xmm0, %xmm2
; SSE42-NEXT:    pcmpeqw %xmm2, %xmm0
; SSE42-NEXT:    retq
;
; AVX2-LABEL: PR226365:
; AVX2:       # %bb.0:
; AVX2-NEXT:    vpminud %ymm1, %ymm0, %ymm1
; AVX2-NEXT:    vpcmpeqd %ymm1, %ymm0, %ymm0
; AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm1
; AVX2-NEXT:    vpackssdw %xmm1, %xmm0, %xmm0
; AVX2-NEXT:    vzeroupper
; AVX2-NEXT:    retq
;
; AVX512-LABEL: PR226365:
; AVX512:       # %bb.0:
; AVX512-NEXT:    vpcmpleud %ymm1, %ymm0, %k0
; AVX512-NEXT:    vpmovm2w %k0, %xmm0
; AVX512-NEXT:    vzeroupper
; AVX512-NEXT:    retq
  %t0 = trunc nuw <8 x i32> %a0 to <8 x i16>
  %t1 = trunc nuw <8 x i32> %a1 to <8 x i16>
  %c = icmp ule <8 x i16> %t0, %t1
  ret <8 x i1> %c
}