llvm/test/CodeGen/X86/stack-realign-local-padding.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s

; PEI realigns the stack but leaves locals relative to the incoming SP,
; so padding between saved registers and locals must not be allocated.
; GPR/XMM saves must not affect it, two-block objects still need both.

declare void @use(ptr)

define void @one_block() nounwind {
; CHECK-LABEL: one_block:
; CHECK:       # %bb.0:
; CHECK-NEXT:    pushq %rbp
; CHECK-NEXT:    movq %rsp, %rbp
; CHECK-NEXT:    andq $-64, %rsp
; CHECK-NEXT:    subq $64, %rsp
; CHECK-NEXT:    movq %rsp, %rdi
; CHECK-NEXT:    callq use@PLT
; CHECK-NEXT:    movq %rbp, %rsp
; CHECK-NEXT:    popq %rbp
; CHECK-NEXT:    retq
  %a = alloca [64 x i8], align 64
  call void @use(ptr %a)
  ret void
}

define void @two_blocks() nounwind {
; CHECK-LABEL: two_blocks:
; CHECK:       # %bb.0:
; CHECK-NEXT:    pushq %rbp
; CHECK-NEXT:    movq %rsp, %rbp
; CHECK-NEXT:    andq $-64, %rsp
; CHECK-NEXT:    addq $-128, %rsp
; CHECK-NEXT:    movq %rsp, %rdi
; CHECK-NEXT:    callq use@PLT
; CHECK-NEXT:    movq %rbp, %rsp
; CHECK-NEXT:    popq %rbp
; CHECK-NEXT:    retq
  %a = alloca [65 x i8], align 64
  call void @use(ptr %a)
  ret void
}

define void @gpr_csrs() nounwind {
; CHECK-LABEL: gpr_csrs:
; CHECK:       # %bb.0:
; CHECK-NEXT:    pushq %rbp
; CHECK-NEXT:    movq %rsp, %rbp
; CHECK-NEXT:    pushq %r13
; CHECK-NEXT:    pushq %r12
; CHECK-NEXT:    pushq %rbx
; CHECK-NEXT:    andq $-64, %rsp
; CHECK-NEXT:    subq $64, %rsp
; CHECK-NEXT:    #APP
; CHECK-NEXT:    #NO_APP
; CHECK-NEXT:    movq %rsp, %rdi
; CHECK-NEXT:    callq use@PLT
; CHECK-NEXT:    leaq -24(%rbp), %rsp
; CHECK-NEXT:    popq %rbx
; CHECK-NEXT:    popq %r12
; CHECK-NEXT:    popq %r13
; CHECK-NEXT:    popq %rbp
; CHECK-NEXT:    retq
  %a = alloca [64 x i8], align 64
  call void asm sideeffect "", "~{rbx},~{r12},~{r13}"()
  call void @use(ptr %a)
  ret void
}

define x86_regcallcc void @xmm_csrs() nounwind {
; CHECK-LABEL: xmm_csrs:
; CHECK:       # %bb.0:
; CHECK-NEXT:    pushq %rbp
; CHECK-NEXT:    movq %rsp, %rbp
; CHECK-NEXT:    andq $-64, %rsp
; CHECK-NEXT:    subq $192, %rsp
; CHECK-NEXT:    movaps %xmm15, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; CHECK-NEXT:    movaps %xmm14, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; CHECK-NEXT:    movaps %xmm13, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; CHECK-NEXT:    movaps %xmm12, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; CHECK-NEXT:    movaps %xmm11, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; CHECK-NEXT:    movaps %xmm10, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; CHECK-NEXT:    movaps %xmm9, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; CHECK-NEXT:    movaps %xmm8, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; CHECK-NEXT:    #APP
; CHECK-NEXT:    #NO_APP
; CHECK-NEXT:    movq %rsp, %rdi
; CHECK-NEXT:    callq use@PLT
; CHECK-NEXT:    movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm8 # 16-byte Reload
; CHECK-NEXT:    movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm9 # 16-byte Reload
; CHECK-NEXT:    movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm10 # 16-byte Reload
; CHECK-NEXT:    movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm11 # 16-byte Reload
; CHECK-NEXT:    movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm12 # 16-byte Reload
; CHECK-NEXT:    movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm13 # 16-byte Reload
; CHECK-NEXT:    movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm14 # 16-byte Reload
; CHECK-NEXT:    movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm15 # 16-byte Reload
; CHECK-NEXT:    movq %rbp, %rsp
; CHECK-NEXT:    popq %rbp
; CHECK-NEXT:    retq
  %a = alloca [64 x i8], align 64
  call void asm sideeffect "", "~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15}"()
  call void @use(ptr %a)
  ret void
}