llvm/test/CodeGen/X86/pr53842.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX512F
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefixes=AVX512F
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=AVX512F
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512dq | FileCheck %s --check-prefixes=AVX512DQ

define void @PR53842_eq() {
; AVX512F-LABEL: PR53842_eq:
; AVX512F:       # %bb.0: # %entry
; AVX512F-NEXT:    vpxor %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vpmovzxbq {{.*#+}} zmm1 = mem[0],zero,zero,zero,zero,zero,zero,zero,mem[1],zero,zero,zero,zero,zero,zero,zero,mem[2],zero,zero,zero,zero,zero,zero,zero,mem[3],zero,zero,zero,zero,zero,zero,zero,mem[4],zero,zero,zero,zero,zero,zero,zero,mem[5],zero,zero,zero,zero,zero,zero,zero,mem[6],zero,zero,zero,zero,zero,zero,zero,mem[7],zero,zero,zero,zero,zero,zero,zero
; AVX512F-NEXT:    vptestnmq %zmm1, %zmm1, %k1
; AVX512F-NEXT:    vpternlogd {{.*#+}} zmm1 = -1
; AVX512F-NEXT:    .p2align 4
; AVX512F-NEXT:  .LBB0_1: # %vector.body
; AVX512F-NEXT:    # =>This Inner Loop Header: Depth=1
; AVX512F-NEXT:    vpsubq %zmm1, %zmm0, %zmm0 {%k1}
; AVX512F-NEXT:    jmp .LBB0_1
;
; AVX512DQ-LABEL: PR53842_eq:
; AVX512DQ:       # %bb.0: # %entry
; AVX512DQ-NEXT:    vpxor %xmm0, %xmm0, %xmm0
; AVX512DQ-NEXT:    vpmovzxbq {{.*#+}} zmm1 = mem[0],zero,zero,zero,zero,zero,zero,zero,mem[1],zero,zero,zero,zero,zero,zero,zero,mem[2],zero,zero,zero,zero,zero,zero,zero,mem[3],zero,zero,zero,zero,zero,zero,zero,mem[4],zero,zero,zero,zero,zero,zero,zero,mem[5],zero,zero,zero,zero,zero,zero,zero,mem[6],zero,zero,zero,zero,zero,zero,zero,mem[7],zero,zero,zero,zero,zero,zero,zero
; AVX512DQ-NEXT:    vptestnmq %zmm1, %zmm1, %k0
; AVX512DQ-NEXT:    vpmovm2q %k0, %zmm1
; AVX512DQ-NEXT:    .p2align 4
; AVX512DQ-NEXT:  .LBB0_1: # %vector.body
; AVX512DQ-NEXT:    # =>This Inner Loop Header: Depth=1
; AVX512DQ-NEXT:    vpsubq %zmm1, %zmm0, %zmm0
; AVX512DQ-NEXT:    jmp .LBB0_1
entry:
  br label %vector.body

vector.body:
  %index = phi i64 [ 0, %entry ], [ 0, %vector.body ]
  %vec.phi = phi <8 x i64> [ zeroinitializer, %entry ], [ %i2, %vector.body ]
  %wide.load23 = load <8 x i8>, ptr undef, align 1
  %i = icmp eq <8 x i8> zeroinitializer, %wide.load23
  %i1 = zext <8 x i1> %i to <8 x i64>
  %i2 = add <8 x i64> %vec.phi, %i1
  br i1 false, label %middle.block, label %vector.body

middle.block:
  %bin.rdx = add <8 x i64> undef, %i2
  unreachable
}

define void @PR53842_sgt() {
; AVX512F-LABEL: PR53842_sgt:
; AVX512F:       # %bb.0: # %entry
; AVX512F-NEXT:    vpxor %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vpmovsxbq (%rax), %zmm1
; AVX512F-NEXT:    vpternlogd {{.*#+}} zmm2 = -1
; AVX512F-NEXT:    vpxor %xmm3, %xmm3, %xmm3
; AVX512F-NEXT:    .p2align 4
; AVX512F-NEXT:  .LBB1_1: # %vector.body
; AVX512F-NEXT:    # =>This Inner Loop Header: Depth=1
; AVX512F-NEXT:    vpcmpgtq %zmm1, %zmm0, %k1
; AVX512F-NEXT:    vpsubq %zmm2, %zmm3, %zmm3 {%k1}
; AVX512F-NEXT:    jmp .LBB1_1
;
; AVX512DQ-LABEL: PR53842_sgt:
; AVX512DQ:       # %bb.0: # %entry
; AVX512DQ-NEXT:    vpxor %xmm0, %xmm0, %xmm0
; AVX512DQ-NEXT:    vpmovsxbq (%rax), %zmm1
; AVX512DQ-NEXT:    vpmovq2m %zmm1, %k0
; AVX512DQ-NEXT:    vpmovm2q %k0, %zmm1
; AVX512DQ-NEXT:    .p2align 4
; AVX512DQ-NEXT:  .LBB1_1: # %vector.body
; AVX512DQ-NEXT:    # =>This Inner Loop Header: Depth=1
; AVX512DQ-NEXT:    vpsubq %zmm1, %zmm0, %zmm0
; AVX512DQ-NEXT:    jmp .LBB1_1
entry:
  br label %vector.body

vector.body:
  %index = phi i64 [ 0, %entry ], [ 0, %vector.body ]
  %vec.phi = phi <8 x i64> [ zeroinitializer, %entry ], [ %i2, %vector.body ]
  %wide.load23 = load <8 x i8>, ptr undef, align 1
  %i = icmp sgt <8 x i8> zeroinitializer, %wide.load23
  %i1 = zext <8 x i1> %i to <8 x i64>
  %i2 = add <8 x i64> %vec.phi, %i1
  br i1 false, label %middle.block, label %vector.body

middle.block:
  %bin.rdx = add <8 x i64> undef, %i2
  unreachable
}

define void @PR53842_slt() {
; AVX512F-LABEL: PR53842_slt:
; AVX512F:       # %bb.0: # %entry
; AVX512F-NEXT:    vpxor %xmm0, %xmm0, %xmm0
; AVX512F-NEXT:    vpmovsxbq (%rax), %zmm1
; AVX512F-NEXT:    vpternlogd {{.*#+}} zmm2 = -1
; AVX512F-NEXT:    vpxor %xmm3, %xmm3, %xmm3
; AVX512F-NEXT:    .p2align 4
; AVX512F-NEXT:  .LBB2_1: # %vector.body
; AVX512F-NEXT:    # =>This Inner Loop Header: Depth=1
; AVX512F-NEXT:    vpcmpgtq %zmm0, %zmm1, %k1
; AVX512F-NEXT:    vpsubq %zmm2, %zmm3, %zmm3 {%k1}
; AVX512F-NEXT:    jmp .LBB2_1
;
; AVX512DQ-LABEL: PR53842_slt:
; AVX512DQ:       # %bb.0: # %entry
; AVX512DQ-NEXT:    vpxor %xmm0, %xmm0, %xmm0
; AVX512DQ-NEXT:    vpmovsxbq (%rax), %zmm1
; AVX512DQ-NEXT:    vpxor %xmm2, %xmm2, %xmm2
; AVX512DQ-NEXT:    .p2align 4
; AVX512DQ-NEXT:  .LBB2_1: # %vector.body
; AVX512DQ-NEXT:    # =>This Inner Loop Header: Depth=1
; AVX512DQ-NEXT:    vpcmpgtq %zmm0, %zmm1, %k0
; AVX512DQ-NEXT:    vpmovm2q %k0, %zmm3
; AVX512DQ-NEXT:    vpsubq %zmm3, %zmm2, %zmm2
; AVX512DQ-NEXT:    jmp .LBB2_1
entry:
  br label %vector.body

vector.body:
  %index = phi i64 [ 0, %entry ], [ 0, %vector.body ]
  %vec.phi = phi <8 x i64> [ zeroinitializer, %entry ], [ %i2, %vector.body ]
  %wide.load23 = load <8 x i8>, ptr undef, align 1
  %i = icmp slt <8 x i8> zeroinitializer, %wide.load23
  %i1 = zext <8 x i1> %i to <8 x i64>
  %i2 = add <8 x i64> %vec.phi, %i1
  br i1 false, label %middle.block, label %vector.body

middle.block:
  %bin.rdx = add <8 x i64> undef, %i2
  unreachable
}